Changes in uspace/drv/bus/usb/uhci/hc.c [7de1988c:7813516] in mainline
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uspace/drv/bus/usb/uhci/hc.c
r7de1988c r7813516 32 32 * @brief UHCI Host controller driver routines 33 33 */ 34 35 #include <adt/list.h> 36 #include <assert.h> 37 #include <async.h> 38 #include <ddi.h> 39 #include <device/hw_res_parsed.h> 40 #include <fibril.h> 34 41 #include <errno.h> 42 #include <macros.h> 43 #include <mem.h> 44 #include <stdlib.h> 35 45 #include <str_error.h> 36 #include <adt/list.h> 37 #include <ddi.h> 46 #include <sys/types.h> 38 47 39 48 #include <usb/debug.h> 40 49 #include <usb/usb.h> 41 50 51 #include "uhci_batch.h" 52 #include "utils/malloc32.h" 42 53 #include "hc.h" 43 #include "uhci_batch.h"44 54 45 55 #define UHCI_INTR_ALLOW_INTERRUPTS \ … … 85 95 static int hc_init_mem_structures(hc_t *instance); 86 96 static int hc_init_transfer_lists(hc_t *instance); 87 static int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);88 97 89 98 static int hc_interrupt_emulator(void *arg); 90 99 static int hc_debug_checker(void *arg); 91 100 92 enum {93 /** Number of PIO ranges used in IRQ code */94 hc_irq_pio_range_count =95 sizeof(uhci_irq_pio_ranges) / sizeof(irq_pio_range_t),96 97 /* Number of commands used in IRQ code */98 hc_irq_cmd_count =99 sizeof(uhci_irq_commands) / sizeof(irq_cmd_t)100 };101 101 102 102 /** Generate IRQ code. 103 * @param[out] ranges PIO ranges buffer. 104 * @param[in] ranges_size Size of the ranges buffer (bytes). 105 * @param[out] cmds Commands buffer. 106 * @param[in] cmds_size Size of the commands buffer (bytes). 107 * @param[in] regs Device's register range. 103 * @param[out] code IRQ code structure. 104 * @param[in] hw_res Device's resources. 108 105 * 109 106 * @return Error code. 110 107 */ 111 int 112 hc_get_irq_code(irq_pio_range_t ranges[], size_t ranges_size, irq_cmd_t cmds[], 113 size_t cmds_size, addr_range_t *regs) 114 { 115 if ((ranges_size < sizeof(uhci_irq_pio_ranges)) || 116 (cmds_size < sizeof(uhci_irq_commands)) || 117 (RNGSZ(*regs) < sizeof(uhci_regs_t))) 108 int hc_gen_irq_code(irq_code_t *code, const hw_res_list_parsed_t *hw_res) 109 { 110 assert(code); 111 assert(hw_res); 112 113 if (hw_res->irqs.count != 1 || hw_res->io_ranges.count != 1) 114 return EINVAL; 115 const addr_range_t regs = hw_res->io_ranges.ranges[0]; 116 117 if (RNGSZ(regs) < sizeof(uhci_regs_t)) 118 118 return EOVERFLOW; 119 119 120 memcpy(ranges, uhci_irq_pio_ranges, sizeof(uhci_irq_pio_ranges)); 121 ranges[0].base = RNGABS(*regs); 122 123 memcpy(cmds, uhci_irq_commands, sizeof(uhci_irq_commands)); 124 uhci_regs_t *registers = (uhci_regs_t *) RNGABSPTR(*regs); 125 cmds[0].addr = ®isters->usbsts; 126 cmds[3].addr = ®isters->usbsts; 127 128 return EOK; 129 } 130 131 /** Register interrupt handler. 132 * 133 * @param[in] device Host controller DDF device 134 * @param[in] regs Register range 135 * @param[in] irq Interrupt number 136 * @paran[in] handler Interrupt handler 137 * 138 * @return EOK on success or negative error code 139 */ 140 int hc_register_irq_handler(ddf_dev_t *device, addr_range_t *regs, int irq, 141 interrupt_handler_t handler) 142 { 143 int rc; 144 irq_pio_range_t irq_ranges[hc_irq_pio_range_count]; 145 irq_cmd_t irq_cmds[hc_irq_cmd_count]; 146 rc = hc_get_irq_code(irq_ranges, sizeof(irq_ranges), irq_cmds, 147 sizeof(irq_cmds), regs); 148 if (rc != EOK) { 149 usb_log_error("Failed to generate IRQ commands: %s.\n", 150 str_error(rc)); 151 return rc; 152 } 153 154 irq_code_t irq_code = { 155 .rangecount = hc_irq_pio_range_count, 156 .ranges = irq_ranges, 157 .cmdcount = hc_irq_cmd_count, 158 .cmds = irq_cmds 159 }; 160 161 /* Register handler to avoid interrupt lockup */ 162 rc = register_interrupt_handler(device, irq, handler, &irq_code); 163 if (rc != EOK) { 164 usb_log_error("Failed to register interrupt handler: %s.\n", 165 str_error(rc)); 166 return rc; 167 } 168 169 return EOK; 120 code->ranges = malloc(sizeof(uhci_irq_pio_ranges)); 121 if (code->ranges == NULL) 122 return ENOMEM; 123 124 code->cmds = malloc(sizeof(uhci_irq_commands)); 125 if (code->cmds == NULL) { 126 free(code->ranges); 127 return ENOMEM; 128 } 129 130 code->rangecount = ARRAY_SIZE(uhci_irq_pio_ranges); 131 code->cmdcount = ARRAY_SIZE(uhci_irq_commands); 132 133 memcpy(code->ranges, uhci_irq_pio_ranges, sizeof(uhci_irq_pio_ranges)); 134 code->ranges[0].base = RNGABS(regs); 135 136 memcpy(code->cmds, uhci_irq_commands, sizeof(uhci_irq_commands)); 137 uhci_regs_t *registers = (uhci_regs_t *) RNGABSPTR(regs); 138 code->cmds[0].addr = (void*)®isters->usbsts; 139 code->cmds[3].addr = (void*)®isters->usbsts; 140 141 usb_log_debug("I/O regs at %p (size %zu), IRQ %d.\n", 142 RNGABSPTR(regs), RNGSZ(regs), hw_res->irqs.irqs[0]); 143 144 return hw_res->irqs.irqs[0]; 170 145 } 171 146 … … 195 170 &instance->transfers_bulk_full, &done); 196 171 197 while (!list_empty(&done)) { 198 link_t *item = list_first(&done); 199 list_remove(item); 172 list_foreach_safe(done, current, next) { 173 list_remove(current); 200 174 uhci_transfer_batch_t *batch = 201 uhci_transfer_batch_from_link( item);175 uhci_transfer_batch_from_link(current); 202 176 uhci_transfer_batch_finish_dispose(batch); 203 177 } … … 238 212 * interrupt fibrils. 239 213 */ 240 int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts) 241 { 242 assert(regs->size >= sizeof(uhci_regs_t)); 243 int rc; 214 int hc_init(hc_t *instance, const hw_res_list_parsed_t *hw_res, bool interrupts) 215 { 216 assert(instance); 217 assert(hw_res); 218 if (hw_res->io_ranges.count != 1 || 219 hw_res->io_ranges.ranges[0].size < sizeof(uhci_regs_t)) 220 return EINVAL; 244 221 245 222 instance->hw_interrupts = interrupts; … … 247 224 248 225 /* allow access to hc control registers */ 249 uhci_regs_t *io; 250 rc = pio_enable_range(regs, (void **) &io); 251 if (rc != EOK) { 252 usb_log_error("Failed to gain access to registers at %p: %s.\n", 253 io, str_error(rc)); 254 return rc; 255 } 256 257 instance->registers = io; 258 usb_log_debug( 259 "Device registers at %p (%zuB) accessible.\n", io, regs->size); 260 261 rc = hc_init_mem_structures(instance); 262 if (rc != EOK) { 263 usb_log_error("Failed to initialize UHCI memory structures: %s.\n", 264 str_error(rc)); 265 return rc; 266 } 267 268 hcd_init(&instance->generic, USB_SPEED_FULL, 269 BANDWIDTH_AVAILABLE_USB11, bandwidth_count_usb11); 270 271 instance->generic.private_data = instance; 272 instance->generic.schedule = hc_schedule; 273 instance->generic.ep_add_hook = NULL; 226 int ret = pio_enable_range(&hw_res->io_ranges.ranges[0], 227 (void **) &instance->registers); 228 if (ret != EOK) { 229 usb_log_error("Failed to gain access to registers: %s.\n", 230 str_error(ret)); 231 return ret; 232 } 233 234 usb_log_debug("Device registers at %" PRIx64 " (%zuB) accessible.\n", 235 hw_res->io_ranges.ranges[0].address.absolute, 236 hw_res->io_ranges.ranges[0].size); 237 238 ret = hc_init_mem_structures(instance); 239 if (ret != EOK) { 240 usb_log_error("Failed to init UHCI memory structures: %s.\n", 241 str_error(ret)); 242 // TODO: we should disable pio here 243 return ret; 244 } 274 245 275 246 hc_init_hw(instance); … … 281 252 (void)hc_debug_checker; 282 253 254 uhci_rh_init(&instance->rh, instance->registers->ports, "uhci"); 255 283 256 return EOK; 257 } 258 259 /** Safely dispose host controller internal structures 260 * 261 * @param[in] instance Host controller structure to use. 262 */ 263 void hc_fini(hc_t *instance) 264 { 265 assert(instance); 266 //TODO Implement 284 267 } 285 268 … … 440 423 { 441 424 assert(hcd); 442 hc_t *instance = hcd-> private_data;425 hc_t *instance = hcd->driver.data; 443 426 assert(instance); 444 427 assert(batch); 428 429 if (batch->ep->address == uhci_rh_get_address(&instance->rh)) 430 return uhci_rh_schedule(&instance->rh, batch); 431 445 432 uhci_transfer_batch_t *uhci_batch = uhci_transfer_batch_get(batch); 446 433 if (!uhci_batch) {
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