Changeset 7947c34 in mainline for uspace/lib/c/arch/ia64/src/fibril.S
- Timestamp:
- 2014-09-07T19:17:49Z (10 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- cf7ad06
- Parents:
- a116f7f2
- File:
-
- 1 edited
-
uspace/lib/c/arch/ia64/src/fibril.S (modified) (6 diffs)
Legend:
- Unmodified
- Added
- Removed
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uspace/lib/c/arch/ia64/src/fibril.S
ra116f7f2 r7947c34 27 27 # 28 28 29 #include <libarch/fibril_context.h> 30 29 31 .text 30 32 … … 33 35 34 36 context_save: 35 alloc loc0 = ar.pfs, 1, 8, 0, 0 36 mov loc1 = ar.unat ;; 37 /* loc2 */ 37 alloc loc0 = ar.pfs, 1, 49, 0, 0 38 mov loc1 = ar.unat ;; 38 39 mov loc3 = ar.rsc 39 40 … … 58 59 59 60 mov loc6 = ar.lc 61 62 add loc8 = CONTEXT_OFFSET_AR_PFS, in0 63 add loc9 = CONTEXT_OFFSET_AR_UNAT_CALLER, in0 64 add loc10 = CONTEXT_OFFSET_AR_UNAT_CALLEE, in0 65 add loc11 = CONTEXT_OFFSET_AR_RSC, in0 66 add loc12 = CONTEXT_OFFSET_BSP, in0 67 add loc13 = CONTEXT_OFFSET_AR_RNAT, in0 68 add loc14 = CONTEXT_OFFSET_AR_LC, in0 69 70 add loc15 = CONTEXT_OFFSET_R1, in0 71 add loc16 = CONTEXT_OFFSET_R4, in0 72 add loc17 = CONTEXT_OFFSET_R5, in0 73 add loc18 = CONTEXT_OFFSET_R6, in0 74 add loc19 = CONTEXT_OFFSET_R7, in0 75 add loc20 = CONTEXT_OFFSET_SP, in0 76 add loc21 = CONTEXT_OFFSET_TP, in0 77 78 add loc22 = CONTEXT_OFFSET_PC, in0 79 add loc23 = CONTEXT_OFFSET_B1, in0 80 add loc24 = CONTEXT_OFFSET_B2, in0 81 add loc25 = CONTEXT_OFFSET_B3, in0 82 add loc26 = CONTEXT_OFFSET_B4, in0 83 add loc27 = CONTEXT_OFFSET_B5, in0 84 85 add loc28 = CONTEXT_OFFSET_PR, in0 86 87 add loc29 = CONTEXT_OFFSET_F2, in0 88 add loc30 = CONTEXT_OFFSET_F3, in0 89 add loc31 = CONTEXT_OFFSET_F4, in0 90 add loc32 = CONTEXT_OFFSET_F5, in0 91 92 add loc33 = CONTEXT_OFFSET_F16, in0 93 add loc34 = CONTEXT_OFFSET_F17, in0 94 add loc35 = CONTEXT_OFFSET_F18, in0 95 add loc36 = CONTEXT_OFFSET_F19, in0 96 add loc37 = CONTEXT_OFFSET_F20, in0 97 add loc38 = CONTEXT_OFFSET_F21, in0 98 add loc39 = CONTEXT_OFFSET_F22, in0 99 add loc40 = CONTEXT_OFFSET_F23, in0 100 add loc41 = CONTEXT_OFFSET_F24, in0 101 add loc42 = CONTEXT_OFFSET_F25, in0 102 add loc43 = CONTEXT_OFFSET_F26, in0 103 add loc44 = CONTEXT_OFFSET_F27, in0 104 add loc45 = CONTEXT_OFFSET_F28, in0 105 add loc46 = CONTEXT_OFFSET_F29, in0 106 add loc47 = CONTEXT_OFFSET_F30, in0 107 add loc48 = CONTEXT_OFFSET_F31, in0 ;; 108 109 /* 110 * Save general registers including NaT bits 111 */ 112 st8.spill [loc15] = r1 ;; 113 st8.spill [loc16] = r4 ;; 114 st8.spill [loc17] = r5 ;; 115 st8.spill [loc18] = r6 ;; 116 st8.spill [loc19] = r7 ;; 117 st8.spill [loc20] = r12 ;; /* save sp */ 118 st8.spill [loc21] = r13 ;; /* save tp */ 119 120 mov loc2 = ar.unat 60 121 61 122 /* 62 123 * Save application registers 63 124 */ 64 st8 [in0] = loc0, 8 ;; /* save ar.pfs */ 65 st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */ 66 mov loc2 = in0 ;; 67 add in0 = 8, in0 ;; /* skip ar.unat (callee) */ 68 st8 [in0] = loc3, 8 ;; /* save ar.rsc */ 69 st8 [in0] = loc4, 8 ;; /* save ar.bsp */ 70 st8 [in0] = loc5, 8 ;; /* save ar.rnat */ 71 st8 [in0] = loc6, 8 ;; /* save ar.lc */ 72 73 /* 74 * Save general registers including NaT bits 75 */ 76 st8.spill [in0] = r1, 8 ;; 77 st8.spill [in0] = r4, 8 ;; 78 st8.spill [in0] = r5, 8 ;; 79 st8.spill [in0] = r6, 8 ;; 80 st8.spill [in0] = r7, 8 ;; 81 st8.spill [in0] = r12, 8 ;; /* save sp */ 82 st8.spill [in0] = r13, 8 ;; /* save tp */ 83 84 mov loc3 = ar.unat ;; 85 st8 [loc2] = loc3 /* save ar.unat (callee) */ 125 st8 [loc8] = loc0 /* save ar.pfs */ 126 st8 [loc9] = loc1 ;; /* save ar.unat (caller) */ 127 st8 [loc10] = loc2 /* save ar.unat (callee) */ 128 st8 [loc11] = loc3 /* save ar.rsc */ 129 st8 [loc12] = loc4 /* save ar.bsp */ 130 st8 [loc13] = loc5 /* save ar.rnat */ 131 st8 [loc14] = loc6 ;; /* save ar.lc */ 86 132 87 133 /* 88 134 * Save branch registers 89 135 */ 90 mov loc2 = b0 ;;91 st8 [in0] = loc2, 8 /* save pc */92 mov loc 3 = b1 ;;93 st8 [in0] = loc3, 894 mov loc 4 = b2 ;;95 st8 [in0] = loc4, 896 mov loc5 = b3 ;;97 st8 [ in0] = loc5, 898 mov loc6 = b4 ;;99 st8 [ in0] = loc6, 8100 mov loc7 = b5 ;;101 st8 [ in0] = loc7, 8136 mov loc2 = b0 137 mov loc3 = b1 138 mov loc4 = b2 139 mov loc5 = b3 140 mov loc6 = b4 141 mov loc7 = b5 ;; 142 st8 [loc22] = loc2 /* save pc */ 143 st8 [loc23] = loc3 144 st8 [loc24] = loc4 145 st8 [loc25] = loc5 146 st8 [loc26] = loc6 147 st8 [loc27] = loc7 ;; 102 148 103 149 /* 104 150 * Save predicate registers 105 151 */ 106 mov loc2 = pr 107 st8 [ in0] = loc2, 16;; /* Next fpu registers should be spilled to 16B aligned address */152 mov loc2 = pr ;; 153 st8 [loc28] = loc2 108 154 109 155 /* 110 156 * Save floating-point registers. 111 157 */ 112 stf.spill [ in0] = f2, 16 ;;113 stf.spill [ in0] = f3, 16 ;;114 stf.spill [ in0] = f4, 16 ;;115 stf.spill [ in0] = f5, 16 ;;116 117 stf.spill [ in0] = f16, 16 ;;118 stf.spill [ in0] = f17, 16 ;;119 stf.spill [ in0] = f18, 16 ;;120 stf.spill [ in0] = f19, 16 ;;121 stf.spill [ in0] = f20, 16 ;;122 stf.spill [ in0] = f21, 16 ;;123 stf.spill [ in0] = f22, 16 ;;124 stf.spill [ in0] = f23, 16 ;;125 stf.spill [ in0] = f24, 16 ;;126 stf.spill [ in0] = f25, 16 ;;127 stf.spill [ in0] = f26, 16 ;;128 stf.spill [ in0] = f27, 16 ;;129 stf.spill [ in0] = f28, 16 ;;130 stf.spill [ in0] = f29, 16 ;;131 stf.spill [ in0] = f30, 16 ;;132 stf.spill [ in0] = f31, 16 ;;158 stf.spill [loc29] = f2 159 stf.spill [loc30] = f3 160 stf.spill [loc31] = f4 161 stf.spill [loc32] = f5 162 163 stf.spill [loc33] = f16 164 stf.spill [loc34] = f17 165 stf.spill [loc35] = f18 166 stf.spill [loc36] = f19 167 stf.spill [loc37] = f20 168 stf.spill [loc38] = f21 169 stf.spill [loc39] = f22 170 stf.spill [loc40] = f23 171 stf.spill [loc41] = f24 172 stf.spill [loc42] = f25 173 stf.spill [loc43] = f26 174 stf.spill [loc44] = f27 175 stf.spill [loc45] = f28 176 stf.spill [loc46] = f29 177 stf.spill [loc47] = f30 178 stf.spill [loc48] = f31 133 179 134 180 mov ar.unat = loc1 135 181 136 add r8 = r0, r0, 1 182 add r8 = r0, r0, 1 /* context_save returns 1 */ 137 183 br.ret.sptk.many b0 138 184 139 185 context_restore: 140 alloc loc0 = ar.pfs, 1, 9, 0, 0 ;; 141 142 ld8 loc0 = [in0], 8 ;; /* load ar.pfs */ 143 ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */ 144 ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */ 145 ld8 loc3 = [in0], 8 ;; /* load ar.rsc */ 146 ld8 loc4 = [in0], 8 ;; /* load ar.bsp */ 147 ld8 loc5 = [in0], 8 ;; /* load ar.rnat */ 148 ld8 loc6 = [in0], 8 ;; /* load ar.lc */ 186 alloc loc0 = ar.pfs, 1, 50, 0, 0 ;; 187 188 add loc9 = CONTEXT_OFFSET_AR_PFS, in0 189 add loc10 = CONTEXT_OFFSET_AR_UNAT_CALLER, in0 190 add loc11 = CONTEXT_OFFSET_AR_UNAT_CALLEE, in0 191 add loc12 = CONTEXT_OFFSET_AR_RSC, in0 192 add loc13 = CONTEXT_OFFSET_BSP, in0 193 add loc14 = CONTEXT_OFFSET_AR_RNAT, in0 194 add loc15 = CONTEXT_OFFSET_AR_LC, in0 195 196 add loc16 = CONTEXT_OFFSET_R1, in0 197 add loc17 = CONTEXT_OFFSET_R4, in0 198 add loc18 = CONTEXT_OFFSET_R5, in0 199 add loc19 = CONTEXT_OFFSET_R6, in0 200 add loc20 = CONTEXT_OFFSET_R7, in0 201 add loc21 = CONTEXT_OFFSET_SP, in0 202 add loc22 = CONTEXT_OFFSET_TP, in0 203 204 add loc23 = CONTEXT_OFFSET_PC, in0 205 add loc24 = CONTEXT_OFFSET_B1, in0 206 add loc25 = CONTEXT_OFFSET_B2, in0 207 add loc26 = CONTEXT_OFFSET_B3, in0 208 add loc27 = CONTEXT_OFFSET_B4, in0 209 add loc28 = CONTEXT_OFFSET_B5, in0 210 211 add loc29 = CONTEXT_OFFSET_PR, in0 212 213 add loc30 = CONTEXT_OFFSET_F2, in0 214 add loc31 = CONTEXT_OFFSET_F3, in0 215 add loc32 = CONTEXT_OFFSET_F4, in0 216 add loc33 = CONTEXT_OFFSET_F5, in0 217 218 add loc34 = CONTEXT_OFFSET_F16, in0 219 add loc35 = CONTEXT_OFFSET_F17, in0 220 add loc36 = CONTEXT_OFFSET_F18, in0 221 add loc37 = CONTEXT_OFFSET_F19, in0 222 add loc38 = CONTEXT_OFFSET_F20, in0 223 add loc39 = CONTEXT_OFFSET_F21, in0 224 add loc40 = CONTEXT_OFFSET_F22, in0 225 add loc41 = CONTEXT_OFFSET_F23, in0 226 add loc42 = CONTEXT_OFFSET_F24, in0 227 add loc43 = CONTEXT_OFFSET_F25, in0 228 add loc44 = CONTEXT_OFFSET_F26, in0 229 add loc45 = CONTEXT_OFFSET_F27, in0 230 add loc46 = CONTEXT_OFFSET_F28, in0 231 add loc47 = CONTEXT_OFFSET_F29, in0 232 add loc48 = CONTEXT_OFFSET_F30, in0 233 add loc49 = CONTEXT_OFFSET_F31, in0 ;; 234 235 ld8 loc0 = [loc9] /* load ar.pfs */ 236 ld8 loc1 = [loc10] /* load ar.unat (caller) */ 237 ld8 loc2 = [loc11] /* load ar.unat (callee) */ 238 ld8 loc3 = [loc12] /* load ar.rsc */ 239 ld8 loc4 = [loc13] /* load ar.bsp */ 240 ld8 loc5 = [loc14] /* load ar.rnat */ 241 ld8 loc6 = [loc15] /* load ar.lc */ 149 242 150 243 .auto … … 180 273 .explicit 181 274 182 mov ar.unat = loc2 275 mov ar.unat = loc2 ;; 183 276 mov ar.lc = loc6 184 277 … … 186 279 * Restore general registers including NaT bits 187 280 */ 188 ld8.fill r1 = [ in0], 8;;189 ld8.fill r4 = [ in0], 8;;190 ld8.fill r5 = [ in0], 8;;191 ld8.fill r6 = [ in0], 8;;192 ld8.fill r7 = [ in0], 8;;193 ld8.fill r12 = [ in0], 8;; /* restore sp */194 ld8.fill r13 = [ in0], 8;;281 ld8.fill r1 = [loc16] ;; 282 ld8.fill r4 = [loc17] ;; 283 ld8.fill r5 = [loc18] ;; 284 ld8.fill r6 = [loc19] ;; 285 ld8.fill r7 = [loc20] ;; 286 ld8.fill r12 = [loc21] ;; /* restore sp */ 287 ld8.fill r13 = [loc22] ;; 195 288 196 289 /* 197 290 * Restore branch registers 198 291 */ 199 ld8 loc2 = [in0], 8 ;; /* restore pc */ 292 ld8 loc2 = [loc23] /* restore pc */ 293 ld8 loc3 = [loc24] 294 ld8 loc4 = [loc25] 295 ld8 loc5 = [loc26] 296 ld8 loc6 = [loc27] 297 ld8 loc7 = [loc28] ;; 200 298 mov b0 = loc2 201 ld8 loc3 = [in0], 8 ;;202 299 mov b1 = loc3 203 ld8 loc4 = [in0], 8 ;;204 300 mov b2 = loc4 205 ld8 loc5 = [in0], 8 ;;206 301 mov b3 = loc5 207 ld8 loc6 = [in0], 8 ;;208 302 mov b4 = loc6 209 ld8 loc7 = [in0], 8 ;; 210 mov b5 = loc7 303 mov b5 = loc7 ;; 211 304 212 305 /* 213 306 * Restore predicate registers 214 307 */ 215 ld8 loc2 = [ in0], 16;;308 ld8 loc2 = [loc29] ;; 216 309 mov pr = loc2, ~0 217 310 … … 219 312 * Restore floating-point registers. 220 313 */ 221 ldf.fill f2 = [ in0], 16 ;;222 ldf.fill f3 = [ in0], 16 ;;223 ldf.fill f4 = [ in0], 16 ;;224 ldf.fill f5 = [ in0], 16 ;;225 226 ldf.fill f16 = [ in0], 16 ;;227 ldf.fill f17 = [ in0], 16 ;;228 ldf.fill f18 = [ in0], 16 ;;229 ldf.fill f19 = [ in0], 16 ;;230 ldf.fill f20 = [ in0], 16 ;;231 ldf.fill f21 = [ in0], 16 ;;232 ldf.fill f22 = [ in0], 16 ;;233 ldf.fill f23 = [ in0], 16 ;;234 ldf.fill f24 = [ in0], 16 ;;235 ldf.fill f25 = [ in0], 16 ;;236 ldf.fill f26 = [ in0], 16 ;;237 ldf.fill f27 = [ in0], 16 ;;238 ldf.fill f28 = [ in0], 16 ;;239 ldf.fill f29 = [ in0], 16 ;;240 ldf.fill f30 = [ in0], 16 ;;241 ldf.fill f31 = [ in0], 16 ;;314 ldf.fill f2 = [loc30] 315 ldf.fill f3 = [loc31] 316 ldf.fill f4 = [loc32] 317 ldf.fill f5 = [loc33] 318 319 ldf.fill f16 = [loc34] 320 ldf.fill f17 = [loc35] 321 ldf.fill f18 = [loc36] 322 ldf.fill f19 = [loc37] 323 ldf.fill f20 = [loc38] 324 ldf.fill f21 = [loc39] 325 ldf.fill f22 = [loc40] 326 ldf.fill f23 = [loc41] 327 ldf.fill f24 = [loc42] 328 ldf.fill f25 = [loc43] 329 ldf.fill f26 = [loc44] 330 ldf.fill f27 = [loc45] 331 ldf.fill f28 = [loc46] 332 ldf.fill f29 = [loc47] 333 ldf.fill f30 = [loc48] 334 ldf.fill f31 = [loc49] 242 335 243 336 mov ar.unat = loc1
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