Changes in uspace/srv/hw/irc/apic/apic.c [df02460:79ae36dd] in mainline
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uspace/srv/hw/irc/apic/apic.c
rdf02460 r79ae36dd 42 42 #include <as.h> 43 43 #include <ddi.h> 44 #include <libarch/ddi.h> 45 #include <align.h> 44 46 #include <bool.h> 45 47 #include <errno.h> 46 48 #include <async.h> 49 #include <align.h> 50 #include <async.h> 47 51 #include <stdio.h> 52 #include <ipc/devmap.h> 48 53 49 54 #define NAME "apic" 50 55 51 #define APIC_MAX_IRQ 1552 53 #define IOREGSEL (0x00U / sizeof(uint32_t))54 #define IOWIN (0x10U / sizeof(uint32_t))55 56 #define IOREDTBL 0x10U57 58 /** I/O Register Select Register. */59 typedef union {60 uint32_t value;61 struct {62 uint8_t reg_addr; /**< APIC Register Address. */63 unsigned int : 24; /**< Reserved. */64 } __attribute__ ((packed));65 } io_regsel_t;66 67 /** I/O Redirection Register. */68 typedef struct io_redirection_reg {69 union {70 uint32_t lo;71 struct {72 uint8_t intvec; /**< Interrupt Vector. */73 unsigned int delmod : 3; /**< Delivery Mode. */74 unsigned int destmod : 1; /**< Destination mode. */75 unsigned int delivs : 1; /**< Delivery status (RO). */76 unsigned int intpol : 1; /**< Interrupt Input Pin Polarity. */77 unsigned int irr : 1; /**< Remote IRR (RO). */78 unsigned int trigger_mode : 1; /**< Trigger Mode. */79 unsigned int masked : 1; /**< Interrupt Mask. */80 unsigned int : 15; /**< Reserved. */81 } __attribute__ ((packed));82 };83 union {84 uint32_t hi;85 struct {86 unsigned int : 24; /**< Reserved. */87 uint8_t dest : 8; /**< Destination Field. */88 } __attribute__ ((packed));89 };90 } __attribute__ ((packed)) io_redirection_reg_t;91 92 // FIXME: get the address from the kernel93 #define IO_APIC_BASE 0xfec00000UL94 #define IO_APIC_SIZE 2095 96 ioport32_t *io_apic = NULL;97 98 /** Read from IO APIC register.99 *100 * @param address IO APIC register address.101 *102 * @return Content of the addressed IO APIC register.103 *104 */105 static uint32_t io_apic_read(uint8_t address)106 {107 io_regsel_t regsel;108 109 regsel.value = io_apic[IOREGSEL];110 regsel.reg_addr = address;111 io_apic[IOREGSEL] = regsel.value;112 return io_apic[IOWIN];113 }114 115 /** Write to IO APIC register.116 *117 * @param address IO APIC register address.118 * @param val Content to be written to the addressed IO APIC register.119 *120 */121 static void io_apic_write(uint8_t address, uint32_t val)122 {123 io_regsel_t regsel;124 125 regsel.value = io_apic[IOREGSEL];126 regsel.reg_addr = address;127 io_apic[IOREGSEL] = regsel.value;128 io_apic[IOWIN] = val;129 }130 131 static int irq_to_pin(int irq)132 {133 // FIXME: get the map from the kernel, even though this may work134 // for simple cases135 return irq;136 }137 138 56 static int apic_enable_irq(sysarg_t irq) 139 57 { 140 io_redirection_reg_t reg; 141 142 if (irq > APIC_MAX_IRQ) 143 return ELIMIT; 144 145 int pin = irq_to_pin(irq); 146 if (pin == -1) 147 return ENOENT; 148 149 reg.lo = io_apic_read((uint8_t) (IOREDTBL + pin * 2)); 150 reg.masked = false; 151 io_apic_write((uint8_t) (IOREDTBL + pin * 2), reg.lo); 152 153 return EOK; 58 // FIXME: TODO 59 return ENOTSUP; 154 60 } 155 61 … … 158 64 * @param iid Hash of the request that opened the connection. 159 65 * @param icall Call data of the request that opened the connection. 160 * @param arg Local argument.66 * 161 67 */ 162 static void apic_connection(ipc_callid_t iid, ipc_call_t *icall , void *arg)68 static void apic_connection(ipc_callid_t iid, ipc_call_t *icall) 163 69 { 164 70 ipc_callid_t callid; … … 205 111 return false; 206 112 } 207 208 if (pio_enable((void *) IO_APIC_BASE, IO_APIC_SIZE,209 (void **) &io_apic) != EOK)210 return false;211 113 212 114 async_set_client_connection(apic_connection);
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