Changeset 79f119b9 in mainline


Ignore:
Timestamp:
2006-11-18T12:41:34Z (18 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
be544ef
Parents:
e5a2ee8
Message:

Modify the sparc64 startup code to not cause MMU traps before it takes over the TLB and
the trap table. Fix several PA2KA and KA2PA omittions or errors. Fix configuration to pass
the DEFS variable along.

Files:
5 edited

Legend:

Unmodified
Added
Removed
  • boot/arch/sparc64/Makefile.inc

    re5a2ee8 r79f119b9  
    4343
    4444arch/$(ARCH)/loader/image.boot:
    45         make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
     45        $(MAKE) -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) "DEFS=$(DEFS)"
    4646
    4747clean: generic_clean
    48         make -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
     48        $(MAKE) -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
    4949        -rm -fr $(TMP)
    5050        -rm -f $(BASE)/image.iso
  • boot/boot.config

    re5a2ee8 r79f119b9  
    1717! COMPILER (choice)
    1818
    19 # Start AP processors
     19# Start AP processors by the loader
    2020! [ARCH=sparc64] CONFIG_SMP (y/n)
    2121
  • kernel/arch/sparc64/src/mm/page.c

    re5a2ee8 r79f119b9  
    136136         * by frame_alloc().
    137137         */
    138         ASSERT(last_frame);
    139         uintptr_t virtaddr = ALIGN_UP(last_frame, 1<<(order + FRAME_WIDTH));
    140         last_frame = ALIGN_UP(virtaddr + size, 1<<(order + FRAME_WIDTH));
     138        ASSERT(PA2KA(last_frame));
     139        uintptr_t virtaddr = ALIGN_UP(PA2KA(last_frame), 1 << (order + FRAME_WIDTH));
     140        last_frame = ALIGN_UP(KA2PA(virtaddr) + size, 1 << (order + FRAME_WIDTH));
    141141       
    142142        for (i = 0; i < sizemap[order].count; i++) {
  • kernel/arch/sparc64/src/sparc64.c

    re5a2ee8 r79f119b9  
    5959
    6060        for (i = 0; i < bootinfo.taskmap.count; i++) {
    61                 init.tasks[i].addr = PA2KA(bootinfo.taskmap.tasks[i].addr);
     61                init.tasks[i].addr = (uintptr_t) bootinfo.taskmap.tasks[i].addr;
    6262                init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
    6363        }
  • kernel/arch/sparc64/src/start.S

    re5a2ee8 r79f119b9  
    6868        andn %o0, %l0, %l6                              ! l6 <= start of physical memory
    6969
    70         sethi %hi(physmem_base), %l5
    71         stx %l6, [%l5 + %lo(physmem_base)]
    72 
    73         /*
    74          * Get bits 40:13 of physmem_base.
    75          */
    76         sethi %hi(mask_40_13), %l4
    77         sethi %hi(physmem_base_40_13), %l3
    78         ldx [%l4 + %lo(mask_40_13)], %l4
    79         and %l6, %l4, %l5                               ! l5 <= physmem_base[40:13]
    80         stx %l5, [%l3 + %lo(physmem_base_40_13)]
    81 
    82         /*
    83          * Prepare kernel 8K TLB data template.
    84          */
    85         sethi %hi(kernel_8k_tlb_data_template), %l4
    86         ldx [%l4 + %lo(kernel_8k_tlb_data_template)], %l3
    87         or %l3, %l5, %l3
    88         stx %l3, [%l4 + %lo(kernel_8k_tlb_data_template)]
     70        ! Get bits 40:13 of physmem_base.
     71        srlx %l6, 13, %l5
     72        sllx %l5, 13 + (63 - 40), %l5
     73        srlx %l5, 63 - 40, %l5                          ! l5 <= physmem_base[40:13]
    8974       
    9075        /*
     
    245230
    246231        /*
     232         * Save physmem_base for use by the mm subsystem.
     233         * %l6 contains starting physical address
     234         */
     235        sethi %hi(physmem_base), %l4
     236        stx %l6, [%l4 + %lo(physmem_base)]
     237
     238        /*
     239         * Precompute kernel 8K TLB data template.
     240         * %l5 contains starting physical address bits [40:13]
     241         */
     242        sethi %hi(kernel_8k_tlb_data_template), %l4
     243        ldx [%l4 + %lo(kernel_8k_tlb_data_template)], %l3
     244        or %l3, %l5, %l3
     245        stx %l3, [%l4 + %lo(kernel_8k_tlb_data_template)]
     246
     247        /*
    247248         * So far, we have not touched the stack.
    248249         * It is a good idea to set the kernel stack to a known state now.
     
    341342        .quad 0
    342343
    343 .global physmem_base_40_13
    344 physmem_base_40_13:             ! physmem_base & mask_40_13
    345         .quad 0
    346 
    347 .global mask_40_13
    348 mask_40_13:                     ! constant with bits 40:13 set
    349         .quad (((1 << 41) - 1) & ~((1 << 13) - 1))
    350 
    351344/*
    352345 * This variable is used by the fast_data_MMU_miss trap handler.
    353  * It is initialized to reflect the starting address of physical
    354  * memory.
     346 * In runtime, it is further modified to reflect the starting address of
     347 * physical memory.
    355348 */
    356349.global kernel_8k_tlb_data_template
    357350kernel_8k_tlb_data_template:
    358351        .quad ((1 << TTE_V_SHIFT) | TTE_CV | TTE_CP | TTE_P | TTE_W)
    359 
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