Changes in kernel/arch/ia64/include/cpu.h [d99c1d2:7a0359b] in mainline
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kernel/arch/ia64/include/cpu.h
rd99c1d2 r7a0359b 40 40 #include <arch/asm.h> 41 41 #include <arch/bootinfo.h> 42 #include <trace.h> 42 43 43 #define FAMILY_ITANIUM 0x7 44 #define FAMILY_ITANIUM2 0x1f 44 #define FAMILY_ITANIUM 0x7 45 #define FAMILY_ITANIUM2 0x1f 46 47 #define CR64_ID_SHIFT 24 48 #define CR64_ID_MASK 0xff000000 49 #define CR64_EID_SHIFT 16 50 #define CR64_EID_MASK 0xff0000 45 51 46 52 typedef struct { … … 55 61 * 56 62 * @return Value of CPUID[n] register. 63 * 57 64 */ 58 static inline uint64_t cpuid_read(int n)65 NO_TRACE static inline uint64_t cpuid_read(int n) 59 66 { 60 67 uint64_t v; 61 68 62 asm volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n)); 69 asm volatile ( 70 "mov %[v] = cpuid[%[r]]\n" 71 : [v] "=r" (v) 72 : [r] "r" (n) 73 ); 63 74 64 75 return v; 65 76 } 66 77 67 68 #define CR64_ID_SHIFT 24 69 #define CR64_ID_MASK 0xff000000 70 #define CR64_EID_SHIFT 16 71 #define CR64_EID_MASK 0xff0000 72 73 static inline int ia64_get_cpu_id(void) 78 NO_TRACE static inline int ia64_get_cpu_id(void) 74 79 { 75 uint64_t cr64 =cr64_read();76 return ((CR64_ID_MASK) &cr64)>>CR64_ID_SHIFT;80 uint64_t cr64 = cr64_read(); 81 return ((CR64_ID_MASK) &cr64) >> CR64_ID_SHIFT; 77 82 } 78 83 79 static inline int ia64_get_cpu_eid(void)84 NO_TRACE static inline int ia64_get_cpu_eid(void) 80 85 { 81 uint64_t cr64 =cr64_read();82 return ((CR64_EID_MASK) &cr64)>>CR64_EID_SHIFT;86 uint64_t cr64 = cr64_read(); 87 return ((CR64_EID_MASK) &cr64) >> CR64_EID_SHIFT; 83 88 } 84 89 85 86 static inline void ipi_send_ipi(int id, int eid, int intno) 90 NO_TRACE static inline void ipi_send_ipi(int id, int eid, int intno) 87 91 { 88 92 (bootinfo->sapic)[2 * (id * 256 + eid)] = intno; 89 93 srlz_d(); 90 91 94 } 92 95
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