Changes in kernel/arch/mips32/include/mm/tlb.h [d99c1d2:7a0359b] in mainline
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kernel/arch/mips32/include/mm/tlb.h
rd99c1d2 r7a0359b 39 39 #include <arch/mm/asid.h> 40 40 #include <arch/exception.h> 41 #include <trace.h> 41 42 42 43 #define TLB_ENTRY_COUNT 48 … … 126 127 * Probe TLB for Matching Entry. 127 128 */ 128 static inline void tlbp(void)129 NO_TRACE static inline void tlbp(void) 129 130 { 130 131 asm volatile ("tlbp\n\t"); … … 136 137 * Read Indexed TLB Entry. 137 138 */ 138 static inline void tlbr(void)139 NO_TRACE static inline void tlbr(void) 139 140 { 140 141 asm volatile ("tlbr\n\t"); … … 145 146 * Write Indexed TLB Entry. 146 147 */ 147 static inline void tlbwi(void)148 NO_TRACE static inline void tlbwi(void) 148 149 { 149 150 asm volatile ("tlbwi\n\t"); … … 154 155 * Write Random TLB Entry. 155 156 */ 156 static inline void tlbwr(void)157 NO_TRACE static inline void tlbwr(void) 157 158 { 158 159 asm volatile ("tlbwr\n\t");
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