Index: HelenOS.config
===================================================================
--- HelenOS.config	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ HelenOS.config	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -528,5 +528,5 @@
 ! CONFIG_OPTIMIZE_FOR_SIZE (n/y)
 
-% Bare boned build with essential binaries only 
-! CONFIG_BARE_BONED (n/y)
-
+% Barebone build with essential binaries only 
+! CONFIG_BAREBONE (n/y)
+
Index: boot/Makefile.common
===================================================================
--- boot/Makefile.common	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ boot/Makefile.common	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -134,5 +134,5 @@
 	$(USPACE_PATH)/app/top/top
 
-ifneq ($(CONFIG_BARE_BONED),y)
+ifneq ($(CONFIG_BAREBONE),y)
 NET_CFG = \
 	$(USPACE_PATH)/srv/net/cfg/general \
@@ -152,5 +152,5 @@
 -include arch/$(BARCH)/Makefile.inc
 
-ifeq ($(CONFIG_BARE_BONED),y)
+ifeq ($(CONFIG_BAREBONE),y)
 RD_SRVS = $(RD_SRVS_ESSENTIAL)
 RD_APPS = $(RD_APPS_ESSENTIAL)
Index: boot/arch/sparc64/src/main.c
===================================================================
--- boot/arch/sparc64/src/main.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ boot/arch/sparc64/src/main.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -101,5 +101,6 @@
 		 * an unknown value of the "compatible" property is encountered.
 		 */
-		printf("Warning: Unknown architecture, assuming sun4u.\n");
+		if (str_cmp(compatible, "sun4u") != 0)
+			printf("Warning: Unknown architecture, assuming sun4u.\n");
 		arch = ARCH_SUN4U;
 	} else
@@ -212,5 +213,5 @@
 	printf(" %p|%p: boot info structure\n", &bootinfo, bootinfo_pa);
 	printf(" %p|%p: kernel entry point\n", KERNEL_ADDRESS, kernel_address_pa);
-	printf(" %p|%p: loader entry pount\n", LOADER_ADDRESS, loader_address_pa);
+	printf(" %p|%p: loader entry point\n", LOADER_ADDRESS, loader_address_pa);
 	
 	size_t i;
Index: defaults/sparc64/serengeti/Makefile.config
===================================================================
--- defaults/sparc64/serengeti/Makefile.config	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ defaults/sparc64/serengeti/Makefile.config	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -9,3 +9,3 @@
 CONFIG_STRIP_BINARIES = y
 CONFIG_OPTIMIZE_FOR_SIZE = y
-CONFIG_BARE_BONED = y
+CONFIG_BAREBONE = y
Index: kernel/arch/abs32le/include/asm.h
===================================================================
--- kernel/arch/abs32le/include/asm.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/abs32le/include/asm.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -164,4 +164,11 @@
 }
 
+static inline bool interrupts_disabled(void)
+{
+	/* On real hardware the return value is true iff interrupts are
+	   disabled. */
+	return false;
+}
+
 static inline uintptr_t get_stack_base(void)
 {
Index: rnel/arch/abs32le/include/debug.h
===================================================================
--- kernel/arch/abs32le/include/debug.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,45 +1,0 @@
-/*
- * Copyright (c) 2010 Martin Decky
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/** @addtogroup abs32ledebug
- * @{
- */
-/** @file
- */
-
-#ifndef KERN_abs32le_DEBUG_H_
-#define KERN_abs32le_DEBUG_H_
-
-#include <arch/asm.h>
-
-#define HERE  get_ip()
-
-#endif
-
-/** @}
- */
Index: kernel/arch/amd64/include/asm.h
===================================================================
--- kernel/arch/amd64/include/asm.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/amd64/include/asm.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -38,4 +38,5 @@
 #include <config.h>
 #include <typedefs.h>
+#include <arch/cpu.h>
 
 extern void asm_delay_loop(uint32_t t);
@@ -269,4 +270,23 @@
 	return v;
 }
+
+/** Check interrupts state.
+ *
+ * @return True if interrupts are disabled.
+ *
+ */
+static inline bool interrupts_disabled(void)
+{
+	ipl_t v;
+	
+	asm volatile (
+		"pushfq\n"
+		"popq %[v]\n"
+		: [v] "=r" (v)
+	);
+	
+	return ((v & RFLAGS_IF) == 0);
+}
+
 
 /** Write to MSR */
Index: rnel/arch/amd64/include/debug.h
===================================================================
--- kernel/arch/amd64/include/debug.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,1 +1,0 @@
-../../ia32/include/debug.h
Index: rnel/arch/arm32/include/debug.h
===================================================================
--- kernel/arch/arm32/include/debug.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,42 +1,0 @@
-/*
- * Copyright (c) 2005 Jakub Jermar 
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/** @addtogroup arm32debug
- * @{
- */
-/** @file
- *  @brief Empty.
- */
-
-#ifndef KERN_arm32_DEBUG_H_
-#define KERN_arm32_DEBUG_H_
-
-#endif
-
-/** @}
- */
Index: kernel/arch/arm32/include/interrupt.h
===================================================================
--- kernel/arch/arm32/include/interrupt.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/arm32/include/interrupt.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -52,4 +52,5 @@
 extern void interrupts_restore(ipl_t ipl);
 extern ipl_t interrupts_read(void);
+extern bool interrupts_disabled(void);
 
 
Index: kernel/arch/arm32/src/interrupt.c
===================================================================
--- kernel/arch/arm32/src/interrupt.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/arm32/src/interrupt.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -97,4 +97,14 @@
 }
 
+/** Check interrupts state.
+ *
+ * @return True if interrupts are disabled.
+ *
+ */
+bool interrupts_disabled(void)
+{
+	return current_status_reg_read() & STATUS_REG_IRQ_DISABLED_BIT;
+}
+
 /** Initialize basic tables for exception dispatching
  * and starts the timer.
Index: kernel/arch/ia32/include/asm.h
===================================================================
--- kernel/arch/ia32/include/asm.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/ia32/include/asm.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -38,4 +38,5 @@
 
 #include <arch/pm.h>
+#include <arch/cpu.h>
 #include <typedefs.h>
 #include <config.h>
@@ -299,4 +300,22 @@
 }
 
+/** Check interrupts state.
+ *
+ * @return True if interrupts are disabled.
+ *
+ */
+static inline bool interrupts_disabled(void)
+{
+	ipl_t v;
+	
+	asm volatile (
+		"pushf\n"
+		"popl %[v]\n"
+		: [v] "=r" (v)
+	);
+	
+	return ((v & EFLAGS_IF) == 0);
+}
+
 /** Write to MSR */
 static inline void write_msr(uint32_t msr, uint64_t value)
Index: rnel/arch/ia32/include/debug.h
===================================================================
--- kernel/arch/ia32/include/debug.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,45 +1,0 @@
-/*
- * Copyright (c) 2005 Martin Decky
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/** @addtogroup amd64debug
- * @{
- */
-/** @file
- */
-
-#ifndef KERN_ia32_DEBUG_H_
-#define KERN_ia32_DEBUG_H_
-
-#include <arch/asm.h>
-
-#define HERE get_ip()
-
-#endif
-
-/** @}
- */
Index: kernel/arch/ia32/src/mm/frame.c
===================================================================
--- kernel/arch/ia32/src/mm/frame.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/ia32/src/mm/frame.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -55,4 +55,5 @@
 {
 	unsigned int i;
+
 	for (i = 0; i < e820counter; i++) {
 		uint64_t base = e820table[i].base_address;
@@ -60,5 +61,4 @@
 		
 #ifdef __32_BITS__
-		
 		/* Ignore physical memory above 4 GB */
 		if ((base >> 32) != 0)
@@ -68,6 +68,6 @@
 		if (((base + size) >> 32) != 0)
 			size = 0xffffffff - base;
-		
 #endif
+
 		pfn_t pfn;
 		size_t count;
@@ -118,5 +118,4 @@
 };
 
-
 void physmem_print(void)
 {
@@ -134,5 +133,5 @@
 		
 		printf("%#18llx %#18llx %s\n", e820table[i].base_address,
-			e820table[i].size, name);
+		    e820table[i].size, name);
 	}
 }
@@ -148,7 +147,8 @@
 #ifdef CONFIG_SMP
 		minconf = max(minconf,
-			ADDR2PFN(AP_BOOT_OFFSET + hardcoded_unmapped_ktext_size +
-			hardcoded_unmapped_kdata_size));
+		    ADDR2PFN(AP_BOOT_OFFSET + hardcoded_unmapped_ktext_size +
+		    hardcoded_unmapped_kdata_size));
 #endif
+
 		init_e820_memory(minconf);
 		
@@ -159,6 +159,6 @@
 		/* Reserve AP real mode bootstrap memory */
 		frame_mark_unavailable(AP_BOOT_OFFSET >> FRAME_WIDTH, 
-			(hardcoded_unmapped_ktext_size +
-			hardcoded_unmapped_kdata_size) >> FRAME_WIDTH);
+		    (hardcoded_unmapped_ktext_size +
+		    hardcoded_unmapped_kdata_size) >> FRAME_WIDTH);
 #endif
 	}
Index: kernel/arch/ia32/src/smp/apic.c
===================================================================
--- kernel/arch/ia32/src/smp/apic.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/ia32/src/smp/apic.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -426,5 +426,5 @@
 	
 	/* Program Logical Destination Register. */
-	ASSERT(CPU->id < 8)
+	ASSERT(CPU->id < 8);
 	ldr.value = l_apic[LDR];
 	ldr.id = (uint8_t) (1 << CPU->id);
Index: kernel/arch/ia64/include/asm.h
===================================================================
--- kernel/arch/ia64/include/asm.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/ia64/include/asm.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -417,4 +417,14 @@
 }
 
+/** Check interrupts state.
+ *
+ * @return True if interrupts are disabled.
+ *
+ */
+static inline bool interrupts_disabled(void)
+{
+	return !(psr_read() & PSR_I_MASK);
+}
+
 /** Disable protection key checking. */
 static inline void pk_disable(void)
Index: rnel/arch/ia64/include/debug.h
===================================================================
--- kernel/arch/ia64/include/debug.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,42 +1,0 @@
-/*
- * Copyright (c) 2005 Ondrej Palkovsky
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/** @addtogroup ia64debug ia64
- * @ingroup debug
- * @{
- */
-/** @file
- */
-
-#ifndef KERN_ia64_DEBUG_H_
-#define KERN_ia64_DEBUG_H_
-
-#endif
-
-/** @}
- */
Index: kernel/arch/mips32/include/asm.h
===================================================================
--- kernel/arch/mips32/include/asm.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/mips32/include/asm.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -74,5 +74,5 @@
 extern void interrupts_restore(ipl_t ipl);
 extern ipl_t interrupts_read(void);
-extern void asm_delay_loop(uint32_t t);
+extern bool interrupts_disabled(void);
 
 static inline void pio_write_8(ioport8_t *port, uint8_t v)
Index: kernel/arch/mips32/src/interrupt.c
===================================================================
--- kernel/arch/mips32/src/interrupt.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/mips32/src/interrupt.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -89,4 +89,14 @@
 }
 
+/** Check interrupts state.
+ *
+ * @return True if interrupts are disabled.
+ *
+ */
+bool interrupts_disabled(void)
+{
+	return !(cp0_status_read() & cp0_status_ie_enabled_bit);
+}
+
 /* TODO: This is SMP unsafe!!! */
 uint32_t count_hi = 0;
Index: kernel/arch/ppc32/include/asm.h
===================================================================
--- kernel/arch/ppc32/include/asm.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/ppc32/include/asm.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -38,4 +38,25 @@
 #include <typedefs.h>
 #include <config.h>
+#include <arch/cpu.h>
+
+static inline uint32_t msr_read(void)
+{
+	uint32_t msr;
+	
+	asm volatile (
+		"mfmsr %[msr]\n"
+		: [msr] "=r" (msr)
+	);
+	
+	return msr;
+}
+
+static inline void msr_write(uint32_t msr)
+{
+	asm volatile (
+		"mtmsr %[msr]\n"
+		:: [msr] "r" (msr)
+	);
+}
 
 /** Enable interrupts.
@@ -45,18 +66,11 @@
  *
  * @return Old interrupt priority level.
+ *
  */
 static inline ipl_t interrupts_enable(void)
 {
-	ipl_t v;
-	ipl_t tmp;
-	
-	asm volatile (
-		"mfmsr %0\n"
-		"mfmsr %1\n"
-		"ori %1, %1, 1 << 15\n"
-		"mtmsr %1\n"
-		: "=r" (v), "=r" (tmp)
-	);
-	return v;
+	ipl_t ipl = msr_read();
+	msr_write(ipl | MSR_EE);
+	return ipl;
 }
 
@@ -67,18 +81,11 @@
  *
  * @return Old interrupt priority level.
+ *
  */
 static inline ipl_t interrupts_disable(void)
 {
-	ipl_t v;
-	ipl_t tmp;
-	
-	asm volatile (
-		"mfmsr %0\n"
-		"mfmsr %1\n"
-		"rlwinm %1, %1, 0, 17, 15\n"
-		"mtmsr %1\n"
-		: "=r" (v), "=r" (tmp)
-	);
-	return v;
+	ipl_t ipl = msr_read();
+	msr_write(ipl & (~MSR_EE));
+	return ipl;
 }
 
@@ -88,20 +95,9 @@
  *
  * @param ipl Saved interrupt priority level.
+ *
  */
 static inline void interrupts_restore(ipl_t ipl)
 {
-	ipl_t tmp;
-	
-	asm volatile (
-		"mfmsr %1\n"
-		"rlwimi  %0, %1, 0, 17, 15\n"
-		"cmpw 0, %0, %1\n"
-		"beq 0f\n"
-		"mtmsr %0\n"
-		"0:\n"
-		: "=r" (ipl), "=r" (tmp)
-		: "0" (ipl)
-		: "cr0"
-	);
+	msr_write((msr_read() & (~MSR_EE)) | (ipl & MSR_EE));
 }
 
@@ -111,14 +107,19 @@
  *
  * @return Current interrupt priority level.
+ *
  */
 static inline ipl_t interrupts_read(void)
 {
-	ipl_t v;
-	
-	asm volatile (
-		"mfmsr %0\n"
-		: "=r" (v)
-	);
-	return v;
+	return msr_read();
+}
+
+/** Check whether interrupts are disabled.
+ *
+ * @return True if interrupts are disabled.
+ *
+ */
+static inline bool interrupts_disabled(void)
+{
+	return ((msr_read() & MSR_EE) == 0);
 }
 
@@ -128,15 +129,17 @@
  * The stack is assumed to be STACK_SIZE bytes long.
  * The stack must start on page boundary.
+ *
  */
 static inline uintptr_t get_stack_base(void)
 {
-	uintptr_t v;
+	uintptr_t base;
 	
 	asm volatile (
-		"and %0, %%sp, %1\n"
-		: "=r" (v)
-		: "r" (~(STACK_SIZE - 1))
+		"and %[base], %%sp, %[mask]\n"
+		: [base] "=r" (base)
+		: [mask] "r" (~(STACK_SIZE - 1))
 	);
-	return v;
+	
+	return base;
 }
 
Index: kernel/arch/ppc32/include/cpu.h
===================================================================
--- kernel/arch/ppc32/include/cpu.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/ppc32/include/cpu.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -36,11 +36,36 @@
 #define KERN_ppc32_CPU_H_
 
-#include <arch/asm.h>
+/* MSR bits */
+#define MSR_DR  (1 << 4)
+#define MSR_IR  (1 << 5)
+#define MSR_PR  (1 << 14)
+#define MSR_EE  (1 << 15)
+
+/* HID0 bits */
+#define HID0_STEN  (1 << 24)
+#define HID0_ICE   (1 << 15)
+#define HID0_DCE   (1 << 14)
+#define HID0_ICFI  (1 << 11)
+#define HID0_DCI   (1 << 10)
+
+#ifndef __ASM__
+
+#include <typedefs.h>
 
 typedef struct {
-	int version;
-	int revision;
-} cpu_arch_t;
-	
+	uint16_t version;
+	uint16_t revision;
+} __attribute__ ((packed)) cpu_arch_t;
+
+static inline void cpu_version(cpu_arch_t *info)
+{
+	asm volatile (
+		"mfpvr %[cpu_info]\n"
+		: [cpu_info] "=r" (*info)
+	);
+}
+
+#endif /* __ASM__ */
+
 #endif
 
Index: rnel/arch/ppc32/include/cpuid.h
===================================================================
--- kernel/arch/ppc32/include/cpuid.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,56 +1,0 @@
-/*
- * Copyright (c) 2006 Martin Decky
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/** @addtogroup ppc32
- * @{
- */
-/** @file
- */
-
-#ifndef KERN_ppc32_CPUID_H_
-#define KERN_ppc32_CPUID_H_
-
-#include <typedefs.h>
-
-typedef struct {
-	uint16_t version;
-	uint16_t revision;
-} __attribute__ ((packed)) cpu_info_t;
-
-static inline void cpu_version(cpu_info_t *info)
-{
-	asm volatile (
-		"mfpvr %0\n"
-		: "=r" (*info)
-	);
-}
-
-#endif
-
-/** @}
- */
Index: rnel/arch/ppc32/include/debug.h
===================================================================
--- kernel/arch/ppc32/include/debug.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,41 +1,0 @@
-/*
- * Copyright (c) 2005 
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/** @addtogroup ppc32debug
- * @{
- */
-/** @file
- */
-
-#ifndef KERN_ppc32_DEBUG_H_
-#define KERN_ppc32_DEBUG_H_
-
-#endif
-
-/** @}
- */
Index: kernel/arch/ppc32/src/cpu/cpu.c
===================================================================
--- kernel/arch/ppc32/src/cpu/cpu.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/ppc32/src/cpu/cpu.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -34,5 +34,4 @@
 
 #include <arch/cpu.h>
-#include <arch/cpuid.h>
 #include <cpu.h>
 #include <arch.h>
@@ -45,33 +44,30 @@
 void cpu_identify(void)
 {
-	cpu_info_t info;
-	
-	cpu_version(&info);
-	CPU->arch.version = info.version;
-	CPU->arch.revision = info.revision;
+	cpu_version(&CPU->arch);
 }
 
-void cpu_print_report(cpu_t *m)
+void cpu_print_report(cpu_t *cpu)
 {
 	const char *name;
 	
-	switch (m->arch.version) {
+	switch (cpu->arch.version) {
 		case 8:
-			name = " (PowerPC 750)";
+			name = "PowerPC 750";
 			break;
 		case 9:
-			name = " (PowerPC 604e)";
+			name = "PowerPC 604e";
 			break;
 		case 0x81:
-			name = " (PowerPC 8260)";
+			name = "PowerPC 8260";
 			break;
 		case 0x8081:
-			name = " (PowerPC 826xA)";
+			name = "PowerPC 826xA";
 			break;
 		default:
-			name = "";
+			name = "unknown";
 	}
 	
-	printf("cpu%d: version=%d%s, revision=%d\n", m->id, m->arch.version, name, m->arch.revision);
+	printf("cpu%" PRIs ": version=%" PRIu16" (%s), revision=%" PRIu16 "\n", cpu->id,
+	    cpu->arch.version, name, cpu->arch.revision);
 }
 
Index: kernel/arch/ppc32/src/debug/stacktrace.c
===================================================================
--- kernel/arch/ppc32/src/debug/stacktrace.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/ppc32/src/debug/stacktrace.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -37,22 +37,29 @@
 #include <typedefs.h>
 
+#define FRAME_OFFSET_FP_PREV  0
+#define FRAME_OFFSET_RA       1
+
 bool kernel_frame_pointer_validate(uintptr_t fp)
 {
-	return false;
+	return fp != 0;
 }
 
 bool kernel_frame_pointer_prev(uintptr_t fp, uintptr_t *prev)
 {
-	return false;
+	uint32_t *stack = (void *) fp;
+	*prev = stack[FRAME_OFFSET_FP_PREV];
+	return true;
 }
 
 bool kernel_return_address_get(uintptr_t fp, uintptr_t *ra)
 {
-	return false;
+	uint32_t *stack = (void *) fp;
+	*ra = stack[FRAME_OFFSET_RA];
+	return true;
 }
 
 bool uspace_frame_pointer_validate(uintptr_t fp)
 {
-	return false;
+	return fp != 0;
 }
 
Index: kernel/arch/ppc32/src/debug/stacktrace_asm.S
===================================================================
--- kernel/arch/ppc32/src/debug/stacktrace_asm.S	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/ppc32/src/debug/stacktrace_asm.S	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -27,4 +27,6 @@
 #
 
+#include <arch/asm/regname.h>
+
 .text
 
@@ -33,6 +35,8 @@
 
 frame_pointer_get:
+	mr r3, sp
 	blr
 
 program_counter_get:
+	mflr r3
 	blr
Index: kernel/arch/sparc64/include/asm.h
===================================================================
--- kernel/arch/sparc64/include/asm.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/arch/sparc64/include/asm.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -308,4 +308,17 @@
 }
 
+/** Check interrupts state.
+ *
+ * @return True if interrupts are disabled.
+ *
+ */
+static inline bool interrupts_disabled(void)
+{
+	pstate_reg_t pstate;
+
+	pstate.value = pstate_read();
+	return !pstate.ie;
+}
+
 /** Return base address of current stack.
  *
Index: rnel/arch/sparc64/include/debug.h
===================================================================
--- kernel/arch/sparc64/include/debug.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,41 +1,0 @@
-/*
- * Copyright (c) 2005 Jakub Jermar 
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/** @addtogroup sparc64debug
- * @{
- */
-/** @file
- */
-
-#ifndef KERN_sparc64_DEBUG_H_
-#define KERN_sparc64_DEBUG_H_
-
-#endif
-
-/** @}
- */
Index: rnel/doc/AUTHORS
===================================================================
--- kernel/doc/AUTHORS	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,12 +1,0 @@
-Jakub Jermar
-Martin Decky
-Ondrej Palkovsky
-Jiri Svoboda
-Jakub Vana
-Josef Cejka
-Michal Kebrt
-Sergey Bondari
-Pavel Jancik
-Petr Stepan
-Michal Konopa
-Vojtech Mencl
Index: rnel/doc/arch/amd64
===================================================================
--- kernel/doc/arch/amd64	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,35 +1,0 @@
-amd64 port
-==========
-
-The fifth port, amd64 port, was originally written by Ondrej Palkovsky.
-The goal is to support AMD64 and Intel Extended Memory 64 Technology PC's.
-The port makes use of portable parts of ia32.
-Both uniprocessors and multiprocessors are supported.
-The kernel runs on real hardware and in simulators too.
-
-HARDWARE REQUIREMENTS
-        o AMD64 architecture processor
-	o Intel Extended Memory 64 Technology processor
-
-CPU
-	o Intel Xeon with Intel Extended Memory 64 Technology
-	o AMD Athlon 64
-
-SMP COMPATIBILITY
-        o Bochs 2.2.1 - 2.2.6
-                o 2x-8x AMD64 CPU
-        o Simics 2.2.19
-                o 2x-15x AMD hammer CPU
-	o QEMU 0.8.0 - QEMU 0.8.1
-		o 2x-15x CPU
-	o HP ProLiant ML350 (HyperThreading)
-
-EMULATORS AND VIRTUALIZERS
-        o Bochs 2.2.6
-        o Simics 2.2.19
-	o QEMU 0.8.1
-
-TOOLCHAIN REQUIREMENTS
-	o binutils 2.16, 2.16.1
-	o gcc 4.0.1, 4.1.0, 4.1.1
-	o older versions may do as well, but are now obsoleted
Index: rnel/doc/arch/arm32
===================================================================
--- kernel/doc/arch/arm32	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,16 +1,0 @@
-arm32 port
-==========
-
-arm32 port is the ninth port of SPARTAN, originally written by Michal Kebrt,
-Petr Stepan, Pavel Jancik. The goal is to support 32-bit ARM architecture.
-So far, it runs only in emulator.
-
-HARDWARE REQUIREMENTS
-        o no real hardware supported
-
-EMULATORS AND VIRTUALIZERS
-        o GXemul
-
-TOOLCHAIN REQUIREMENTS
-	o binutils 2.17
-	o gcc 4.1.1
Index: rnel/doc/arch/ia32
===================================================================
--- kernel/doc/arch/ia32	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,40 +1,0 @@
-ia32 port
-=========
-
-ia32 port is the oldest and the most advanced one.
-It was originally written by Jakub Jermar.
-It is meant to support ordinary PC's based on IA-32 architecture.
-Both uniprocessor and multiprocessor modes are supported.
-It runs both in emulated environment and on real hardware.
-
-HARDWARE REQUIREMENTS
-        o IA-32 processor (Pentium and successors)
-
-SMP COMPATIBILITY
-        o Bochs 2.0.2 - Bochs 2.2.6
-                o 2x-8x 686 CPU
-        o Simics 2.0.28 - Simics 2.2.19
-                o 2x-15x Pentium 4 CPU
-	o VMware Workstation 5.5
-		o 2x CPU
-	o QEMU 0.8.0 - QEMU 0.8.1
-		o 2x-15x CPU
-        o ASUS P/I-P65UP5 + ASUS C-P55T2D REV. 1.41
-                o 2x 200Mhz Pentium CPU
-        o ASUS PCH-DL
-                o 2x 3000Mhz Pentium 4 Xeon (HT) CPU
-        o MSI K7D Master-L
-	        o 2x 2100MHz Athlon MP CPU
-	o ECS 865PE-A REV : 2.0
-		o 1x 2800MHz Pentium 4 Prescott (HT) CPU
-
-EMULATORS AND VIRTUALIZERS
-        o Bochs 2.0.2 - Bochs 2.2.6
-        o VMware Workstation 4, VMware Workstation 5, VMware Workstation 5.5
-        o Simics 2.2.19
-	o QEMU 0.8.0 - QEMU 0.8.1
-
-TOOLCHAIN REQUIREMENTS
-        o binutils 2.15, 2.16, 2.16.1
-	o gcc 3.3.5, 4.0.1, 4.1.0, 4.1.1
-        o older versions may do as well, but are now obsoleted
Index: rnel/doc/arch/ia64
===================================================================
--- kernel/doc/arch/ia64	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,16 +1,0 @@
-ia64 port
-=========
-
-ia64 port is the third port of SPARTAN originally written by Jakub Jermar.
-It is still in its early stages. It runs on HP Ski simulator of IA-64 architecture.
-
-HARDWARE REQUIREMENTS
-        o no real hardware supported
-
-EMULATORS AND VIRTUALIZERS
-        o ski
-
-TOOLCHAIN REQUIREMENTS
-        o binutils 2.15, 2.16, 2.16.1
-	o gcc 4.0.0, 4.0.1, 4.1.0, 4.1.1
-        o older versions may do as well, but are now obsoleted
Index: rnel/doc/arch/mips32
===================================================================
--- kernel/doc/arch/mips32	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,22 +1,0 @@
-mips32 port
-===========
-
-mips32 is the second port of SPARTAN kernel originally written by Jakub Jermar.
-It was first developed to run on MIPS R4000 32-bit simulator.
-It can be compiled and run either as little- or big-endian.
-
-HARDWARE REQUIREMENTS
-        o emulated MIPS 4K CPU
-
-CPU
-	o QED R4600
-
-EMULATORS AND VIRTUALIZERS
-	o msim 1.2.12
-        o gxemul - both big and little endian
-        o simics 2.2.19
-
-TOOLCHAIN REQUIREMENTS
-        o binutils 2.16, 2.16.1
-	o gcc 4.0.1, 4.1.0, 4.1.1
-        o older versions may do as well, but are now obsoleted
Index: rnel/doc/arch/ppc32
===================================================================
--- kernel/doc/arch/ppc32	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,15 +1,0 @@
-ppc32 port
-==========
-
-ppc32 port is the fourth port of SPARTAN, originally written by Martin Decky.
-The goal is to support 32-bit PowerPC architecture.
-
-HARDWARE REQUIREMENTS
-        o Apple iMac G4
-
-EMULATORS AND VIRTUALIZERS
-        o QEMU
-
-TOOLCHAIN REQUIREMENTS
-        o binutils 2.16
-        o gcc 4.0.1, 4.1.0, 4.1.1
Index: rnel/doc/arch/sparc64
===================================================================
--- kernel/doc/arch/sparc64	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,25 +1,0 @@
-sparc64 port
-============
-
-Currently, this porting effort is subject to
-Jakub Jermar's work on his master thesis.
-
-The goal is to provide support for UltraSPARC
-implementation of SPARC V9 architecture.
-
-MACHINES
-	o Sun Ultra 5
-	o Sun Ultra 60
-	o Sun Enterprise E6500 (simulated)
-		
-CPU
-	o UltraSPARC II
-	o UltraSPARC IIi
-
-SIMULATORS
-	o simics 2.2.19, simics 3.0.17, simics 3.0.21
-						
-TOOLCHAIN REQUIREMENTS
-	o binutils 2.17
-	o gcc 4.1.1
-	o older versions may do as well, but are now obsoleted
Index: rnel/doc/build
===================================================================
--- kernel/doc/build	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ 	(revision )
@@ -1,14 +1,0 @@
-Following make targets are supported:
-
-make, make all
-	- Check configuration, build
-
-make config
-	- Start kernel configuration program
-
-make clean
-	- Clean build temporary files
-
-make distclean
-	- Clean everything including configuration
-
Index: kernel/doc/synchronization
===================================================================
--- kernel/doc/synchronization	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/doc/synchronization	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -5,4 +5,14 @@
                                  | spinlock_t |
                                  +------------+
+                                       |
+                                       +------------------------------+
+                                                                      |
+                      INTERRUPTS-DISABLED SPINNING LOCKS              |
+       irq_spinlock_lock, irq_spinlock_trylock, irq_spinlock_unlock   |
+                               +----------------+                     |
+                               | irq_spinlock_t |<--------------------+
+                               +----------------+
+
+
 
                                    WAIT QUEUES
@@ -10,6 +20,6 @@
                                    +---------+
                                    | waitq_t |
-			           +---------+
-				  /           \
+                                   +---------+
+                                  /           \
                SEMAPHORES        /             \  CONDITION VARIABLES
  semaphore_down_timeout, semaphore_up    condvar_wait_timeout, condvar_signal
@@ -18,12 +28,12 @@
             +--------------+                         +-----------+
                    |                                       ^
-		   |                                       |
+                   |                                       |
                    |                                +------+
-                   V                               /           
+                   V                               /
                 MUTEXES                           / READERS/WRITERS LOCKS
     mutex_lock_timeout, mutex_unlock   rwlock_reader/writer_lock_timeout, rwlock_unlock
               +---------+                       /        +----------+
-	      | mutex_t |------------------------------->| rwlock_t |
-	      +---------+                     /          +----------+
-	           |                         /
-		   +------------------------+
+              | mutex_t |------------------------------->| rwlock_t |
+              +---------+                     /          +----------+
+                   |                         /
+                   +------------------------+
Index: kernel/generic/include/arch.h
===================================================================
--- kernel/generic/include/arch.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/include/arch.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup generic	
+/** @addtogroup generic
  * @{
  */
@@ -41,14 +41,14 @@
 #include <mm/as.h>
 
-#define DEFAULT_CONTEXT		0
+#define DEFAULT_CONTEXT  0
 
-#define CPU			THE->cpu
-#define THREAD			THE->thread
-#define TASK			THE->task
-#define AS			THE->as
-#define CONTEXT		(THE->task ? THE->task->context : DEFAULT_CONTEXT)
-#define PREEMPTION_DISABLED	THE->preemption_disabled
+#define CPU                  THE->cpu
+#define THREAD               THE->thread
+#define TASK                 THE->task
+#define AS                   THE->as
+#define CONTEXT              (THE->task ? THE->task->context : DEFAULT_CONTEXT)
+#define PREEMPTION_DISABLED  THE->preemption_disabled
 
-#define context_check(ctx1, ctx2)	((ctx1) == (ctx2))
+#define context_check(ctx1, ctx2)  ((ctx1) == (ctx2))
 
 /**
@@ -58,15 +58,15 @@
  */
 typedef struct {
-	size_t preemption_disabled;	/**< Preemption disabled counter. */
-	thread_t *thread;		/**< Current thread. */
-	task_t *task;			/**< Current task. */
-	cpu_t *cpu;			/**< Executing cpu. */
-	as_t *as;			/**< Current address space. */
+	size_t preemption_disabled;  /**< Preemption disabled counter. */
+	thread_t *thread;            /**< Current thread. */
+	task_t *task;                /**< Current task. */
+	cpu_t *cpu;                  /**< Executing cpu. */
+	as_t *as;                    /**< Current address space. */
 } the_t;
 
 #define THE  ((the_t * )(get_stack_base()))
 
-extern void the_initialize(the_t *the);
-extern void the_copy(the_t *src, the_t *dst);
+extern void the_initialize(the_t *);
+extern void the_copy(the_t *, the_t *);
 
 extern void arch_pre_mm_init(void);
@@ -80,5 +80,5 @@
 extern void reboot(void);
 extern void arch_reboot(void);
-extern void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller);
+extern void *arch_construct_function(fncptr_t *, void *, void *);
 
 #endif
Index: kernel/generic/include/debug.h
===================================================================
--- kernel/generic/include/debug.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/include/debug.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -37,12 +37,9 @@
 
 #include <panic.h>
-#include <arch/debug.h>
+#include <symtab.h>
 
-#define CALLER ((uintptr_t) __builtin_return_address(0))
+#define CALLER  ((uintptr_t) __builtin_return_address(0))
 
-#ifndef HERE
-/** Current Instruction Pointer address */
-#	define HERE ((uintptr_t *) 0)
-#endif
+#ifdef CONFIG_DEBUG
 
 /** Debugging ASSERT macro
@@ -55,12 +52,35 @@
  *
  */
-#ifdef CONFIG_DEBUG
-#	define ASSERT(expr) \
-		if (!(expr)) { \
-			panic("Assertion failed (%s), caller=%p.", #expr, CALLER); \
-		}
-#else
-#	define ASSERT(expr)
-#endif
+#define ASSERT(expr) \
+	do { \
+		if (!(expr)) \
+			panic("Assertion failed (%s)", #expr); \
+	} while (0)
+
+/** Debugging verbose ASSERT macro
+ *
+ * If CONFIG_DEBUG is set, the ASSERT() macro
+ * evaluates expr and if it is false raises
+ * kernel panic. The panic message contains also
+ * the supplied message.
+ *
+ * @param expr Expression which is expected to be true.
+ * @param msg  Additional message to show (string).
+ *
+ */
+#define ASSERT_VERBOSE(expr, msg) \
+	do { \
+		if (!(expr)) \
+			panic("Assertion failed (%s, %s)", #expr, msg); \
+	} while (0)
+
+#else /* CONFIG_DEBUG */
+
+#define ASSERT(expr)
+#define ASSERT_VERBOSE(expr, msg)
+
+#endif /* CONFIG_DEBUG */
+
+#ifdef CONFIG_LOG
 
 /** Extensive logging output macro
@@ -71,12 +91,9 @@
  *
  */
-
-#ifdef CONFIG_LOG
-#	define LOG(format, ...) \
-		printf("%s() at %s:%u: " format "\n", __func__, __FILE__, \
-		    __LINE__, ##__VA_ARGS__);
-#else
-#	define LOG(format, ...)
-#endif
+#define LOG(format, ...) \
+	do { \
+		printf("%s->%s() at %s:%u: " format "\n", symtab_fmt_name_lookup(CALLER), \
+		    __func__, __FILE__, __LINE__, ##__VA_ARGS__); \
+	} while (0)
 
 /** Extensive logging execute macro
@@ -87,16 +104,17 @@
  *
  */
+#define LOG_EXEC(fnc) \
+	do { \
+		printf("%s->%s() at %s:%u: " #fnc "\n", symtab_fmt_name_lookup(CALLER), \
+		    __func__, __FILE__, __LINE__); \
+		fnc; \
+	} while (0)
 
-#ifdef CONFIG_LOG
-#	define LOG_EXEC(fnc) \
-		{ \
-			printf("%s() at %s:%u: " #fnc "\n", __func__, __FILE__, \
-			    __LINE__); \
-			fnc; \
-		}
-#else
-#	define LOG_EXEC(fnc) fnc
-#endif
+#else /* CONFIG_LOG */
 
+#define LOG(format, ...)
+#define LOG_EXEC(fnc)     fnc
+
+#endif /* CONFOG_LOG */
 
 #endif
Index: kernel/generic/include/panic.h
===================================================================
--- kernel/generic/include/panic.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/include/panic.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -41,20 +41,25 @@
 
 #ifdef CONFIG_DEBUG
-#	define panic(format, ...) \
-		do { \
-			silent = false; \
-			printf("Kernel panic in %s() at %s:%u.\n", \
-			    __func__, __FILE__, __LINE__); \
-			stack_trace(); \
-			panic_printf("Panic message: " format "\n", \
-			    ##__VA_ARGS__);\
-		} while (0)
-#else
-#	define panic(format, ...) \
-		do { \
-			silent = false; \
-			panic_printf("Kernel panic: " format "\n", ##__VA_ARGS__); \
-		} while (0)
-#endif
+
+#define panic(format, ...) \
+	do { \
+		silent = false; \
+		printf("Kernel panic in %s() at %s:%u\n", \
+		    __func__, __FILE__, __LINE__); \
+		stack_trace(); \
+		panic_printf("Panic message: " format "\n", \
+		    ##__VA_ARGS__);\
+	} while (0)
+
+#else /* CONFIG_DEBUG */
+
+#define panic(format, ...) \
+	do { \
+		silent = false; \
+		panic_printf("Kernel panic: " format "\n", ##__VA_ARGS__); \
+		stack_trace(); \
+	} while (0)
+
+#endif /* CONFIG_DEBUG */
 
 extern bool silent;
Index: kernel/generic/include/preemption.h
===================================================================
--- kernel/generic/include/preemption.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/include/preemption.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup generic	
+/** @addtogroup generic
  * @{
  */
Index: kernel/generic/include/synch/spinlock.h
===================================================================
--- kernel/generic/include/synch/spinlock.h	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/include/synch/spinlock.h	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -41,4 +41,5 @@
 #include <atomic.h>
 #include <debug.h>
+#include <arch/asm.h>
 
 #ifdef CONFIG_SMP
@@ -49,5 +50,5 @@
 #ifdef CONFIG_DEBUG_SPINLOCK
 	const char *name;
-#endif
+#endif /* CONFIG_DEBUG_SPINLOCK */
 } spinlock_t;
 
@@ -60,6 +61,7 @@
 
 /*
- * SPINLOCK_INITIALIZE is to be used for statically allocated spinlocks.
- * It declares and initializes the lock.
+ * SPINLOCK_INITIALIZE and SPINLOCK_STATIC_INITIALIZE are to be used
+ * for statically allocated spinlocks. They declare (either as global
+ * or static) symbol and initialize the lock.
  */
 #ifdef CONFIG_DEBUG_SPINLOCK
@@ -77,8 +79,11 @@
 	}
 
-#define spinlock_lock(lock)	spinlock_lock_debug((lock))
-#define spinlock_unlock(lock)	spinlock_unlock_debug((lock))
-
-#else
+#define ASSERT_SPINLOCK(expr, lock) \
+	ASSERT_VERBOSE(expr, (lock)->name)
+
+#define spinlock_lock(lock)    spinlock_lock_debug((lock))
+#define spinlock_unlock(lock)  spinlock_unlock_debug((lock))
+
+#else /* CONFIG_DEBUG_SPINLOCK */
 
 #define SPINLOCK_INITIALIZE_NAME(lock_name, desc_name) \
@@ -92,8 +97,11 @@
 	}
 
-#define spinlock_lock(lock)	atomic_lock_arch(&(lock)->val)
-#define spinlock_unlock(lock)	spinlock_unlock_nondebug((lock))
-
-#endif
+#define ASSERT_SPINLOCK(expr, lock) \
+	ASSERT(expr)
+
+#define spinlock_lock(lock)    atomic_lock_arch(&(lock)->val)
+#define spinlock_unlock(lock)  spinlock_unlock_nondebug((lock))
+
+#endif /* CONFIG_DEBUG_SPINLOCK */
 
 #define SPINLOCK_INITIALIZE(lock_name) \
@@ -103,8 +111,8 @@
 	SPINLOCK_STATIC_INITIALIZE_NAME(lock_name, #lock_name)
 
-extern void spinlock_initialize(spinlock_t *lock, const char *name);
-extern int spinlock_trylock(spinlock_t *lock);
-extern void spinlock_lock_debug(spinlock_t *lock);
-extern void spinlock_unlock_debug(spinlock_t *lock);
+extern void spinlock_initialize(spinlock_t *, const char *);
+extern int spinlock_trylock(spinlock_t *);
+extern void spinlock_lock_debug(spinlock_t *);
+extern void spinlock_unlock_debug(spinlock_t *);
 
 /** Unlock spinlock
@@ -113,4 +121,5 @@
  *
  * @param sl Pointer to spinlock_t structure.
+ *
  */
 static inline void spinlock_unlock_nondebug(spinlock_t *lock)
@@ -141,10 +150,10 @@
 	}
 
-#else
+#else /* CONFIG_DEBUG_SPINLOCK */
 
 #define DEADLOCK_PROBE_INIT(pname)
 #define DEADLOCK_PROBE(pname, value)
 
-#endif
+#endif /* CONFIG_DEBUG_SPINLOCK */
 
 #else /* CONFIG_SMP */
@@ -160,4 +169,6 @@
 #define SPINLOCK_INITIALIZE_NAME(name, desc_name)
 #define SPINLOCK_STATIC_INITIALIZE_NAME(name, desc_name)
+
+#define ASSERT_SPINLOCK(expr, lock)
 
 #define spinlock_initialize(lock, name)
@@ -170,8 +181,249 @@
 #define DEADLOCK_PROBE(pname, value)
 
+#endif /* CONFIG_SMP */
+
+typedef struct {
+	SPINLOCK_DECLARE(lock);  /**< Spinlock */
+	bool guard;              /**< Flag whether ipl is valid */
+	ipl_t ipl;               /**< Original interrupt level */
+} irq_spinlock_t;
+
+#define IRQ_SPINLOCK_DECLARE(lock_name)  irq_spinlock_t lock_name
+#define IRQ_SPINLOCK_EXTERN(lock_name)   extern irq_spinlock_t lock_name
+
+#ifdef CONFIG_SMP
+
+#define ASSERT_IRQ_SPINLOCK(expr, irq_lock) \
+	ASSERT_SPINLOCK(expr, &((irq_lock)->lock))
+
+/*
+ * IRQ_SPINLOCK_INITIALIZE and IRQ_SPINLOCK_STATIC_INITIALIZE are to be used
+ * for statically allocated interrupts-disabled spinlocks. They declare (either
+ * as global or static symbol) and initialize the lock.
+ */
+#ifdef CONFIG_DEBUG_SPINLOCK
+
+#define IRQ_SPINLOCK_INITIALIZE_NAME(lock_name, desc_name) \
+	irq_spinlock_t lock_name = { \
+		.lock = { \
+			.name = desc_name, \
+			.val = { 0 } \
+		}, \
+		.guard = false, \
+		.ipl = 0 \
+	}
+
+#define IRQ_SPINLOCK_STATIC_INITIALIZE_NAME(lock_name, desc_name) \
+	static irq_spinlock_t lock_name = { \
+		.lock = { \
+			.name = desc_name, \
+			.val = { 0 } \
+		}, \
+		.guard = false, \
+		.ipl = 0 \
+	}
+
+#else /* CONFIG_DEBUG_SPINLOCK */
+
+#define IRQ_SPINLOCK_INITIALIZE_NAME(lock_name, desc_name) \
+	irq_spinlock_t lock_name = { \
+		.lock = { \
+			.val = { 0 } \
+		}, \
+		.guard = false, \
+		.ipl = 0 \
+	}
+
+#define IRQ_SPINLOCK_STATIC_INITIALIZE_NAME(lock_name, desc_name) \
+	static irq_spinlock_t lock_name = { \
+		.lock = { \
+			.val = { 0 } \
+		}, \
+		.guard = false, \
+		.ipl = 0 \
+	}
+
+#endif /* CONFIG_DEBUG_SPINLOCK */
+
+#else /* CONFIG_SMP */
+
+/*
+ * Since the spinlocks are void on UP systems, we also need
+ * to have a special variant of interrupts-disabled spinlock
+ * macros which take this into account.
+ */
+
+#define ASSERT_IRQ_SPINLOCK(expr, irq_lock) \
+	ASSERT_SPINLOCK(expr, NULL)
+
+#define IRQ_SPINLOCK_INITIALIZE_NAME(lock_name, desc_name) \
+	irq_spinlock_t lock_name = { \
+		.guard = false, \
+		.ipl = 0 \
+	}
+
+#define IRQ_SPINLOCK_STATIC_INITIALIZE_NAME(lock_name, desc_name) \
+	static irq_spinlock_t lock_name = { \
+		.guard = false, \
+		.ipl = 0 \
+	}
+
+#endif /* CONFIG_SMP */
+
+#define IRQ_SPINLOCK_INITIALIZE(lock_name) \
+	IRQ_SPINLOCK_INITIALIZE_NAME(lock_name, #lock_name)
+
+#define IRQ_SPINLOCK_STATIC_INITIALIZE(lock_name) \
+	IRQ_SPINLOCK_STATIC_INITIALIZE_NAME(lock_name, #lock_name)
+
+/** Initialize interrupts-disabled spinlock
+ *
+ * @param lock IRQ spinlock to be initialized.
+ * @param name IRQ spinlock name.
+ *
+ */
+static inline void irq_spinlock_initialize(irq_spinlock_t *lock, const char *name)
+{
+	spinlock_initialize(&(lock->lock), name);
+	lock->guard = false;
+	lock->ipl = 0;
+}
+
+/** Lock interrupts-disabled spinlock
+ *
+ * Lock a spinlock which requires disabled interrupts.
+ *
+ * @param lock    IRQ spinlock to be locked.
+ * @param irq_dis If true, interrupts are actually disabled
+ *                prior locking the spinlock. If false, interrupts
+ *                are expected to be already disabled.
+ *
+ */
+static inline void irq_spinlock_lock(irq_spinlock_t *lock, bool irq_dis)
+{
+	if (irq_dis) {
+		ipl_t ipl = interrupts_disable();
+		spinlock_lock(&(lock->lock));
+		
+		lock->guard = true;
+		lock->ipl = ipl;
+	} else {
+		ASSERT_IRQ_SPINLOCK(interrupts_disabled(), lock);
+		
+		spinlock_lock(&(lock->lock));
+		ASSERT_IRQ_SPINLOCK(!lock->guard, lock);
+	}
+}
+
+/** Unlock interrupts-disabled spinlock
+ *
+ * Unlock a spinlock which requires disabled interrupts.
+ *
+ * @param lock    IRQ spinlock to be unlocked.
+ * @param irq_res If true, interrupts are restored to previously
+ *                saved interrupt level.
+ *
+ */
+static inline void irq_spinlock_unlock(irq_spinlock_t *lock, bool irq_res)
+{
+	ASSERT_IRQ_SPINLOCK(interrupts_disabled(), lock);
+	
+	if (irq_res) {
+		ASSERT_IRQ_SPINLOCK(lock->guard, lock);
+		
+		lock->guard = false;
+		ipl_t ipl = lock->ipl;
+		
+		spinlock_unlock(&(lock->lock));
+		interrupts_restore(ipl);
+	} else {
+		ASSERT_IRQ_SPINLOCK(!lock->guard, lock);
+		spinlock_unlock(&(lock->lock));
+	}
+}
+
+/** Lock interrupts-disabled spinlock
+ *
+ * Lock an interrupts-disabled spinlock conditionally. If the
+ * spinlock is not available at the moment, signal failure.
+ * Interrupts are expected to be already disabled.
+ *
+ * @param lock IRQ spinlock to be locked conditionally.
+ *
+ * @return Zero on failure, non-zero otherwise.
+ *
+ */
+static inline int irq_spinlock_trylock(irq_spinlock_t *lock)
+{
+	ASSERT_IRQ_SPINLOCK(interrupts_disabled(), lock);
+	int rc = spinlock_trylock(&(lock->lock));
+	
+	ASSERT_IRQ_SPINLOCK(!lock->guard, lock);
+	return rc;
+}
+
+/** Pass lock from one interrupts-disabled spinlock to another
+ *
+ * Pass lock from one IRQ spinlock to another IRQ spinlock
+ * without enabling interrupts during the process.
+ *
+ * The first IRQ spinlock is supposed to be locked.
+ *
+ * @param unlock IRQ spinlock to be unlocked.
+ * @param lock   IRQ spinlock to be locked.
+ *
+ */
+static inline void irq_spinlock_pass(irq_spinlock_t *unlock,
+    irq_spinlock_t *lock)
+{
+	ASSERT_IRQ_SPINLOCK(interrupts_disabled(), unlock);
+	
+	/* Pass guard from unlock to lock */
+	bool guard = unlock->guard;
+	ipl_t ipl = unlock->ipl;
+	unlock->guard = false;
+	
+	spinlock_unlock(&(unlock->lock));
+	spinlock_lock(&(lock->lock));
+	
+	ASSERT_IRQ_SPINLOCK(!lock->guard, lock);
+	
+	if (guard) {
+		lock->guard = true;
+		lock->ipl = ipl;
+	}
+}
+
+/** Hand-over-hand locking of interrupts-disabled spinlocks
+ *
+ * Implement hand-over-hand locking between two interrupts-disabled
+ * spinlocks without enabling interrupts during the process.
+ *
+ * The first IRQ spinlock is supposed to be locked.
+ *
+ * @param unlock IRQ spinlock to be unlocked.
+ * @param lock   IRQ spinlock to be locked.
+ *
+ */
+static inline void irq_spinlock_exchange(irq_spinlock_t *unlock,
+    irq_spinlock_t *lock)
+{
+	ASSERT_IRQ_SPINLOCK(interrupts_disabled(), unlock);
+	
+	spinlock_lock(&(lock->lock));
+	ASSERT_IRQ_SPINLOCK(!lock->guard, lock);
+	
+	/* Pass guard from unlock to lock */
+	if (unlock->guard) {
+		lock->guard = true;
+		lock->ipl = unlock->ipl;
+		unlock->guard = false;
+	}
+	
+	spinlock_unlock(&(unlock->lock));
+}
+
 #endif
 
-#endif
-
 /** @}
  */
Index: kernel/generic/src/ipc/kbox.c
===================================================================
--- kernel/generic/src/ipc/kbox.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/src/ipc/kbox.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -47,5 +47,4 @@
 void ipc_kbox_cleanup(void)
 {
-	ipl_t ipl;
 	bool have_kb_thread;
 
@@ -78,10 +77,8 @@
 	 * kbox thread to clean it up since sender != debugger.
 	 */
-	ipl = interrupts_disable();
-	spinlock_lock(&TASK->lock);
+	mutex_lock(&TASK->udebug.lock);
 	udebug_task_cleanup(TASK);
-	spinlock_unlock(&TASK->lock);
-	interrupts_restore(ipl);
-	
+	mutex_unlock(&TASK->udebug.lock);
+
 	if (have_kb_thread) {
 		LOG("Join kb.thread.");
Index: kernel/generic/src/mm/as.c
===================================================================
--- kernel/generic/src/mm/as.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/src/mm/as.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -422,4 +422,6 @@
 		 * No need to check for overlaps.
 		 */
+
+		page_table_lock(as, false);
 
 		/*
@@ -486,5 +488,4 @@
 					pte_t *pte;
 			
-					page_table_lock(as, false);
 					pte = page_mapping_find(as, b +
 					    i * PAGE_SIZE);
@@ -499,5 +500,4 @@
 					page_mapping_remove(as, b +
 					    i * PAGE_SIZE);
-					page_table_unlock(as, false);
 				}
 			}
@@ -510,4 +510,5 @@
 		tlb_invalidate_pages(as->asid, area->base + pages * PAGE_SIZE,
 		    area->pages - pages);
+
 		/*
 		 * Invalidate software translation caches (e.g. TSB on sparc64).
@@ -516,4 +517,6 @@
 		    pages * PAGE_SIZE, area->pages - pages);
 		tlb_shootdown_finalize();
+
+		page_table_unlock(as, false);
 		
 	} else {
@@ -565,4 +568,6 @@
 
 	base = area->base;
+
+	page_table_lock(as, false);
 
 	/*
@@ -586,5 +591,4 @@
 			
 			for (j = 0; j < (size_t) node->value[i]; j++) {
-				page_table_lock(as, false);
 				pte = page_mapping_find(as, b + j * PAGE_SIZE);
 				ASSERT(pte && PTE_VALID(pte) &&
@@ -596,5 +600,4 @@
 				}
 				page_mapping_remove(as, b + j * PAGE_SIZE);				
-				page_table_unlock(as, false);
 			}
 		}
@@ -606,4 +609,5 @@
 
 	tlb_invalidate_pages(as->asid, area->base, area->pages);
+
 	/*
 	 * Invalidate potential software translation caches (e.g. TSB on
@@ -612,4 +616,6 @@
 	as_invalidate_translation_cache(as, area->base, area->pages);
 	tlb_shootdown_finalize();
+
+	page_table_unlock(as, false);
 	
 	btree_destroy(&area->used_space);
@@ -858,4 +864,6 @@
 	old_frame = malloc(used_pages * sizeof(uintptr_t), 0);
 
+	page_table_lock(as, false);
+
 	/*
 	 * Start TLB shootdown sequence.
@@ -881,5 +889,4 @@
 			
 			for (j = 0; j < (size_t) node->value[i]; j++) {
-				page_table_lock(as, false);
 				pte = page_mapping_find(as, b + j * PAGE_SIZE);
 				ASSERT(pte && PTE_VALID(pte) &&
@@ -889,5 +896,4 @@
 				/* Remove old mapping */
 				page_mapping_remove(as, b + j * PAGE_SIZE);
-				page_table_unlock(as, false);
 			}
 		}
@@ -906,4 +912,6 @@
 	as_invalidate_translation_cache(as, area->base, area->pages);
 	tlb_shootdown_finalize();
+
+	page_table_unlock(as, false);
 
 	/*
Index: kernel/generic/src/preempt/preemption.c
===================================================================
--- kernel/generic/src/preempt/preemption.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/src/preempt/preemption.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -27,13 +27,13 @@
  */
 
-/** @addtogroup generic	
+/** @addtogroup generic
  * @{
  */
 
 /**
- * @file	preemption.c
- * @brief	Preemption control.
+ * @file preemption.c
+ * @brief Preemption control.
  */
- 
+
 #include <preemption.h>
 #include <arch.h>
@@ -52,5 +52,5 @@
 void preemption_enable(void)
 {
-	ASSERT(THE->preemption_disabled);
+	ASSERT(PREEMPTION_DISABLED);
 	memory_barrier();
 	THE->preemption_disabled--;
Index: kernel/generic/src/synch/mutex.c
===================================================================
--- kernel/generic/src/synch/mutex.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/src/synch/mutex.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -33,7 +33,7 @@
 /**
  * @file
- * @brief	Mutexes.
+ * @brief Mutexes.
  */
- 
+
 #include <synch/mutex.h>
 #include <synch/semaphore.h>
@@ -44,6 +44,6 @@
 /** Initialize mutex.
  *
- * @param mtx		Mutex.
- * @param type		Type of the mutex.
+ * @param mtx  Mutex.
+ * @param type Type of the mutex.
  */
 void mutex_initialize(mutex_t *mtx, mutex_type_t type)
@@ -57,12 +57,13 @@
  * Timeout mode and non-blocking mode can be requested.
  *
- * @param mtx		Mutex.
- * @param usec		Timeout in microseconds.
- * @param flags		Specify mode of operation.
+ * @param mtx   Mutex.
+ * @param usec  Timeout in microseconds.
+ * @param flags Specify mode of operation.
  *
  * For exact description of possible combinations of
  * usec and flags, see comment for waitq_sleep_timeout().
  *
- * @return		See comment for waitq_sleep_timeout().
+ * @return See comment for waitq_sleep_timeout().
+ *
  */
 int _mutex_lock_timeout(mutex_t *mtx, uint32_t usec, int flags)
@@ -70,10 +71,11 @@
 	int rc;
 
-	if (mtx->type == MUTEX_PASSIVE && THREAD) {
+	if ((mtx->type == MUTEX_PASSIVE) && (THREAD)) {
 		rc = _semaphore_down_timeout(&mtx->sem, usec, flags);
 	} else {
-		ASSERT(mtx->type == MUTEX_ACTIVE || !THREAD);
+		ASSERT((mtx->type == MUTEX_ACTIVE) || (!THREAD));
 		ASSERT(usec == SYNCH_NO_TIMEOUT);
 		ASSERT(!(flags & SYNCH_FLAGS_INTERRUPTIBLE));
+		
 		do {
 			rc = semaphore_trydown(&mtx->sem);
@@ -87,5 +89,5 @@
 /** Release mutex.
  *
- * @param mtx		Mutex.
+ * @param mtx Mutex.
  */
 void mutex_unlock(mutex_t *mtx)
Index: kernel/generic/src/synch/spinlock.c
===================================================================
--- kernel/generic/src/synch/spinlock.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/src/synch/spinlock.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -128,5 +128,5 @@
 void spinlock_unlock_debug(spinlock_t *lock)
 {
-	ASSERT(atomic_get(&lock->val) != 0);
+	ASSERT_SPINLOCK(atomic_get(&lock->val) != 0, lock);
 	
 	/*
@@ -143,7 +143,6 @@
 /** Lock spinlock conditionally
  *
- * Lock spinlock conditionally.
- * If the spinlock is not available at the moment,
- * signal failure.
+ * Lock spinlock conditionally. If the spinlock is not available
+ * at the moment, signal failure.
  *
  * @param lock Pointer to spinlock_t structure.
Index: kernel/generic/src/synch/waitq.c
===================================================================
--- kernel/generic/src/synch/waitq.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/src/synch/waitq.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -261,5 +261,5 @@
 	int rc;
 
-	ASSERT(!PREEMPTION_DISABLED || PARAM_NON_BLOCKING(flags, usec));
+	ASSERT((!PREEMPTION_DISABLED) || (PARAM_NON_BLOCKING(flags, usec)));
 	
 	ipl = waitq_sleep_prepare(wq);
Index: kernel/generic/src/time/clock.c
===================================================================
--- kernel/generic/src/time/clock.c	(revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc)
+++ kernel/generic/src/time/clock.c	(revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3)
@@ -195,5 +195,5 @@
 		spinlock_unlock(&THREAD->lock);
 		
-		if (!ticks && !PREEMPTION_DISABLED) {
+		if ((!ticks) && (!PREEMPTION_DISABLED)) {
 #ifdef CONFIG_UDEBUG
 			istate_t *istate;
