Changeset 7cb53f62 in mainline


Ignore:
Timestamp:
2006-02-26T12:02:25Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
4767721
Parents:
7a255e69
Message:

sparc64 work.
Switch console to framebuffer (needs proper detection and initialization).
No native keyboard support, so far.
Memory management trap handler fixes.
Do not use OpenFirmware trap table anymore.

Location:
arch/sparc64
Files:
13 edited

Legend:

Unmodified
Added
Removed

  • arch/sparc64/Makefile.inc

    r7a255e69 r7cb53f62  
    5858CONFIG_ASID_FIFO = y
    5959
     60CONFIG_FB = y
     61
    6062ARCH_SOURCES = \
    6163        arch/$(ARCH)/src/cpu/cpu.c \

  • arch/sparc64/include/asm.h

    r7a255e69 r7cb53f62  
    250250}
    251251
     252/** Read Trap Level register.
     253 *
     254 * @return Current value in TL.
     255 */
     256static inline __u64 tl_read(void)
     257{
     258        __u64 v;
     259       
     260        __asm__ volatile ("rdpr %%tl, %0\n" : "=r" (v));
     261       
     262        return v;
     263}
    252264
    253265/** Write Trap Base Address register.

  • arch/sparc64/include/barrier.h

    r7a255e69 r7cb53f62  
    4848         * However, JPS1 implementations are free to ignore the trap.
    4949         */
    50         __asm__ volatile ("flush %sp\n");
     50         
     51        /*
     52         * %i7 should provide address that is always mapped in DTLB
     53         * as it is a pointer to kernel code.
     54         */
     55        __asm__ volatile ("flush %i7\n");
    5156}
    5257

  • arch/sparc64/include/console.h

    r7a255e69 r7cb53f62  
    3030#define __sparc64_CONSOLE_H__
    3131
    32 extern void kofwinput(void *arg);
    33 extern void ofw_sparc64_console_init(void);
     32extern void fb_sparc64_console_init(void);
    3433
    3534#endif

  • arch/sparc64/include/trap/exception.h

    r7a255e69 r7cb53f62  
    3131
    3232#define TT_INSTRUCTION_ACCESS_EXCEPTION         0x08
     33#define TT_ILLEGAL_INSTRUCTION                  0x10
    3334#define TT_MEM_ADDRESS_NOT_ALIGNED              0x34
    3435
    … …  
    3637extern void do_instruction_access_exc(void);
    3738extern void do_mem_address_not_aligned(void);
     39extern void do_illegal_instruction(void);
    3840#endif /* !__ASM__ */
    3941

  • arch/sparc64/include/trap/mmu.h

    r7a255e69 r7cb53f62  
    3434#define __sparc64_MMU_TRAP_H__
    3535
     36#include <arch/stack.h>
     37
    3638#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS     0x64
    3739#define TT_FAST_DATA_ACCESS_MMU_MISS            0x68
    … …  
    4244#ifdef __ASM__
    4345.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
     46        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
    4447        call fast_instruction_access_mmu_miss
    4548        nop
     49        restore
    4650        retry   
    4751.endm
    4852
    4953.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER
     54        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
    5055        call fast_data_access_mmu_miss
    5156        nop
     57        restore
    5258        retry
    5359.endm
    5460
    5561.macro FAST_DATA_ACCESS_PROTECTION_HANDLER
     62        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
    5663        call fast_data_access_protection
    5764        nop
     65        restore
    5866        retry
    5967.endm

  • arch/sparc64/include/trap/trap.h

    r7a255e69 r7cb53f62  
    4141
    4242extern void trap_init(void);
    43 extern void trap_install_handler(index_t tt, size_t len, bool tlnonz);
    4443
    4544#endif

  • arch/sparc64/src/console.c

    r7a255e69 r7cb53f62  
    2828
    2929#include <arch/console.h>
    30 #include <genarch/ofw/ofw.h>
    31 #include <console/chardev.h>
    32 #include <console/console.h>
    33 #include <arch/asm.h>
    34 #include <arch/register.h>
    3530#include <arch/types.h>
    3631#include <typedefs.h>
    37 #include <proc/thread.h>
    38 #include <synch/mutex.h>
     32#include <genarch/fb/fb.h>
     33#include <arch/drivers/fb.h>
    3934
    40 static void ofw_sparc64_putchar(chardev_t *d, const char ch);
    41 static char ofw_sparc64_getchar(chardev_t *d);
    42 static void ofw_sparc64_suspend(chardev_t *d);
    43 static void ofw_sparc64_resume(chardev_t *d);
    44 
    45 mutex_t canwork;
    46 
    47 static chardev_t ofw_sparc64_console;
    48 static chardev_operations_t ofw_sparc64_console_ops = {
    49         .write = ofw_sparc64_putchar,
    50         .read = ofw_sparc64_getchar,
    51         .resume = ofw_sparc64_resume,
    52         .suspend = ofw_sparc64_suspend
    53 };
    54 
    55 void ofw_sparc64_console_init(void)
     35void fb_sparc64_console_init(void)
    5636{
    57         chardev_initialize("ofw_sparc64_console", &ofw_sparc64_console, &ofw_sparc64_console_ops);
    58         stdin = &ofw_sparc64_console;
    59         stdout = &ofw_sparc64_console;
    60         mutex_initialize(&canwork);
     37        fb_init(FB_VIRT_ADDRESS, FB_X_RES, FB_Y_RES, FB_COLOR_DEPTH/8);
    6138}
    62 
    63 /** Write one character.
    64  *
    65  * @param d Character device (ignored).
    66  * @param ch Character to be written.
    67  */
    68 void ofw_sparc64_putchar(chardev_t *d, const char ch)
    69 {
    70         pstate_reg_t pstate;
    71 
    72         /*
    73          * 32-bit OpenFirmware depends on PSTATE.AM bit set.
    74          */     
    75         pstate.value = pstate_read();
    76         pstate.am = true;
    77         pstate_write(pstate.value);
    78 
    79         if (ch == '\n')
    80                 ofw_putchar('\r');
    81         ofw_putchar(ch);
    82        
    83         pstate.am = false;
    84         pstate_write(pstate.value);
    85 }
    86 
    87 /** Read one character.
    88  *
    89  * The call is non-blocking.
    90  *
    91  * @param d Character device (ignored).
    92  * @return Character read or zero if no character was read.
    93  */
    94 char ofw_sparc64_getchar(chardev_t *d)
    95 {
    96         char ch;
    97         pstate_reg_t pstate;
    98 
    99         /*
    100          * 32-bit OpenFirmware depends on PSTATE.AM bit set.
    101          */     
    102         pstate.value = pstate_read();
    103         pstate.am = true;
    104         pstate_write(pstate.value);
    105 
    106         ch = ofw_getchar();
    107        
    108         pstate.am = false;
    109         pstate_write(pstate.value);
    110        
    111         return ch;
    112 }
    113 
    114 void ofw_sparc64_suspend(chardev_t *d)
    115 {
    116         mutex_lock(&canwork);
    117 }
    118 
    119 void ofw_sparc64_resume(chardev_t *d)
    120 {
    121         mutex_unlock(&canwork);
    122 }
    123 
    124 /** Kernel thread for pushing characters read from OFW to input buffer.
    125  *
    126  * @param arg Ignored.
    127  */
    128 void kofwinput(void *arg)
    129 {
    130 
    131         while (1) {
    132                 char ch = 0;
    133                
    134                 mutex_lock(&canwork);
    135                 mutex_unlock(&canwork);
    136                
    137                 ch = ofw_sparc64_getchar(NULL);
    138                 if (ch) {
    139                         if (ch == '\r')
    140                                 ch = '\n';
    141                         chardev_push_character(&ofw_sparc64_console, ch);
    142                 }
    143                 thread_usleep(25000);
    144         }
    145 }

  • arch/sparc64/src/mm/tlb.c

    r7a255e69 r7cb53f62  
    4141#include <arch/asm.h>
    4242#include <symtab.h>
     43#include <arch/drivers/fb.h>
    4344
    4445char *context_encoding[] = {
    … …  
    111112         * Quick hack: map frame buffer
    112113         */
    113         fr.address = 0x1C901000000ULL;
    114         pg.address = 0xc0000000;
     114        fr.address = FB_PHYS_ADDRESS;
     115        pg.address = FB_VIRT_ADDRESS;
    115116
    116117        tag.value = ASID_KERNEL;
    … …  
    131132
    132133        dtlb_data_in_write(data.value);
    133 
    134134}
    135135
    … …  
    147147        __address tpc;
    148148        char *tpc_str;
    149        
     149
    150150        tag.value = dtlb_tag_access_read();
    151151        if (tag.context != ASID_KERNEL || tag.vpn == 0) {

  • arch/sparc64/src/sparc64.c

    r7a255e69 r7cb53f62  
    3737{
    3838        interrupts_disable();
    39         ofw_sparc64_console_init();
    4039        trap_init();
    4140        tick_init();
    … …  
    4443void arch_post_mm_init(void)
    4544{
     45        fb_sparc64_console_init();
    4646}
    4747
    … …  
    5252void arch_post_smp_init(void)
    5353{
    54         thread_t *t;
    55        
    56         /*
    57          * Create thread that reads characters from OFW's input.
    58          */
    59         t = thread_create(kofwinput, NULL, TASK, 0);
    60         if (!t)
    61                 panic("cannot create kofwinput\n");
    62         thread_ready(t);
    6354}
    6455

  • arch/sparc64/src/trap/exception.c

    r7a255e69 r7cb53f62  
    2828
    2929#include <arch/trap/exception.h>
     30#include <arch/asm.h>
    3031#include <debug.h>
    3132
    … …  
    4142        panic("Memory Address Not Aligned\n");
    4243}
     44
     45/** Handle mem_address_not_aligned. */
     46void do_illegal_instruction(void)
     47{
     48        panic("Illegal Instruction: %P\n", tpc_read());
     49}

  • arch/sparc64/src/trap/trap.c

    r7a255e69 r7cb53f62  
    4343void trap_init(void)
    4444{
    45         /*
    46          * Save kernel provided trap handlers.
    47          */
    48         memcpy((void *) trap_table_save, (void *) trap_table, TRAP_TABLE_SIZE);
    49 
    50         /*
    51          * Copy OFW's trap table into kernel.
    52          */
    53         memcpy((void *) trap_table, (void *) tba_read(), TRAP_TABLE_SIZE);
    54        
    55         /*
    56          * Install kernel-provided handlers.
    57          */
    58         trap_install_handler(TT_INSTRUCTION_ACCESS_EXCEPTION, TRAP_TABLE_ENTRY_SIZE, false);
    59         trap_install_handler(TT_CLEAN_WINDOW, CLEAN_WINDOW_HANDLER_SIZE, false);
    60         trap_install_handler(TT_MEM_ADDRESS_NOT_ALIGNED, TRAP_TABLE_ENTRY_SIZE, false);
    61         trap_install_handler(TT_SPILL_0_NORMAL, SPILL_HANDLER_SIZE, false);
    62         trap_install_handler(TT_FILL_0_NORMAL, FILL_HANDLER_SIZE, false);
    63         trap_install_handler(TT_INSTRUCTION_ACCESS_EXCEPTION, TRAP_TABLE_ENTRY_SIZE, true);
    64         trap_install_handler(TT_CLEAN_WINDOW, CLEAN_WINDOW_HANDLER_SIZE, true);
    65         trap_install_handler(TT_MEM_ADDRESS_NOT_ALIGNED, TRAP_TABLE_ENTRY_SIZE, true);
    66         trap_install_handler(TT_SPILL_0_NORMAL, SPILL_HANDLER_SIZE, true);
    67         trap_install_handler(TT_FILL_0_NORMAL, FILL_HANDLER_SIZE, true);
    68         trap_install_handler(TT_INTERRUPT_LEVEL_1, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    69         trap_install_handler(TT_INTERRUPT_LEVEL_2, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    70         trap_install_handler(TT_INTERRUPT_LEVEL_3, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    71         trap_install_handler(TT_INTERRUPT_LEVEL_4, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    72         trap_install_handler(TT_INTERRUPT_LEVEL_5, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    73         trap_install_handler(TT_INTERRUPT_LEVEL_6, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    74         trap_install_handler(TT_INTERRUPT_LEVEL_7, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    75         trap_install_handler(TT_INTERRUPT_LEVEL_8, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    76         trap_install_handler(TT_INTERRUPT_LEVEL_9, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    77         trap_install_handler(TT_INTERRUPT_LEVEL_10, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    78         trap_install_handler(TT_INTERRUPT_LEVEL_11, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    79         trap_install_handler(TT_INTERRUPT_LEVEL_12, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    80         trap_install_handler(TT_INTERRUPT_LEVEL_13, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    81         trap_install_handler(TT_INTERRUPT_LEVEL_14, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    82         trap_install_handler(TT_INTERRUPT_LEVEL_15, INTERRUPT_LEVEL_N_HANDLER_SIZE, false);
    83         trap_install_handler(TT_INTERRUPT_VECTOR_TRAP, INTERRUPT_VECTOR_TRAP_HANDLER_SIZE, false);
    84 
    85         /*
    86          * Kernel must become independent on Open Firmware calls before MMU handlers are enabled.
    87          */
    88 /*
    89         trap_install_handler(TT_FAST_INSTRUCTION_ACCESS_MMU_MISS, FAST_MMU_HANDLER_SIZE, false);
    90         trap_install_handler(TT_FAST_DATA_ACCESS_MMU_MISS, FAST_MMU_HANDLER_SIZE, false);
    91         trap_install_handler(TT_FAST_DATA_ACCESS_PROTECTION, FAST_MMU_HANDLER_SIZE, false);
    92         trap_install_handler(TT_FAST_INSTRUCTION_ACCESS_MMU_MISS, FAST_MMU_HANDLER_SIZE, true);
    93         trap_install_handler(TT_FAST_DATA_ACCESS_MMU_MISS, FAST_MMU_HANDLER_SIZE, true);
    94         trap_install_handler(TT_FAST_DATA_ACCESS_PROTECTION, FAST_MMU_HANDLER_SIZE, true);
    95 */
    96 
    9745}
    98 
    99 /** Copy trap handler to active trap table.
    100  *
    101  * The handler is copied from trap_table_kernel to trap_handler.
    102  *
    103  * @param tt Trap type. An index that uniquelly identifies handler code.
    104  * @param len Length of the handler in bytes. Must be multiple of TRAP_TABLE_ENTRY_SIZE (i.e. 32).
    105  * @param tlnonz If false, tt is considered from the lower half of trap table. If true, the upper half is chosen.
    106  */
    107 void trap_install_handler(index_t tt, size_t len, bool tlnonz)
    108 {
    109         count_t cnt;
    110         int i;
    111 
    112         ASSERT(tt < TRAP_TABLE_ENTRY_COUNT/2);
    113         ASSERT(len % TRAP_TABLE_ENTRY_SIZE == 0);
    114 
    115         if (tlnonz)
    116                 tt += TRAP_TABLE_ENTRY_COUNT/2;
    117 
    118         cnt = len/TRAP_TABLE_ENTRY_SIZE;
    119        
    120         for (i = tt; i < tt + cnt; i++) {
    121                 trap_table[i] = trap_table_save[i];
    122         }       
    123 }

  • arch/sparc64/src/trap/trap_table.S

    r7a255e69 r7cb53f62  
    2828
    2929/**
    30  * This file contains two trap tables.
    31  * First, trap_table, is the one wich contains handlers implemented by
    32  * kernel. During initialization, these handlers are copied out to
    33  * the second trap table, trap_table_save, and the first table is
    34  * overwritten with copy of OFW's own trap table. The copy is then patched
    35  * from the trap_table_save.
    36  *
    37  * This arrangement is beneficial because kernel handlers stay on their
    38  * link-time addresses which is good for debugging.
     30 * This file contains kernel trap table.
    3931 */
    4032
    … …  
    6961        SIMPLE_HANDLER do_instruction_access_exc
    7062
     63/* TT = 0x10, TL = 0, illegal_instruction */
     64.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
     65.global illegal_instruction
     66illegal_instruction:
     67        SIMPLE_HANDLER do_illegal_instruction
     68
    7169/* TT = 0x24, TL = 0, clean_window handler */
    7270.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
    … …  
    217215        SIMPLE_HANDLER do_instruction_access_exc
    218216
     217/* TT = 0x10, TL > 0, illegal_instruction */
     218.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
     219.global illegal_instruction_high
     220illegal_instruction_high:
     221        SIMPLE_HANDLER do_illegal_instruction
     222
    219223/* TT = 0x24, TL > 0, clean_window handler */
    220224.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
    … …  
    258262fill_0_normal_high:
    259263        FILL_NORMAL_HANDLER
    260 
    261 
    262 
    263 /*
    264  * Save trap table.
    265  */
    266 .align TABLE_SIZE
    267 .global trap_table_save
    268 trap_table_save:
    269         .space TABLE_SIZE, 0
    270264
    271265
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