Changeset 7cb567cd in mainline for kernel/arch/ppc64/src/mm/page.c


Ignore:
Timestamp:
2007-04-08T20:52:53Z (18 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e5dbbe5
Parents:
328f324b
Message:

map kernel pages explicitly as writable (this solves compatibility issues with Intel Core 2)
make VESA framebuffer initialization more robust

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ppc64/src/mm/page.c

    r328f324b r7cb567cd  
    265265                int flags;
    266266               
    267                 /* Frames below 128 MB are mapped using BAT,
    268                    map rest of the physical memory */
    269267                for (cur = 128 << 20; cur < last_frame; cur += FRAME_SIZE) {
    270                         flags = PAGE_CACHEABLE;
     268                        flags = PAGE_CACHEABLE | PAGE_WRITE;
    271269                        if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size))
    272270                                flags |= PAGE_GLOBAL;
     
    297295        pfn_t i;
    298296        for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
    299                 page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE);
     297                page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE | PAGE_WRITE);
    300298       
    301299        last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
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