Changeset 7cd7a8d in mainline for uspace/lib/sif/src/sif.c

Timestamp:

2018-08-02T20:38:05Z (6 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

9b7adc38

Parents:

0c27956

git-author:

Jakub Jermar <jakub@…> (2018-08-01 22:48:10)

git-committer:

Jakub Jermar <jakub@…> (2018-08-02 20:38:05)

Message:

Preserve AR.FPSR in thread context

AR.FPSR is a preserved register so it should be part of the thread
context, leaving its extra copy in istate_t rather for debugging
purposes.

In this commit we also disable all IEEE FP traps and the
Denormal/Unnormal Operand Floating-Point Exception fault for each new
thread context, leaving the thread with the possibility to change this
setting later in uspace.

(No files)