Changeset 7d3d641 in mainline


Ignore:
Timestamp:
2006-08-01T20:45:26Z (18 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
5b23a82
Parents:
3e5cc686
Message:

xen32: initialize virtual IDT

Location:
kernel/arch/xen32
Files:
10 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/xen32/include/asm.h

    r3e5cc686 r7d3d641  
    273273}
    274274
    275 /** Load IDTR register from memory.
    276  *
    277  * @param idtr_reg Address of memory from where to load IDTR.
    278  */
    279 static inline void idtr_load(ptr_16_32_t *idtr_reg)
    280 {
    281         __asm__ volatile ("lidtl %0\n" : : "m" (*idtr_reg));
    282 }
    283 
    284275/** Load TR from descriptor table.
    285276 *
  • kernel/arch/xen32/include/boot/boot.h

    r3e5cc686 r7d3d641  
    4141
    4242#define BOOT_OFFSET             0x0000
     43#define TEMP_STACK_SIZE 0x1000
     44
    4345#define XEN_VIRT_START  0xFC000000
    44 
    45 #define TEMP_STACK_SIZE 0x1000
     46#define XEN_CS                  0xe019
    4647
    4748#ifndef __ASM__
  • kernel/arch/xen32/include/hypercall.h

    r3e5cc686 r7d3d641  
    3737
    3838
     39typedef struct {
     40        uint8_t vector;     /**< Exception vector */
     41        uint8_t flags;      /**< 0-3: privilege level; 4: clear event enable */
     42        uint16_t cs;        /**< Code selector */
     43        uintptr_t address;  /**< Code offset */
     44} trap_info_t;
     45
     46
     47#define XEN_SET_TRAP_TABLE              0
    3948#define XEN_MMU_UPDATE                  1
     49#define XEN_SET_CALLBACKS               4
    4050#define XEN_UPDATE_VA_MAPPING   14
    4151#define XEN_CONSOLE_IO                  18
     
    199209}
    200210
     211static inline int xen_set_callbacks(const unsigned int event_selector, const void *event_address, const unsigned int failsafe_selector, void *failsafe_address)
     212{
     213        return hypercall4(XEN_SET_CALLBACKS, event_selector, event_address, failsafe_selector, failsafe_address);
     214}
     215
     216static inline int xen_set_trap_table(const trap_info_t *table)
     217{
     218        return hypercall1(XEN_SET_TRAP_TABLE, table);
     219}
     220
    201221#endif
  • kernel/arch/xen32/include/pm.h

    r3e5cc686 r7d3d641  
    9393typedef struct descriptor  descriptor_t;
    9494
    95 struct idescriptor {
    96         unsigned offset_0_15: 16;
    97         unsigned selector: 16;
    98         unsigned unused: 8;
    99         unsigned access: 8;
    100         unsigned offset_16_31: 16;
    101 } __attribute__ ((packed));
    102 typedef struct idescriptor idescriptor_t;
    103 
    10495struct tss {
    10596        uint16_t link;
     
    157148extern void gdt_setlimit(descriptor_t *d, uint32_t limit);
    158149
    159 extern void idt_init(void);
    160 extern void idt_setoffset(idescriptor_t *d, uintptr_t offset);
     150extern void traps_init(void);
    161151
    162152extern void tss_initialize(tss_t *t);
  • kernel/arch/xen32/src/asm.S

    r3e5cc686 r7d3d641  
    3535.text
    3636
     37.global xen_callback
     38.global xen_failsafe_callback
    3739.global enable_l_apic_in_msr
    3840.global interrupt_handlers
     
    4244.global memcpy_to_uspace
    4345.global memcpy_to_uspace_failover_address
     46
     47
     48xen_callback:
     49        iret
     50
     51xen_failsafe_callback:
     52        iret
    4453
    4554
  • kernel/arch/xen32/src/pm.c

    r3e5cc686 r7d3d641  
    7676};
    7777
    78 static idescriptor_t idt[IDT_ITEMS];
     78static trap_info_t traps[IDT_ITEMS + 1];
    7979
    8080static tss_t tss;
     
    9999}
    100100
    101 void idt_setoffset(idescriptor_t *d, uintptr_t offset)
    102 {
    103         /*
    104          * Offset is a linear address.
    105          */
    106         d->offset_0_15 = offset & 0xffff;
    107         d->offset_16_31 = offset >> 16;
    108 }
    109 
    110101void tss_initialize(tss_t *t)
    111102{
     
    113104}
    114105
    115 /*
    116  * This function takes care of proper setup of IDT and IDTR.
    117  */
    118 void idt_init(void)
    119 {
    120         idescriptor_t *d;
    121         int i;
    122 
     106void traps_init(void)
     107{
     108        index_t i;
     109       
    123110        for (i = 0; i < IDT_ITEMS; i++) {
    124                 d = &idt[i];
    125 
    126                 d->unused = 0;
    127                 d->selector = selector(KTEXT_DES);
    128 
    129                 d->access = AR_PRESENT | AR_INTERRUPT;  /* masking interrupt */
    130 
    131                 if (i == VECTOR_SYSCALL) {
    132                         /*
    133                          * The syscall interrupt gate must be calleable from userland.
    134                          */
    135                         d->access |= DPL_USER;
    136                 }
     111                traps[i].vector = i;
    137112               
    138                 idt_setoffset(d, ((uintptr_t) interrupt_handlers) + i*interrupt_handler_size);
     113                if (i == VECTOR_SYSCALL)
     114                        traps[i].flags = 3;
     115                else
     116                        traps[i].flags = 0;
     117               
     118                traps[i].cs = XEN_CS;
     119                traps[i].address = ((uintptr_t) interrupt_handlers) + i * interrupt_handler_size;
    139120                exc_register(i, "undef", (iroutine) null_interrupt);
    140121        }
     122        traps[IDT_ITEMS].vector = 0;
     123        traps[IDT_ITEMS].flags = 0;
     124        traps[IDT_ITEMS].cs = 0;
     125        traps[IDT_ITEMS].address = NULL;
     126       
    141127        exc_register(13, "gp_fault", (iroutine) gp_fault);
    142128        exc_register( 7, "nm_fault", (iroutine) nm_fault);
     
    173159{
    174160        descriptor_t *gdt_p = (descriptor_t *) gdtr.base;
    175         ptr_16_32_t idtr;
    176 
    177         /*
    178          * Update addresses in GDT and IDT to their virtual counterparts.
    179          */
    180         idtr.limit = sizeof(idt);
    181         idtr.base = (uintptr_t) idt;
     161
    182162//      gdtr_load(&gdtr);
    183 //      idtr_load(&idtr);
    184        
    185         /*
    186          * Each CPU has its private GDT and TSS.
    187          * All CPUs share one IDT.
    188          */
    189 
    190 //      if (config.cpu_active == 1) {
    191 //              idt_init();
    192 //              /*
    193 //               * NOTE: bootstrap CPU has statically allocated TSS, because
    194 //               * the heap hasn't been initialized so far.
    195 //               */
     163       
     164        if (config.cpu_active == 1) {
     165                traps_init();
     166                xen_set_trap_table(traps);
     167                /*
     168                 * NOTE: bootstrap CPU has statically allocated TSS, because
     169                 * the heap hasn't been initialized so far.
     170                 */
    196171                tss_p = &tss;
    197 //      }
    198 //      else {
    199 //              tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
    200 //              if (!tss_p)
    201 //                      panic("could not allocate TSS\n");
    202 //      }
     172        } else {
     173                tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
     174                if (!tss_p)
     175                        panic("could not allocate TSS\n");
     176        }
    203177
    204178//      tss_initialize(tss_p);
  • kernel/arch/xen32/src/proc/scheduler.c

    r3e5cc686 r7d3d641  
    2727 */
    2828
    29  /** @addtogroup ia32proc
     29/** @addtogroup xen32proc
    3030 * @{
    3131 */
     
    7878}
    7979
    80  /** @}
     80/** @}
    8181 */
    82 
  • kernel/arch/xen32/src/proc/task.c

    r3e5cc686 r7d3d641  
    2727 */
    2828
    29  /** @addtogroup ia32proc
     29/** @addtogroup xen32proc
    3030 * @{
    3131 */
     
    5858}
    5959
    60  /** @}
     60/** @}
    6161 */
    62 
  • kernel/arch/xen32/src/proc/thread.c

    r3e5cc686 r7d3d641  
    2727 */
    2828
    29  /** @addtogroup ia32proc
     29/** @addtogroup xen32proc
    3030 * @{
    3131 */
     
    3535#include <proc/thread.h>
    3636
    37 /** Perform ia32 specific thread initialization.
     37/** Perform xen32 specific thread initialization.
    3838 *
    3939 * @param t Thread to be initialized.
     
    4444}
    4545
    46  /** @}
     46/** @}
    4747 */
    48 
  • kernel/arch/xen32/src/xen32.c

    r3e5cc686 r7d3d641  
    6565memzone_t meminfo;
    6666
     67extern void xen_callback(void);
     68extern void xen_failsafe_callback(void);
     69
    6770void arch_pre_main(void)
    6871{
     
    7679        pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info);
    7780        xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG);
     81       
     82        xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback);
    7883       
    7984        /* Create identity mapping */
     
    117122//              bios_init();
    118123               
    119 //              exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall);
     124                exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall);
    120125               
    121126                #ifdef CONFIG_SMP
    122 //              exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
    123 //                           (iroutine) tlb_shootdown_ipi);
     127                exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
     128                             (iroutine) tlb_shootdown_ipi);
    124129                #endif /* CONFIG_SMP */
    125130        }
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