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  • uspace/drv/ohci/ohci_regs.h

    r2c617b0 r7d6a676  
    3939typedef struct ohci_regs
    4040{
    41         const volatile uint32_t revision;
     41        volatile uint32_t revision;
    4242        volatile uint32_t control;
    43 #define C_CSBR_MASK (0x3)
    44 #define C_CSBR_SHIFT (0)
    45 #define C_PLE (1 << 2)
    46 #define C_IE (1 << 3)
    47 #define C_CLE (1 << 4)
    48 #define C_BLE (1 << 5)
    49 
    50 #define C_HCFS_MASK (0x3)
    51 #define C_HCFS_SHIFT (6)
    52 #define C_HCFS_RESET (0x0)
    53 #define C_HCFS_OPERATIONAL (0x1)
    54 #define C_HCFS_RESUME (0x2)
    55 #define C_HCFS_SUSPEND (0x3)
    56 
    57 #define C_IR (1 << 8)
    58 #define C_RWC (1 << 9)
    59 #define C_RWE (1 << 10)
    60 
    6143        volatile uint32_t command_status;
    62 #define CS_HCR (1 << 0)
    63 #define CS_CLF (1 << 1)
    64 #define CS_BLF (1 << 2)
    65 #define CS_OCR (1 << 3)
    66 #define CS_SOC_MASK (0x3)
    67 #define CS_SOC_SHIFT (16)
    68 
    6944        volatile uint32_t interrupt_status;
    7045#define IS_SO (1 << 0)
     
    7651#define IS_RHSC (1 << 6)
    7752#define IS_OC (1 << 30)
    78 
    7953        volatile uint32_t interupt_enable;
    8054#define IE_SO   (1 << 0)
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