Index: kernel/arch/sparc64/src/mm/tlb.c
===================================================================
--- kernel/arch/sparc64/src/mm/tlb.c	(revision 92778f2136ec900a873b76c69db8efbdb1998fea)
+++ kernel/arch/sparc64/src/mm/tlb.c	(revision 7e7c8747752c7ffe6c991792c4afdde7b1128b58)
@@ -58,7 +58,10 @@
 static void dtlb_pte_copy(pte_t *t, bool ro);
 static void itlb_pte_copy(pte_t *t);
-static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str);
-static void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str);
-static void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str);
+static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const
+	char *str);
+static void do_fast_data_access_mmu_miss_fault(istate_t *istate,
+	 tlb_tag_access_reg_t tag, const char *str);
+static void do_fast_data_access_protection_fault(istate_t *istate,
+	tlb_tag_access_reg_t tag, const char *str);
 
 char *context_encoding[] = {
@@ -91,5 +94,6 @@
  * @param cacheable True if the mapping is cacheable, false otherwise.
  */
-void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable)
+void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool
+	locked, bool cacheable)
 {
 	tlb_tag_access_reg_t tag;
@@ -125,5 +129,6 @@
  *
  * @param t Page Table Entry to be copied.
- * @param ro If true, the entry will be created read-only, regardless of its w field.
+ * @param ro If true, the entry will be created read-only, regardless of its w
+ * 	field.
  */
 void dtlb_pte_copy(pte_t *t, bool ro)
@@ -213,9 +218,11 @@
 	} else {
 		/*
-		 * Forward the page fault to the address space page fault handler.
+		 * Forward the page fault to the address space page fault
+		 * handler.
 		 */		
 		page_table_unlock(AS, true);
 		if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
-			do_fast_instruction_access_mmu_miss_fault(istate, __FUNCTION__);
+			do_fast_instruction_access_mmu_miss_fault(istate,
+				__FUNCTION__);
 		}
 	}
@@ -224,7 +231,6 @@
 /** DTLB miss handler.
  *
- * Note that some faults (e.g. kernel faults) were already resolved
- * by the low-level, assembly language part of the fast_data_access_mmu_miss
- * handler.
+ * Note that some faults (e.g. kernel faults) were already resolved by the
+ * low-level, assembly language part of the fast_data_access_mmu_miss handler.
  */
 void fast_data_access_mmu_miss(int n, istate_t *istate)
@@ -240,7 +246,9 @@
 		if (!tag.vpn) {
 			/* NULL access in kernel */
-			do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__);
-		}
-		do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected kernel page fault.");
+			do_fast_data_access_mmu_miss_fault(istate, tag,
+				__FUNCTION__);
+		}
+		do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected "
+			"kernel page fault.");
 	}
 
@@ -264,5 +272,6 @@
 		page_table_unlock(AS, true);
 		if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
-			do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__);
+			do_fast_data_access_mmu_miss_fault(istate, tag,
+				__FUNCTION__);
 		}
 	}
@@ -283,6 +292,7 @@
 	if (t && PTE_WRITABLE(t)) {
 		/*
-		 * The mapping was found in the software page hash table and is writable.
-		 * Demap the old mapping and insert an updated mapping into DTLB.
+		 * The mapping was found in the software page hash table and is
+		 * writable. Demap the old mapping and insert an updated mapping
+		 * into DTLB.
 		 */
 		t->a = true;
@@ -296,9 +306,11 @@
 	} else {
 		/*
-		 * Forward the page fault to the address space page fault handler.
+		 * Forward the page fault to the address space page fault
+		 * handler.
 		 */		
 		page_table_unlock(AS, true);
 		if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) {
-			do_fast_data_access_protection_fault(istate, tag, __FUNCTION__);
+			do_fast_data_access_protection_fault(istate, tag,
+				__FUNCTION__);
 		}
 	}
@@ -317,6 +329,9 @@
 		t.value = itlb_tag_read_read(i);
 		
-		printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
-			i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
+		printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
+			"ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, "
+			"cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
+			t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag,
+			d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
 	}
 
@@ -326,11 +341,15 @@
 		t.value = dtlb_tag_read_read(i);
 		
-		printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
-			i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
-	}
-
-}
-
-void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str)
+		printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
+			"ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, "
+			"cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
+			t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag,
+			d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
+	}
+
+}
+
+void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char
+	*str)
 {
 	fault_if_from_uspace(istate, "%s\n", str);
@@ -339,5 +358,6 @@
 }
 
-void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str)
+void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t
+	tag, const char *str)
 {
 	uintptr_t va;
@@ -345,5 +365,6 @@
 	va = tag.vpn << PAGE_WIDTH;
 
-	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context);
+	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va,
+		tag.context);
 	dump_istate(istate);
 	printf("Faulting page: %p, ASID=%d\n", va, tag.context);
@@ -351,5 +372,6 @@
 }
 
-void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str)
+void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t
+	tag, const char *str)
 {
 	uintptr_t va;
@@ -357,5 +379,6 @@
 	va = tag.vpn << PAGE_WIDTH;
 
-	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context);
+	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va,
+		tag.context);
 	printf("Faulting page: %p, ASID=%d\n", va, tag.context);
 	dump_istate(istate);
@@ -371,6 +394,7 @@
 	sfar = dtlb_sfar_read();
 	
-	printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, fv=%d\n",
-		sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv);
+	printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, "
+		"fv=%d\n", sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w,
+		sfsr.ow, sfsr.fv);
 	printf("DTLB SFAR: address=%p\n", sfar);
 	
@@ -407,5 +431,6 @@
 }
 
-/** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context).
+/** Invalidate all ITLB and DTLB entries that belong to specified ASID
+ * (Context).
  *
  * @param asid Address Space ID.
@@ -430,5 +455,6 @@
 }
 
-/** Invalidate all ITLB and DTLB entries for specified page range in specified address space.
+/** Invalidate all ITLB and DTLB entries for specified page range in specified
+ * address space.
  *
  * @param asid Address Space ID.
@@ -449,6 +475,8 @@
 	
 	for (i = 0; i < cnt; i++) {
-		itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE);
-		dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE);
+		itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i *
+			PAGE_SIZE);
+		dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i *
+			PAGE_SIZE);
 	}
 	
