Changeset 7f1c620 in mainline for arch/ia32/src/smp/apic.c
- Timestamp:
- 2006-07-04T17:17:56Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 0ffa3ef5
- Parents:
- 991779c5
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia32/src/smp/apic.c
r991779c5 r7f1c620 68 68 * always be 32-bit, would use byte oriented instructions. 69 69 */ 70 volatile __u32 *l_apic = (__u32*) 0xfee00000;71 volatile __u32 *io_apic = (__u32*) 0xfec00000;72 73 __u32apic_id_mask = 0;70 volatile uint32_t *l_apic = (uint32_t *) 0xfee00000; 71 volatile uint32_t *io_apic = (uint32_t *) 0xfec00000; 72 73 uint32_t apic_id_mask = 0; 74 74 75 75 static int apic_poll_errors(void); … … 219 219 * @return 0 on failure, 1 on success. 220 220 */ 221 int l_apic_broadcast_custom_ipi( __u8vector)221 int l_apic_broadcast_custom_ipi(uint8_t vector) 222 222 { 223 223 icr_t icr; … … 249 249 * @return 0 on failure, 1 on success. 250 250 */ 251 int l_apic_send_init_ipi( __u8apicid)251 int l_apic_send_init_ipi(uint8_t apicid) 252 252 { 253 253 icr_t icr; … … 306 306 for (i = 0; i<2; i++) { 307 307 icr.lo = l_apic[ICRlo]; 308 icr.vector = (( __address) ap_boot) / 4096; /* calculate the reset vector */308 icr.vector = ((uintptr_t) ap_boot) / 4096; /* calculate the reset vector */ 309 309 icr.delmod = DELMOD_STARTUP; 310 310 icr.destmod = DESTMOD_PHYS; … … 332 332 ldr_t ldr; 333 333 dfr_t dfr; 334 __u32t1, t2;334 uint32_t t1, t2; 335 335 336 336 /* Initialize LVT Error register. */ … … 456 456 * @return Local APIC ID. 457 457 */ 458 __u8l_apic_id(void)458 uint8_t l_apic_id(void) 459 459 { 460 460 l_apic_id_t idreg; … … 470 470 * @return Content of the addressed IO APIC register. 471 471 */ 472 __u32 io_apic_read(__u8address)472 uint32_t io_apic_read(uint8_t address) 473 473 { 474 474 io_regsel_t regsel; … … 485 485 * @param x Content to be written to the addressed IO APIC register. 486 486 */ 487 void io_apic_write( __u8 address, __u32x)487 void io_apic_write(uint8_t address, uint32_t x) 488 488 { 489 489 io_regsel_t regsel; … … 502 502 * @param flags Flags. 503 503 */ 504 void io_apic_change_ioredtbl(int pin, int dest, __u8v, int flags)504 void io_apic_change_ioredtbl(int pin, int dest, uint8_t v, int flags) 505 505 { 506 506 io_redirection_reg_t reg; … … 528 528 * @param irqmask Bitmask of IRQs to be masked (0 = do not mask, 1 = mask). 529 529 */ 530 void io_apic_disable_irqs( __u16irqmask)530 void io_apic_disable_irqs(uint16_t irqmask) 531 531 { 532 532 io_redirection_reg_t reg; … … 554 554 * @param irqmask Bitmask of IRQs to be unmasked (0 = do not unmask, 1 = unmask). 555 555 */ 556 void io_apic_enable_irqs( __u16irqmask)556 void io_apic_enable_irqs(uint16_t irqmask) 557 557 { 558 558 int i, pin;
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