Changeset 7f1c620 in mainline for arch/ia64/include/asm.h


Ignore:
Timestamp:
2006-07-04T17:17:56Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
0ffa3ef5
Parents:
991779c5
Message:

Replace old u?? types with respective C99 variants (e.g. uint32_t, int64_t, uintptr_t etc.).

File:
1 edited

Legend:

Unmodified
Added
Removed

  • arch/ia64/include/asm.h

    r991779c5 r7f1c620  
    4646 * The stack must start on page boundary.
    4747 */
    48 static inline __address get_stack_base(void)
    49 {
    50         __u64 v;
     48static inline uintptr_t get_stack_base(void)
     49{
     50        uint64_t v;
    5151
    5252        __asm__ volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
    … …  
    5959 * @return PSR.
    6060 */
    61 static inline __u64 psr_read(void)
    62 {
    63         __u64 v;
     61static inline uint64_t psr_read(void)
     62{
     63        uint64_t v;
    6464       
    6565        __asm__ volatile ("mov %0 = psr\n" : "=r" (v));
    … …  
    7272 * @return Return location of interruption vector table.
    7373 */
    74 static inline __u64 iva_read(void)
    75 {
    76         __u64 v;
     74static inline uint64_t iva_read(void)
     75{
     76        uint64_t v;
    7777       
    7878        __asm__ volatile ("mov %0 = cr.iva\n" : "=r" (v));
    … …  
    8585 * @param v New location of interruption vector table.
    8686 */
    87 static inline void iva_write(__u64 v)
     87static inline void iva_write(uint64_t v)
    8888{
    8989        __asm__ volatile ("mov cr.iva = %0\n" : : "r" (v));
    … …  
    9595 * @return Highest priority, pending, unmasked external interrupt vector.
    9696 */
    97 static inline __u64 ivr_read(void)
    98 {
    99         __u64 v;
     97static inline uint64_t ivr_read(void)
     98{
     99        uint64_t v;
    100100       
    101101        __asm__ volatile ("mov %0 = cr.ivr\n" : "=r" (v));
    … …  
    108108 * @param v New counter value.
    109109 */
    110 static inline void itc_write(__u64 v)
     110static inline void itc_write(uint64_t v)
    111111{
    112112        __asm__ volatile ("mov ar.itc = %0\n" : : "r" (v));
    … …  
    117117 * @return Current counter value.
    118118 */
    119 static inline __u64 itc_read(void)
    120 {
    121         __u64 v;
     119static inline uint64_t itc_read(void)
     120{
     121        uint64_t v;
    122122       
    123123        __asm__ volatile ("mov %0 = ar.itc\n" : "=r" (v));
    … …  
    130130 * @param v New match value.
    131131 */
    132 static inline void itm_write(__u64 v)
     132static inline void itm_write(uint64_t v)
    133133{
    134134        __asm__ volatile ("mov cr.itm = %0\n" : : "r" (v));
    … …  
    139139 * @return Match value.
    140140 */
    141 static inline __u64 itm_read(void)
    142 {
    143         __u64 v;
     141static inline uint64_t itm_read(void)
     142{
     143        uint64_t v;
    144144       
    145145        __asm__ volatile ("mov %0 = cr.itm\n" : "=r" (v));
    … …  
    152152 * @return Current vector and mask bit.
    153153 */
    154 static inline __u64 itv_read(void)
    155 {
    156         __u64 v;
     154static inline uint64_t itv_read(void)
     155{
     156        uint64_t v;
    157157       
    158158        __asm__ volatile ("mov %0 = cr.itv\n" : "=r" (v));
    … …  
    165165 * @param v New vector and mask bit.
    166166 */
    167 static inline void itv_write(__u64 v)
     167static inline void itv_write(uint64_t v)
    168168{
    169169        __asm__ volatile ("mov cr.itv = %0\n" : : "r" (v));
    … …  
    174174 * @param v This value is ignored.
    175175 */
    176 static inline void eoi_write(__u64 v)
     176static inline void eoi_write(uint64_t v)
    177177{
    178178        __asm__ volatile ("mov cr.eoi = %0\n" : : "r" (v));
    … …  
    183183 * @return Current value of TPR.
    184184 */
    185 static inline __u64 tpr_read(void)
    186 {
    187         __u64 v;
     185static inline uint64_t tpr_read(void)
     186{
     187        uint64_t v;
    188188
    189189        __asm__ volatile ("mov %0 = cr.tpr\n"  : "=r" (v));
    … …  
    196196 * @param v New value of TPR.
    197197 */
    198 static inline void tpr_write(__u64 v)
     198static inline void tpr_write(uint64_t v)
    199199{
    200200        __asm__ volatile ("mov cr.tpr = %0\n" : : "r" (v));
    … …  
    210210static ipl_t interrupts_disable(void)
    211211{
    212         __u64 v;
     212        uint64_t v;
    213213       
    214214        __asm__ volatile (
    … …  
    231231static ipl_t interrupts_enable(void)
    232232{
    233         __u64 v;
     233        uint64_t v;
    234234       
    235235        __asm__ volatile (
    … …  
    276276extern void cpu_halt(void);
    277277extern void cpu_sleep(void);
    278 extern void asm_delay_loop(__u32 t);
    279 
    280 extern void switch_to_userspace(__address entry, __address sp, __address bsp, __address uspace_uarg, __u64 ipsr, __u64 rsc);
     278extern void asm_delay_loop(uint32_t t);
     279
     280extern void switch_to_userspace(uintptr_t entry, uintptr_t sp, uintptr_t bsp, uintptr_t uspace_uarg, uint64_t ipsr, uint64_t rsc);
    281281
    282282#endif
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