Changeset 7f1c620 in mainline for arch/ia64/include/mm/page.h

Timestamp:

2006-07-04T17:17:56Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0ffa3ef5

Parents:

991779c5

Message:

Replace old u?? types with respective C99 variants (e.g. uint32_t, int64_t, uintptr_t etc.).

File:

• arch/ia64/include/mm/page.h (modified) (14 diffs)

arch/ia64/include/mm/page.h

@@ -28 +28 @@
  */
 
- /** @addtogroup ia64mm 
+/** @addtogroup ia64mm  
  * @{
  */
@@ -62 +62 @@
 #define REGION_REGISTERS                8
 
-#define KA2PA(x)        ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
-#define PA2KA(x)        ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
+#define KA2PA(x)        ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT)))
+#define PA2KA(x)        ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT)))
 
 #define VHPT_WIDTH                      20              /* 1M */
@@ -127 +127 @@
         
         /* Word 3 */                                                                                                    
-        __u64 ig3 : 64;
+        uint64_t ig3 : 64;
 } __attribute__ ((packed));
 
@@ -145 +145 @@
         
         /* Word 3 */                                                                                                    
-        __u64 ig3 : 64;
+        uint64_t ig3 : 64;
 } __attribute__ ((packed));
 
@@ -151 +151 @@
         struct vhpt_entry_present present;
         struct vhpt_entry_not_present not_present;
-        __u64 word[4];
+        uint64_t word[4];
 } vhpt_entry_t;
 
@@ -178 +178 @@
 typedef union pta_register {
         struct pta_register_map map;
-        __u64 word;
+        uint64_t word;
 } pta_register;
 
@@ -190 +190 @@
  * @return Address of the head of VHPT collision chain.
  */
-static inline __u64 thash(__u64 va)
-{
-        __u64 ret;
+static inline uint64_t thash(uint64_t va)
+{
+        uint64_t ret;
 
         __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
@@ -208 +208 @@
  * @return The unique tag for VPN and RID in the collision chain returned by thash().
  */
-static inline __u64 ttag(__u64 va)
-{
-        __u64 ret;
+static inline uint64_t ttag(uint64_t va)
+{
+        uint64_t ret;
 
         __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
@@ -223 +223 @@
  * @return Current contents of rr[i].
  */
-static inline __u64 rr_read(index_t i)
-{
-        __u64 ret;
+static inline uint64_t rr_read(index_t i)
+{
+        uint64_t ret;
         ASSERT(i < REGION_REGISTERS);
         __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
@@ -236 +236 @@
  * @param v Value to be written to rr[i].
  */
-static inline void rr_write(index_t i, __u64 v)
+static inline void rr_write(index_t i, uint64_t v)
 {
         ASSERT(i < REGION_REGISTERS);
@@ -250 +250 @@
  * @return Current value stored in PTA.
  */
-static inline __u64 pta_read(void)
-{
-        __u64 ret;
+static inline uint64_t pta_read(void)
+{
+        uint64_t ret;
         
         __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
@@ -263 +263 @@
  * @param v New value to be stored in PTA.
  */
-static inline void pta_write(__u64 v)
+static inline void pta_write(uint64_t v)
 {
         __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
@@ -270 +270 @@
 extern void page_arch_init(void);
 
-extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
-extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
-extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
+extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid);
+extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v);
+extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags);
 
 #endif /* __ASM__ */
@@ -280 +280 @@
 #endif
 
- /** @}
- */
-
+/** @}
+ */