Changeset 7f1c620 in mainline for arch/mips32/src/exception.c
- Timestamp:
- 2006-07-04T17:17:56Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 0ffa3ef5
- Parents:
- 991779c5
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/mips32/src/exception.c
r991779c5 r7f1c620 96 96 static void reserved_instr_exception(int n, istate_t *istate) 97 97 { 98 if (*(( __u32*)istate->epc) == 0x7c03e83b) {98 if (*((uint32_t *)istate->epc) == 0x7c03e83b) { 99 99 ASSERT(THREAD); 100 100 istate->epc += 4; … … 140 140 static void interrupt_exception(int n, istate_t *istate) 141 141 { 142 __u32cause;142 uint32_t cause; 143 143 int i; 144 144
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