Changeset 82fe063 in mainline
- Timestamp:
- 2017-10-22T22:45:34Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 81487c4a
- Parents:
- 89cefe78
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/xhci/endpoint.h
r89cefe78 r82fe063 65 65 endpoint_t base; /**< Inheritance. Keep this first. */ 66 66 67 /** Main TRB ring (or NULL if endpoint uses streams) */67 /** Main transfer ring (unused if streams are enabled) */ 68 68 xhci_trb_ring_t ring; 69 69 … … 76 76 xhci_stream_ctx_t *primary_stream_ctx_array; 77 77 78 /** Maximum number of streams, also a valid range of PSCA above */79 uint 16_t max_streams;78 /** Maximum number of primary streams (0-16), also a valid range of PSCA above */ 79 uint8_t max_streams; 80 80 81 /* FIXME: Figure out type for these two fields.*/81 /** Maximum number of consecutive USB transactions (0-15) that should be executed per scheduling opportunity */ 82 82 uint8_t max_burst; 83 84 /** Maximum number of bursts within an interval that this endpoint supports */ 83 85 uint8_t mult; 84 86 } xhci_endpoint_t;
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