Changes in uspace/drv/uhci-hcd/uhci.c [733a9a8:83c439c] in mainline
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uspace/drv/uhci-hcd/uhci.c (modified) (7 diffs)
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uspace/drv/uhci-hcd/uhci.c
r733a9a8 r83c439c 41 41 42 42 static int uhci_init_transfer_lists(uhci_t *instance); 43 static int uhci_init_mem_structures(uhci_t *instance); 44 static void uhci_init_hw(uhci_t *instance); 45 46 static int uhci_interrupt_emulator(void *arg); 43 static int uhci_clean_finished(void *arg); 47 44 static int uhci_debug_checker(void *arg); 48 49 45 static bool allowed_usb_packet( 50 46 bool low_speed, usb_transfer_type_t, size_t size); 51 47 52 #define CHECK_RET_RETURN(ret, message...) \ 48 int uhci_init(uhci_t *instance, void *regs, size_t reg_size) 49 { 50 #define CHECK_RET_RETURN(message...) \ 53 51 if (ret != EOK) { \ 54 52 usb_log_error(message); \ … … 56 54 } else (void) 0 57 55 58 int uhci_init(uhci_t *instance, void *regs, size_t reg_size) 59 { 60 assert(reg_size >= sizeof(regs_t));56 /* init address keeper(libusb) */ 57 usb_address_keeping_init(&instance->address_manager, USB11_ADDRESS_MAX); 58 usb_log_debug("Initialized address manager.\n"); 61 59 62 60 /* allow access to hc control registers */ 63 61 regs_t *io; 62 assert(reg_size >= sizeof(regs_t)); 64 63 int ret = pio_enable(regs, reg_size, (void**)&io); 65 CHECK_RET_RETURN( ret,"Failed to gain access to registers at %p.\n", io);64 CHECK_RET_RETURN("Failed to gain access to registers at %p.\n", io); 66 65 instance->registers = io; 67 66 usb_log_debug("Device registers accessible.\n"); 68 67 69 ret = uhci_init_mem_structures(instance);70 CHECK_RET_RETURN(ret, "Failed to initialize memory structures.\n");71 72 uhci_init_hw(instance);73 74 instance->cleaner = fibril_create(uhci_interrupt_emulator, instance);75 // fibril_add_ready(instance->cleaner);76 77 instance->debug_checker = fibril_create(uhci_debug_checker, instance);78 fibril_add_ready(instance->debug_checker);79 80 return EOK;81 }82 /*----------------------------------------------------------------------------*/83 void uhci_init_hw(uhci_t *instance)84 {85 86 /* set framelist pointer */87 const uint32_t pa = addr_to_phys(instance->frame_list);88 pio_write_32(&instance->registers->flbaseadd, pa);89 90 /* enable all interrupts, but resume interrupt */91 pio_write_16(&instance->registers->usbintr,92 UHCI_INTR_CRC | UHCI_INTR_COMPLETE | UHCI_INTR_SHORT_PACKET);93 94 /* Start the hc with large(64B) packet FSBR */95 pio_write_16(&instance->registers->usbcmd,96 UHCI_CMD_RUN_STOP | UHCI_CMD_MAX_PACKET | UHCI_CMD_CONFIGURE);97 usb_log_debug("Started UHCI HC.\n");98 }99 /*----------------------------------------------------------------------------*/100 int uhci_init_mem_structures(uhci_t *instance)101 {102 assert(instance);103 68 /* init transfer lists */ 104 int ret = uhci_init_transfer_lists(instance); 105 CHECK_RET_RETURN(ret, "Failed to initialize transfer lists.\n"); 106 usb_log_debug("Initialized transfer lists.\n"); 107 108 /* frame list initialization */ 69 ret = uhci_init_transfer_lists(instance); 70 CHECK_RET_RETURN("Failed to initialize transfer lists.\n"); 71 usb_log_debug("Transfer lists initialized.\n"); 72 73 74 usb_log_debug("Initializing frame list.\n"); 109 75 instance->frame_list = get_page(); 110 76 ret = instance ? EOK : ENOMEM; 111 CHECK_RET_RETURN(ret, "Failed to get frame list page.\n"); 112 usb_log_debug("Initialized frame list.\n"); 77 CHECK_RET_RETURN("Failed to get frame list page.\n"); 113 78 114 79 /* initialize all frames to point to the first queue head */ … … 121 86 } 122 87 123 /* init address keeper(libusb) */ 124 usb_address_keeping_init(&instance->address_manager, USB11_ADDRESS_MAX); 125 usb_log_debug("Initialized address manager.\n"); 88 const uintptr_t pa = (uintptr_t)addr_to_phys(instance->frame_list); 89 pio_write_32(&instance->registers->flbaseadd, (uint32_t)pa); 90 91 list_initialize(&instance->batch_list); 92 fibril_mutex_initialize(&instance->batch_list_mutex); 93 94 instance->cleaner = fibril_create(uhci_clean_finished, instance); 95 fibril_add_ready(instance->cleaner); 96 97 instance->debug_checker = fibril_create(uhci_debug_checker, instance); 98 fibril_add_ready(instance->debug_checker); 99 100 /* Start the hc with large(64B) packet FSBR */ 101 pio_write_16(&instance->registers->usbcmd, 102 UHCI_CMD_RUN_STOP | UHCI_CMD_MAX_PACKET); 103 usb_log_debug("Started UHCI HC.\n"); 104 105 uint16_t cmd = pio_read_16(&instance->registers->usbcmd); 106 cmd |= UHCI_CMD_DEBUG; 107 pio_write_16(&instance->registers->usbcmd, cmd); 126 108 127 109 return EOK; … … 132 114 assert(instance); 133 115 134 /* initialize TODO: check errors*/116 /* initialize */ 135 117 int ret; 136 118 ret = transfer_list_init(&instance->transfers_bulk_full, "BULK_FULL"); … … 164 146 instance->transfers[1][USB_TRANSFER_CONTROL] = 165 147 &instance->transfers_control_slow; 166 instance->transfers[0][USB_TRANSFER_ BULK] =167 &instance->transfers_ bulk_full;148 instance->transfers[0][USB_TRANSFER_CONTROL] = 149 &instance->transfers_control_full; 168 150 169 151 return EOK; … … 192 174 } 193 175 /*----------------------------------------------------------------------------*/ 194 void uhci_interrupt(uhci_t *instance, uint16_t status) 195 { 196 assert(instance); 197 if ((status & (UHCI_STATUS_INTERRUPT | UHCI_STATUS_ERROR_INTERRUPT)) == 0) 198 return; 199 usb_log_debug("UHCI interrupt: %X.\n", status); 200 transfer_list_check(&instance->transfers_interrupt); 201 transfer_list_check(&instance->transfers_control_slow); 202 transfer_list_check(&instance->transfers_control_full); 203 transfer_list_check(&instance->transfers_bulk_full); 204 } 205 /*----------------------------------------------------------------------------*/ 206 int uhci_interrupt_emulator(void* arg) 207 { 208 usb_log_debug("Started interrupt emulator.\n"); 176 int uhci_clean_finished(void* arg) 177 { 178 usb_log_debug("Started cleaning fibril.\n"); 209 179 uhci_t *instance = (uhci_t*)arg; 210 180 assert(instance); 211 181 212 182 while(1) { 213 uint16_t status = pio_read_16(&instance->registers->usbsts); 214 uhci_interrupt(instance, status); 183 transfer_list_check(&instance->transfers_interrupt); 184 transfer_list_check(&instance->transfers_control_slow); 185 transfer_list_check(&instance->transfers_control_full); 186 transfer_list_check(&instance->transfers_bulk_full); 215 187 async_usleep(UHCI_CLEANER_TIMEOUT); 216 188 } … … 223 195 assert(instance); 224 196 while (1) { 225 const uint16_t cmd = pio_read_16(&instance->registers->usbcmd); 226 const uint16_t sts = pio_read_16(&instance->registers->usbsts); 227 const uint16_t intr = pio_read_16(&instance->registers->usbintr); 228 usb_log_debug("Command: %X Status: %X Interrupts: %x\n", 229 cmd, sts, intr); 197 uint16_t cmd = pio_read_16(&instance->registers->usbcmd); 198 uint16_t sts = pio_read_16(&instance->registers->usbsts); 199 usb_log_debug("Command register: %X Status register: %X\n", cmd, sts); 230 200 231 201 uintptr_t frame_list = pio_read_32(&instance->registers->flbaseadd); 232 if (frame_list != addr_to_phys(instance->frame_list)) {202 if (frame_list != (uintptr_t)addr_to_phys(instance->frame_list)) { 233 203 usb_log_debug("Framelist address: %p vs. %p.\n", 234 204 frame_list, addr_to_phys(instance->frame_list));
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