Changes in kernel/arch/sparc64/src/smp/sun4v/smp.c [9280dd0:83dab11] in mainline
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kernel/arch/sparc64/src/smp/sun4v/smp.c
r9280dd0 r83dab11 81 81 unsigned int max_core_strands = 0; 82 82 83 #ifdef CONFIG_SIMICS_SMP_HACK 84 /** 85 * Copies a piece of HelenOS code to the place where OBP had its IPI handler. 86 * By sending an IPI by the BSP to the AP the code will be executed. 87 * The code will jump to the first instruction of the kernel. This is 88 * a workaround how to make APs execute HelenOS code on Simics. 89 */ 90 static void simics_smp_hack_init(void) { 91 asm volatile ( 92 "setx temp_cpu_mondo_handler, %g4, %g6 \n" 93 "setx 0x80200f80, %g4, %g7 \n" 94 95 "ldx [%g6], %g4 \n" 96 "stxa %g4, [%g7] 0x14 \n" 97 "membar #Sync \n" 98 99 "add %g7, 0x8, %g7 \n" 100 "ldx [%g6 + 0x8], %g4 \n" 101 "stxa %g4, [%g7] 0x14 \n" 102 "membar #Sync \n" 103 104 "add %g7, 0x8, %g7 \n" 105 "ldx [%g6 + 0x10], %g4 \n" 106 "stxa %g4, [%g7] 0x14 \n" 107 "membar #Sync \n" 108 109 "add %g7, 0x8, %g7 \n" 110 "ldx [%g6 + 0x18], %g4 \n" 111 "stxa %g4, [%g7] 0x14 \n" 112 "membar #Sync \n" 113 114 "add %g7, 0x8, %g7 \n" 115 "ldx [%g6 + 0x20], %g4 \n" 116 "stxa %g4, [%g7] 0x14 \n" 117 "membar #Sync \n" 118 119 "add %g7, 0x8, %g7 \n" 120 "ldx [%g6 + 0x28], %g4 \n" 121 "stxa %g4, [%g7] 0x14 \n" 122 "membar #Sync \n" 123 124 "add %g7, 0x8, %g7 \n" 125 "ldx [%g6 + 0x30], %g4 \n" 126 "stxa %g4, [%g7] 0x14 \n" 127 "membar #Sync \n" 128 129 "add %g7, 0x8, %g7 \n" 130 "ldx [%g6 + 0x38], %g4 \n" 131 "stxa %g4, [%g7] 0x14 \n" 132 "membar #Sync \n" 133 134 "add %g7, 0x8, %g7 \n" 135 "ldx [%g6 + 0x40], %g4 \n" 136 "stxa %g4, [%g7] 0x14 \n" 137 "membar #Sync \n" 138 139 "flush %i7" 140 141 ); 142 } 143 #endif 144 83 145 #if 0 84 146 /** … … 310 372 { 311 373 detect_execution_units(); 374 #ifdef CONFIG_SIMICS_SMP_HACK 375 simics_smp_hack_init(); 376 #endif 312 377 } 313 378
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