Changeset 849386a in mainline

Timestamp:

2006-01-27T16:23:40Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

457d18a

Parents:

c2b95d3

Message:

First HT_HASH_ARCH implementation for ia64.

Location:

arch/ia64

Files:

• include/mm/page.h (modified) (5 diffs)
• src/mm/page.c (modified) (4 diffs)

arch/ia64/include/mm/page.h

@@ -47 +47 @@
 
 /** Implementation of page hash table interface. */
-#define HT_ENTRIES_ARCH                 0
-#define HT_HASH_ARCH(page, asid)        0
+#define HT_ENTRIES_ARCH                 (VHPT_SIZE/sizeof(pte_t))
+#define HT_HASH_ARCH(page, asid)        vhpt_hash((page), (asid))
 #define HT_COMPARE_ARCH(page, asid, t)  0
 #define HT_SLOT_EMPTY_ARCH(t)           1
@@ -56 +56 @@
 #define HT_SET_RECORD_ARCH(t, page, asid, frame, flags)
 
+#define VRN_SHIFT                       61
+#define VRN_MASK                        (7LL << VRN_SHIFT)
+
 #define VRN_KERNEL                      0
+#define VRN_WORK                        1LL
 #define REGION_REGISTERS                8
 
@@ -198 +202 @@
         __u64 ret;
         
-//      ASSERT(i < REGION_REGISTERS);
+        ASSERT(i < REGION_REGISTERS);
         __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
         
@@ -212 +216 @@
 static inline void rr_write(index_t i, __u64 v)
 {
-//      ASSERT(i < REGION_REGISTERS);
+        ASSERT(i < REGION_REGISTERS);
         __asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v));
 }
@@ -239 +243 @@
 
 extern void page_arch_init(void);
+extern pte_t *vhpt_hash(__address page, asid_t asid);
 
 #endif

arch/ia64/src/mm/page.c

@@ -39 +39 @@
 #include <arch/asm.h>
 #include <arch/barrier.h>
+#include <memstr.h>
 
 /** Initialize VHPT and region registers. */
@@ -67 +68 @@
         
                 rr.word == rr_read(i);
+                rr.map.ve = 0;          /* disable VHPT walker */
                 rr.map.rid = ASID_INVALID;
                 rr_write(i, rr.word);
@@ -77 +79 @@
          */
         page_ht = (pte_t *) frame_alloc(FRAME_KA, VHPT_WIDTH - FRAME_WIDTH, NULL);
-        ht_invalidate_all();
+        memsetb((__address) page_ht, VHPT_SIZE, 0);
+        ht_invalidate_all();    
         
         /*
@@ -99 +102 @@
         set_vhpt_environment();
 }
+
+/** Calculate address of collision chain from VPN and ASID.
+ *
+ * This is rather non-trivial function.
+ * First, it has to translate ASID to RID.
+ * This is achieved by taking VRN bits of
+ * page into account.
+ * Second, it must preserve the region register
+ * it writes the RID to.
+ *
+ * @param page Address of virtual page including VRN bits.
+ * @param asid Address space identifier.
+ *
+ * @return Head of VHPT collision chain for page and asid.
+ */
+pte_t *vhpt_hash(__address page, asid_t asid)
+{
+        region_register rr_save, rr;
+        pte_t *t;
+
+        rr_save.word = rr_read(VRN_WORK);
+        rr.word = rr_save.word;
+        if ((page >> VRN_SHIFT) != VRN_KERNEL)
+                rr.map.rid = (asid * RIDS_PER_ASID) + (page >> VRN_SHIFT);
+        else
+                rr.map.rid = ASID_KERNEL;
+        rr_write(VRN_WORK, rr.word);
+        srlz_i();
+        t = (pte_t *) thash((VRN_WORK << VRN_SHIFT) | (~(VRN_MASK) & page));
+        rr_write(VRN_WORK, rr_save.word);
+        srlz_i();
+        srlz_d();
+
+        return t;
+}