Changes in kernel/arch/mips32/include/atomic.h [7a0359b:88d653c] in mainline

File:

• kernel/arch/mips32/include/atomic.h (modified) (7 diffs)

kernel/arch/mips32/include/atomic.h

@@ -27 +27 @@
  */
 
-/** @addtogroup mips32
+/** @addtogroup mips32  
  * @{
  */
@@ -35 +35 @@
 #ifndef KERN_mips32_ATOMIC_H_
 #define KERN_mips32_ATOMIC_H_
-
-#include <trace.h>
 
 #define atomic_inc(x)  ((void) atomic_add(x, 1))
@@ -53 +51 @@
  *
  * @return Value after addition.
- *
  */
-NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val,
-    atomic_count_t i)
+static inline long atomic_add(atomic_t *val, int i)
 {
-        atomic_count_t tmp;
-        atomic_count_t v;
+        long tmp, v;
         
         asm volatile (
@@ -69 +64 @@
                 "       beq %0, %4, 1b\n"   /* if the atomic operation failed, try again */
                 "       nop\n"
-                : "=&r" (tmp),
-                  "+m" (val->count),
-                  "=&r" (v)
-                : "r" (i),
-                  "i" (0)
+                : "=&r" (tmp), "+m" (val->count), "=&r" (v)
+                : "r" (i), "i" (0)
         );
         
@@ -79 +71 @@
 }
 
-NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val)
-{
-        atomic_count_t tmp;
-        atomic_count_t v;
+static inline uint32_t test_and_set(atomic_t *val) {
+        uint32_t tmp, v;
         
         asm volatile (
@@ -92 +82 @@
                 "       beqz %0, 1b\n"
                 "2:\n"
-                : "=&r" (tmp),
-                  "+m" (val->count),
-                  "=&r" (v)
+                : "=&r" (tmp), "+m" (val->count), "=&r" (v)
                 : "i" (1)
         );
@@ -101 +89 @@
 }
 
-NO_TRACE static inline void atomic_lock_arch(atomic_t *val)
-{
+static inline void atomic_lock_arch(atomic_t *val) {
         do {
-                while (val->count);
+                while (val->count)
+                        ;
         } while (test_and_set(val));
 }