Changeset 8a0b3730 in mainline

Timestamp:

2005-11-11T17:08:17Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

6e8b3c8

Parents:

73a4bab

Message:

Re-aply mistakenly reverted changes.

Files:

• Makefile.config (modified) (1 diff)
• arch/ia64/include/atomic.h (modified) (2 diffs)
• arch/ia64/src/ivt.S (modified) (8 diffs)

Makefile.config

@@ -41 +41 @@
 #CONFIG_TEST = synch/rwlock2
 #CONFIG_TEST = synch/rwlock3
-CONFIG_TEST = synch/rwlock4
-#CONFIG_TEST = synch/rwlock5
+#CONFIG_TEST = synch/rwlock4
+CONFIG_TEST = synch/rwlock5
 #CONFIG_TEST = synch/semaphore1
 #CONFIG_TEST = synch/semaphore2

arch/ia64/include/atomic.h

@@ -41 +41 @@
         __asm__ volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (*val) : "i" (imm));
  
-        *val += imm;
-        
         return v;
 }
@@ -54 +52 @@
 
 
-static inline atomic_t atomic_inc_post(atomic_t *val) { return atomic_add(val, 1)+1; }
-static inline atomic_t atomic_dec_post(atomic_t *val) { return atomic_add(val, -1)-1; }
-
-
-
+static inline atomic_t atomic_inc_post(atomic_t *val) { return atomic_add(val, 1) + 1; }
+static inline atomic_t atomic_dec_post(atomic_t *val) { return atomic_add(val, -1) - 1; }
 
 #endif

arch/ia64/src/ivt.S

@@ -1 +1 @@
 #
 # Copyright (C) 2005 Jakub Vana
+# Copyright (C) 2005 Jakub Jermar
 # All rights reserved.
 #
@@ -28 +29 @@
 
 #include <arch/stack.h>
+#include <arch/register.h>
 
 #define STACK_ITEMS             12
@@ -105 +107 @@
         
         /* assume kernel backing store */
-        mov ar.bspstore = r28 ;;
+        /* mov ar.bspstore = r28 ;; */
         
         mov r29 = ar.bsp
@@ -145 +147 @@
         ld8 r24 = [r31], +8 ;;          /* load ar.rsc */
 
-        mov ar.bspstore = r28 ;;        /* (step 4) */
-        mov ar.rnat = r27               /* (step 5) */
+        /* mov ar.bspstore = r28 ;; */  /* (step 4) */
+        /* mov ar.rnat = r27 */         /* (step 5) */
 
         mov ar.pfs = r25                /* (step 6) */
@@ -190 +192 @@
 
     /* 6. switch to bank 1 and reenable PSR.ic */
-        ssm 0x2000
+        ssm PSR_IC_MASK
         bsw.1 ;;
         srlz.d
@@ -246 +248 @@
     
     /* 9. skipped (will not enable interrupts) */
+        /*
+         * ssm PSR_I_MASK
+         * ;;
+         * srlz.d
+         */
 
     /* 10. call handler */
@@ -255 +262 @@
         
     /* 12. skipped (will not disable interrupts) */
+        /*
+         * rsm PSR_I_MASK
+         * ;;
+         * srlz.d
+         */
 
     /* 13. restore general and floating-point registers */
@@ -308 +320 @@
         
     /* 15. disable PSR.ic and switch to bank 0 */
-        rsm 0x2000
+        rsm PSR_IC_MASK
         bsw.0 ;;
         srlz.d