Changes in kernel/arch/riscv64/include/arch/asm.h [295ee02:8b6aa39] in mainline
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kernel/arch/riscv64/include/arch/asm.h
r295ee02 r8b6aa39 36 36 #define KERN_riscv64_ASM_H_ 37 37 38 #include <arch/cpu.h>39 38 #include <typedefs.h> 40 39 #include <config.h> … … 44 43 NO_TRACE static inline ipl_t interrupts_enable(void) 45 44 { 46 ipl_t ipl; 47 48 asm volatile ( 49 "csrrsi %[ipl], sstatus, " STRING(SSTATUS_SIE_MASK) "\n" 50 : [ipl] "=r" (ipl) 51 ); 52 53 return ipl; 45 // FIXME 46 return 0; 54 47 } 55 48 56 49 NO_TRACE static inline ipl_t interrupts_disable(void) 57 50 { 58 ipl_t ipl; 59 60 asm volatile ( 61 "csrrci %[ipl], sstatus, " STRING(SSTATUS_SIE_MASK) "\n" 62 : [ipl] "=r" (ipl) 63 ); 64 65 return ipl; 51 // FIXME 52 return 0; 66 53 } 67 54 68 55 NO_TRACE static inline void interrupts_restore(ipl_t ipl) 69 56 { 70 if ((ipl & SSTATUS_SIE_MASK) == SSTATUS_SIE_MASK) 71 interrupts_enable(); 72 else 73 interrupts_disable(); 57 // FIXME 74 58 } 75 59 76 60 NO_TRACE static inline ipl_t interrupts_read(void) 77 61 { 78 ipl_t ipl; 79 80 asm volatile ( 81 "csrr %[ipl], sstatus\n" 82 : [ipl] "=r" (ipl) 83 ); 84 85 return ipl; 62 // FIXME 63 return 0; 86 64 } 87 65 88 66 NO_TRACE static inline bool interrupts_disabled(void) 89 67 { 90 return ((interrupts_read() & SSTATUS_SIE_MASK) == 0); 68 // FIXME 69 return 0; 91 70 } 92 71 93 72 NO_TRACE static inline uintptr_t get_stack_base(void) 94 73 { 95 uintptr_t base; 96 97 asm volatile ( 98 "and %[base], sp, %[mask]\n" 99 : [base] "=r" (base) 100 : [mask] "r" (~(STACK_SIZE - 1)) 101 ); 102 103 return base; 74 // FIXME 75 return 0; 104 76 } 105 77
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