Changeset 8c15255 in mainline
- Timestamp:
- 2011-08-18T21:32:56Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- ac7f81d
- Parents:
- f4fa6d9
- Files:
-
- 11 edited
- 1 moved
Legend:
- Unmodified
- Added
- Removed
-
HelenOS.config
rf4fa6d9 r8c15255 70 70 @ "pentium4" Pentium 4 71 71 @ "pentium3" Pentium 3 72 @ "i486" i486 72 73 @ "core" Core Solo/Duo 73 74 @ "athlon_xp" Athlon XP -
kernel/arch/ia32/Makefile.inc
rf4fa6d9 r8c15255 64 64 endif 65 65 66 ifeq ($(PROCESSOR),i486) 67 CMN2 = -march=i486 68 endif 69 66 70 ifeq ($(PROCESSOR),core) 67 71 CMN2 = -march=prescott -
kernel/arch/ia32/include/asm.h
rf4fa6d9 r8c15255 311 311 } 312 312 313 #ifndef PROCESSOR_i486 313 314 /** Write to MSR */ 314 315 NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value) … … 321 322 ); 322 323 } 324 #endif 323 325 324 326 NO_TRACE static inline uint64_t read_msr(uint32_t msr) -
kernel/arch/ia32/include/atomic.h
rf4fa6d9 r8c15255 121 121 asm volatile ( 122 122 "0:\n" 123 #ifndef PROCESSOR_i486 123 124 "pause\n" /* Pentium 4's HT love this instruction */ 125 #endif 124 126 "mov %[count], %[tmp]\n" 125 127 "testl %[tmp], %[tmp]\n" -
kernel/arch/ia32/include/cycle.h
rf4fa6d9 r8c15255 40 40 NO_TRACE static inline uint64_t get_cycle(void) 41 41 { 42 #ifdef PROCESSOR_i486 43 return 0; 44 #else 42 45 uint64_t v; 43 46 … … 48 51 49 52 return v; 53 #endif 50 54 } 51 55 -
kernel/arch/ia32/src/asm.S
rf4fa6d9 r8c15255 405 405 xorl %eax, %eax 406 406 cmpl $(GDT_SELECTOR(KTEXT_DES)), ISTATE_OFFSET_CS(%esp) 407 #ifdef PROCESSOR_i486 408 jz 0f 409 movl %eax, %ebp 410 0: 411 #else 407 412 cmovnzl %eax, %ebp 413 #endif 408 414 409 415 movl %ebp, ISTATE_OFFSET_EBP_FRAME(%esp) -
kernel/arch/ia32/src/cpu/cpu.c
rf4fa6d9 r8c15255 118 118 ); 119 119 } 120 120 121 #ifndef PROCESSOR_i486 121 122 if (CPU->arch.fi.bits.sep) { 122 123 /* Setup fast SYSENTER/SYSEXIT syscalls */ 123 124 syscall_setup_cpu(); 124 125 } 126 #endif 125 127 } 126 128 -
kernel/arch/ia32/src/proc/scheduler.c
rf4fa6d9 r8c15255 60 60 uintptr_t kstk = (uintptr_t) &THREAD->kstack[STACK_SIZE]; 61 61 62 #ifndef PROCESSOR_i486 62 63 if (CPU->arch.fi.bits.sep) { 63 64 /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */ 64 65 write_msr(IA32_MSR_SYSENTER_ESP, kstk - sizeof(istate_t)); 65 66 } 67 #endif 66 68 67 69 /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */ -
kernel/arch/ia32/src/syscall.c
rf4fa6d9 r8c15255 39 39 #include <arch/pm.h> 40 40 41 #ifndef PROCESSOR_i486 41 42 /** Enable & setup support for SYSENTER/SYSEXIT */ 42 43 void syscall_setup_cpu(void) … … 49 50 write_msr(IA32_MSR_SYSENTER_EIP, (uint32_t) sysenter_handler); 50 51 } 52 #endif 51 53 52 54 /** @} -
uspace/lib/c/arch/ia32/Makefile.common
rf4fa6d9 r8c15255 28 28 29 29 CLANG_ARCH = i386 30 ifeq ($(PROCESSOR),i486) 31 GCC_CFLAGS += -march=i486 -fno-omit-frame-pointer 32 else 30 33 GCC_CFLAGS += -march=pentium -fno-omit-frame-pointer 34 endif 31 35 32 36 ENDIANESS = LE -
uspace/lib/c/arch/ia32/Makefile.inc
rf4fa6d9 r8c15255 28 28 29 29 ARCH_SOURCES = \ 30 arch/$(UARCH)/src/entry. s\30 arch/$(UARCH)/src/entry.S \ 31 31 arch/$(UARCH)/src/entryjmp.s \ 32 32 arch/$(UARCH)/src/thread_entry.s \ -
uspace/lib/c/arch/ia32/src/entry.S
rf4fa6d9 r8c15255 46 46 mov %ax, %fs 47 47 # Do not set %gs, it contains descriptor that can see TLS 48 48 49 #ifndef PROCESSOR_i486 49 50 # Detect the mechanism used for making syscalls 50 51 movl $(INTEL_CPUID_STANDARD), %eax … … 55 56 movl $__syscall_fast, (%eax) 56 57 0: 58 #endif 57 59 # 58 60 # Create the first stack frame.
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