Changeset 8c5e6c7 in mainline


Ignore:
Timestamp:
2005-10-07T23:19:56Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
cad5ce8
Parents:
92e5431
Message:

mips32 memory management work.
TLB exceptions seem to be working on at least simics.
msim handles TLB Refill and TLB Invalid exceptions well,
but seems to skip writes to the mapped addressies in mm
mapping test #1 (the data is not written and exception
is not triggered).

Files:
3 edited

Legend:

Unmodified
Added
Removed
  • arch/mips32/include/mm/tlb.h

    r92e5431 r8c5e6c7  
    4949                unsigned c : 3;         /* cache coherency attribute */
    5050                unsigned pfn : 24;      /* frame number */
    51                 unsigned zero: 2;       /* zero */
     51                unsigned : 2;           /* zero */
    5252        } __attribute__ ((packed));
    5353        __u32 value;
  • arch/mips32/src/mm/tlb.c

    r92e5431 r8c5e6c7  
    4545
    4646static pte_t *find_mapping_and_check(__address badvaddr);
     47
    4748static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn);
     49static void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr);
    4850
    4951/** Initialize TLB
     
    8587{
    8688        entry_lo_t lo;
     89        entry_hi_t hi; 
    8790        __address badvaddr;
    8891        pte_t *pte;
    8992
    90 // debug       
    91         entry_hi_t hi;
    92 
    9393        badvaddr = cp0_badvaddr_read();
    9494
    95 // debug
    96         hi.value = cp0_entry_hi_read();
    97         printf("TLB Refill: hi.vnp2=%X\n", hi.vpn2);
    98        
    9995        spinlock_lock(&VM->lock);               
     96
    10097        pte = find_mapping_and_check(badvaddr);
    10198        if (!pte)
     
    107104        pte->a = 1;
    108105
     106        prepare_entry_hi(&hi, VM->asid, badvaddr);
    109107        prepare_entry_lo(&lo, pte->g, pte->v, pte->d, pte->c, pte->pfn);
    110108
     
    112110         * New entry is to be inserted into TLB
    113111         */
     112        cp0_entry_hi_write(hi.value);
    114113        if ((badvaddr/PAGE_SIZE) % 2 == 0) {
    115114                cp0_entry_lo0_write(lo.value);
     
    141140        __address badvaddr;
    142141        entry_lo_t lo;
     142        entry_hi_t hi;
    143143        pte_t *pte;
    144144
     
    148148         * Locate the faulting entry in TLB.
    149149         */
     150        hi.value = cp0_entry_hi_read();
     151        prepare_entry_hi(&hi, hi.asid, badvaddr);
     152        cp0_entry_hi_write(hi.value);
    150153        tlbp();
    151154        index.value = cp0_index_read();
     
    205208        __address badvaddr;
    206209        entry_lo_t lo;
     210        entry_hi_t hi;
    207211        pte_t *pte;
    208212
     
    212216         * Locate the faulting entry in TLB.
    213217         */
     218        hi.value = cp0_entry_hi_read();
     219        prepare_entry_hi(&hi, hi.asid, badvaddr);
     220        cp0_entry_hi_write(hi.value);
    214221        tlbp();
    215222        index.value = cp0_index_read();
     
    379386void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn)
    380387{
     388        lo->value = 0;
    381389        lo->g = g;
    382390        lo->v = v;
     
    384392        lo->c = c;
    385393        lo->pfn = pfn;
    386         lo->zero = 0;
    387 }
     394}
     395
     396void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr)
     397{
     398        hi->value = (((addr/PAGE_SIZE)/2)*PAGE_SIZE*2);
     399        hi->asid = asid;
     400}
  • test/mm/mapping1/test.c

    r92e5431 r8c5e6c7  
    4949        frame0 = frame_alloc(FRAME_KA);
    5050        frame1 = frame_alloc(FRAME_KA);
    51        
     51
     52        printf("Writing %L to physical address %P.\n", VALUE0, KA2PA(frame0));
    5253        *((__u32 *) frame0) = VALUE0;
     54        printf("Writing %L to physical address %P.\n", VALUE1, KA2PA(frame1));
    5355        *((__u32 *) frame1) = VALUE1;
    5456       
    55         printf("Mapping %P to %P.\n", PAGE0, KA2PA(frame0));
    56         map_page_to_frame(PAGE0, KA2PA(frame0), PAGE_PRESENT, 0);
    57         printf("Mapping %P to %P.\n", PAGE1, KA2PA(frame1));   
    58         map_page_to_frame(PAGE1, KA2PA(frame1), PAGE_PRESENT, 0);
     57        printf("Mapping virtual address %P to physical address %P.\n", PAGE0, KA2PA(frame0));
     58        map_page_to_frame(PAGE0, KA2PA(frame0), PAGE_PRESENT | PAGE_WRITE, 0);
     59        printf("Mapping virtual address %P to physical address %P.\n", PAGE1, KA2PA(frame1));   
     60        map_page_to_frame(PAGE1, KA2PA(frame1), PAGE_PRESENT | PAGE_WRITE, 0);
    5961       
    60         printf("Value at %P is %L.\n", PAGE0, v0 = *((__u32 *) PAGE0));
    61         printf("Value at %P is %L.\n", PAGE1, v1 = *((__u32 *) PAGE1));
     62        printf("Value at virtual address %P is %L.\n", PAGE0, v0 = *((__u32 *) PAGE0));
     63        printf("Value at virtual address %P is %L.\n", PAGE1, v1 = *((__u32 *) PAGE1));
    6264       
    6365        ASSERT(v0 == VALUE0);
    6466        ASSERT(v1 == VALUE1);
    6567
    66         printf("Writing 0 to %P.\n", PAGE0);
     68        printf("Writing %X to virtual address %P.\n", 0, PAGE0);
    6769        *((__u32 *) PAGE0) = 0;
    68         printf("Writing 0 to %P.\n", PAGE1);
     70        printf("Writing %X to virtual address %P.\n", 0, PAGE1);
    6971        *((__u32 *) PAGE1) = 0;
    7072       
    71         printf("Value at %P is %L.\n", PAGE0, v0 = *((__u32 *) PAGE0));
    72         printf("Value at %P is %L.\n", PAGE1, v1 = *((__u32 *) PAGE1));
     73        printf("Value at virtual address %P is %X.\n", PAGE0, v0 = *((__u32 *) PAGE0));
     74        printf("Value at virtual address %P is %X.\n", PAGE1, v1 = *((__u32 *) PAGE1));
    7375
    7476        ASSERT(v0 == 0);
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