Changeset 8c7294c6 in mainline


Ignore:
Timestamp:
2008-06-02T09:36:27Z (16 years ago)
Author:
Jiri Svoboda <jirik.svoboda@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
d2bdd245
Parents:
6387c18
Message:

Fix missing earlyclobber-register constraints in mips32 atomic_add(), causing panic when gcc put %0 and %1 to the same register.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/mips32/include/atomic.h

    r6387c18 r8c7294c6  
    6464                "       beq %0, %4, 1b\n"       /* if the atomic operation failed, try again */
    6565                "       nop\n"
    66                 : "=r" (tmp), "=m" (val->count), "=r" (v)
     66                : "=&r" (tmp), "=m" (val->count), "=&r" (v)
    6767                : "i" (i), "i" (0)
    6868                );
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