Changeset 8e0eb63 in mainline for arch/amd64/src/asm_utils.S

Timestamp:

2006-03-15T18:01:43Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

9e1c942

Parents:

2f7342d

Message:

Hopefully final version of interrupt handlers for amd64 and ia32.
amd64 has been especially tricky to debug.
Error code detection is now done in compile time.

File:

• arch/amd64/src/asm_utils.S (modified) (3 diffs)

arch/amd64/src/asm_utils.S

@@ -27 +27 @@
 #
 
+#define IREGISTER_SPACE 120
+
+#define IOFFSET_RAX 0x0
+#define IOFFSET_RBX 0x8
+#define IOFFSET_RCX 0x10
+#define IOFFSET_RDX 0x18
+#define IOFFSET_RSI 0x20
+#define IOFFSET_RDI 0x28
+#define IOFFSET_R8 0x30
+#define IOFFSET_R9 0x38
+#define IOFFSET_R10 0x40
+#define IOFFSET_R11 0x48
+#define IOFFSET_R12 0x50
+#define IOFFSET_R13 0x58
+#define IOFFSET_R14 0x60
+#define IOFFSET_R15 0x68
+#define IOFFSET_RBP 0x70
 
 #  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
 # and 1 means interrupt with error word
-
-        
 #define ERROR_WORD_INTERRUPT_LIST 0x00027D00
 
 #include <arch/pm.h>
-#include <arch/context_offset.h>
 #include <arch/mm/page.h>
         
@@ -142 +156 @@
         movq IOFFSET_R15(%rsp), %r15
 .endm
-        
+
 ## Declare interrupt handlers
 #
@@ -148 +162 @@
 # vectors starting at vector i.
 #
-# The handlers setup data segment registers
-# and call exc_dispatch().
+# The handlers call exc_dispatch().
 #
 .macro handler i n
-        subq $IREGISTER_SPACE, %rsp
+
+        /*
+         * Choose between version with error code and version without error code.
+         * Both versions have to be of the same size. amd64 assembly is, however,
+         * a little bit tricky. For instance, subq $0x80, %rsp and subq $0x78, %rsp
+         * can result in two instructions with different op-code lengths.
+         * Therefore, pay special attention to the extra NOP's that serve as
+         * a necessary fill.
+         */
+
+        .iflt \i-32
+                .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
+                        /*
+                         * Version with error word.
+                         */
+                        subq $IREGISTER_SPACE, %rsp
+                        nop
+                        nop
+                        nop
+                .else
+                        /*
+                         * Version without error word,
+                         */
+                        subq $(IREGISTER_SPACE+8), %rsp
+                .endif
+        .else
+                /*
+                 * Version without error word,
+                 */
+                subq $(IREGISTER_SPACE+8), %rsp
+        .endif  
+
         save_all_gpr
 
-        movq $(\i),%rdi   # %rdi - first parameter
-        movq %rsp, %rsi   # %rsi - pointer to interrupt_context
-        call exc_dispatch       # exc_dispatch(i, stack)
-
-# Test if this is interrupt with error word or not
-        mov $\i,%cl;
-        movl $1,%eax;
-        test $0xe0,%cl;
-        jnz 0f;
-        and $0x1f,%cl;
-        shl %cl,%eax;
-        and $ERROR_WORD_INTERRUPT_LIST,%eax;
-        jz 0f;
-
-
-# Return with error word
+        movq $(\i), %rdi        # %rdi - first parameter
+        movq %rsp, %rsi         # %rsi - pointer to istate
+        call exc_dispatch       # exc_dispatch(i, istate)
+        
         restore_all_gpr
         # $8 = Skip error word
-        addq $IREGISTER_SPACE + 0x8, %rsp
-        iretq
-
-0:
-# Return with no error word
-        restore_all_gpr
-        addq $IREGISTER_SPACE, %rsp
+        addq $(IREGISTER_SPACE+8), %rsp
         iretq