Changeset 8e7c9fe in mainline for kernel/arch/ppc32/src/asm.S
- Timestamp:
- 2014-09-12T03:45:25Z (10 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- c53b58e
- Parents:
- 3eb0c85 (diff), 105d8d6 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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kernel/arch/ppc32/src/asm.S
r3eb0c85 r8e7c9fe 29 29 #include <arch/asm/regname.h> 30 30 #include <arch/msr.h> 31 #include <arch/istate_struct.h> 31 32 32 33 .text … … 59 60 mtsrr0 r5 60 61 61 /* Set pr oblemstate, enable interrupts */62 /* Set privileged state, enable interrupts */ 62 63 63 64 ori r31, r31, MSR_PR … … 85 86 mtmsr r31 86 87 87 lwz r0, 8(sp)88 lwz r2, 12(sp)89 lwz r3, 16(sp)90 lwz r4, 20(sp)91 lwz r5, 24(sp)92 lwz r6, 28(sp)93 lwz r7, 32(sp)94 lwz r8, 36(sp)95 lwz r9, 40(sp)96 lwz r10, 44(sp)97 lwz r11, 48(sp)98 lwz r13, 52(sp)99 lwz r14, 56(sp)100 lwz r15, 60(sp)101 lwz r16, 64(sp)102 lwz r17, 68(sp)103 lwz r18, 72(sp)104 lwz r19, 76(sp)105 lwz r20, 80(sp)106 lwz r21, 84(sp)107 lwz r22, 88(sp)108 lwz r23, 92(sp)109 lwz r24, 96(sp)110 lwz r25, 100(sp)111 lwz r26, 104(sp)112 lwz r27, 108(sp)113 lwz r28, 112(sp)114 lwz r29, 116(sp)115 lwz r30, 120(sp)116 lwz r31, 124(sp)117 118 lwz r12, 128(sp)88 lwz r0, ISTATE_OFFSET_R0(sp) 89 lwz r2, ISTATE_OFFSET_R2(sp) 90 lwz r3, ISTATE_OFFSET_R3(sp) 91 lwz r4, ISTATE_OFFSET_R4(sp) 92 lwz r5, ISTATE_OFFSET_R5(sp) 93 lwz r6, ISTATE_OFFSET_R6(sp) 94 lwz r7, ISTATE_OFFSET_R7(sp) 95 lwz r8, ISTATE_OFFSET_R8(sp) 96 lwz r9, ISTATE_OFFSET_R9(sp) 97 lwz r10, ISTATE_OFFSET_R10(sp) 98 lwz r11, ISTATE_OFFSET_R11(sp) 99 lwz r13, ISTATE_OFFSET_R13(sp) 100 lwz r14, ISTATE_OFFSET_R14(sp) 101 lwz r15, ISTATE_OFFSET_R15(sp) 102 lwz r16, ISTATE_OFFSET_R16(sp) 103 lwz r17, ISTATE_OFFSET_R17(sp) 104 lwz r18, ISTATE_OFFSET_R18(sp) 105 lwz r19, ISTATE_OFFSET_R19(sp) 106 lwz r20, ISTATE_OFFSET_R20(sp) 107 lwz r21, ISTATE_OFFSET_R21(sp) 108 lwz r22, ISTATE_OFFSET_R22(sp) 109 lwz r23, ISTATE_OFFSET_R23(sp) 110 lwz r24, ISTATE_OFFSET_R24(sp) 111 lwz r25, ISTATE_OFFSET_R25(sp) 112 lwz r26, ISTATE_OFFSET_R26(sp) 113 lwz r27, ISTATE_OFFSET_R27(sp) 114 lwz r28, ISTATE_OFFSET_R28(sp) 115 lwz r29, ISTATE_OFFSET_R29(sp) 116 lwz r30, ISTATE_OFFSET_R30(sp) 117 lwz r31, ISTATE_OFFSET_R31(sp) 118 119 lwz r12, ISTATE_OFFSET_CR(sp) 119 120 mtcr r12 120 121 121 lwz r12, 132(sp)122 lwz r12, ISTATE_OFFSET_PC(sp) 122 123 mtsrr0 r12 123 124 124 lwz r12, 136(sp)125 lwz r12, ISTATE_OFFSET_SRR1(sp) 125 126 mtsrr1 r12 126 127 127 lwz r12, 140(sp)128 lwz r12, ISTATE_OFFSET_LR(sp) 128 129 mtlr r12 129 130 130 lwz r12, 144(sp)131 lwz r12, ISTATE_OFFSET_CTR(sp) 131 132 mtctr r12 132 133 133 lwz r12, 148(sp)134 lwz r12, ISTATE_OFFSET_XER(sp) 134 135 mtxer r12 135 136 136 lwz r12, 156(sp)137 lwz sp, 160(sp)137 lwz r12, ISTATE_OFFSET_R12(sp) 138 lwz sp, ISTATE_OFFSET_SP(sp) 138 139 139 140 rfi … … 152 153 mtmsr r31 153 154 154 lwz r0, 8(sp)155 lwz r2, 12(sp)156 lwz r4, 20(sp)157 lwz r5, 24(sp)158 lwz r6, 28(sp)159 lwz r7, 32(sp)160 lwz r8, 36(sp)161 lwz r9, 40(sp)162 lwz r10, 44(sp)163 lwz r11, 48(sp)164 lwz r13, 52(sp)165 lwz r14, 56(sp)166 lwz r15, 60(sp)167 lwz r16, 64(sp)168 lwz r17, 68(sp)169 lwz r18, 72(sp)170 lwz r19, 76(sp)171 lwz r20, 80(sp)172 lwz r21, 84(sp)173 lwz r22, 88(sp)174 lwz r23, 92(sp)175 lwz r24, 96(sp)176 lwz r25, 100(sp)177 lwz r26, 104(sp)178 lwz r27, 108(sp)179 lwz r28, 112(sp)180 lwz r29, 116(sp)181 lwz r30, 120(sp)182 lwz r31, 124(sp)183 184 lwz r12, 128(sp)155 lwz r0, ISTATE_OFFSET_R0(sp) 156 lwz r2, ISTATE_OFFSET_R2(sp) 157 lwz r4, ISTATE_OFFSET_R4(sp) 158 lwz r5, ISTATE_OFFSET_R5(sp) 159 lwz r6, ISTATE_OFFSET_R6(sp) 160 lwz r7, ISTATE_OFFSET_R7(sp) 161 lwz r8, ISTATE_OFFSET_R8(sp) 162 lwz r9, ISTATE_OFFSET_R9(sp) 163 lwz r10, ISTATE_OFFSET_R10(sp) 164 lwz r11, ISTATE_OFFSET_R11(sp) 165 lwz r13, ISTATE_OFFSET_R13(sp) 166 lwz r14, ISTATE_OFFSET_R14(sp) 167 lwz r15, ISTATE_OFFSET_R15(sp) 168 lwz r16, ISTATE_OFFSET_R16(sp) 169 lwz r17, ISTATE_OFFSET_R17(sp) 170 lwz r18, ISTATE_OFFSET_R18(sp) 171 lwz r19, ISTATE_OFFSET_R19(sp) 172 lwz r20, ISTATE_OFFSET_R20(sp) 173 lwz r21, ISTATE_OFFSET_R21(sp) 174 lwz r22, ISTATE_OFFSET_R22(sp) 175 lwz r23, ISTATE_OFFSET_R23(sp) 176 lwz r24, ISTATE_OFFSET_R24(sp) 177 lwz r25, ISTATE_OFFSET_R25(sp) 178 lwz r26, ISTATE_OFFSET_R26(sp) 179 lwz r27, ISTATE_OFFSET_R27(sp) 180 lwz r28, ISTATE_OFFSET_R28(sp) 181 lwz r29, ISTATE_OFFSET_R29(sp) 182 lwz r30, ISTATE_OFFSET_R30(sp) 183 lwz r31, ISTATE_OFFSET_R31(sp) 184 185 lwz r12, ISTATE_OFFSET_CR(sp) 185 186 mtcr r12 186 187 187 lwz r12, 132(sp)188 lwz r12, ISTATE_OFFSET_PC(sp) 188 189 mtsrr0 r12 189 190 190 lwz r12, 136(sp)191 lwz r12, ISTATE_OFFSET_SRR1(sp) 191 192 mtsrr1 r12 192 193 193 lwz r12, 140(sp)194 lwz r12, ISTATE_OFFSET_LR(sp) 194 195 mtlr r12 195 196 196 lwz r12, 144(sp)197 lwz r12, ISTATE_OFFSET_CTR(sp) 197 198 mtctr r12 198 199 199 lwz r12, 148(sp)200 lwz r12, ISTATE_OFFSET_XER(sp) 200 201 mtxer r12 201 202 202 lwz r12, 156(sp)203 lwz sp, 160(sp)203 lwz r12, ISTATE_OFFSET_R12(sp) 204 lwz sp, ISTATE_OFFSET_SP(sp) 204 205 205 206 rfi
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