Changeset 901122b in mainline for arch/ia64/src/ivt.S
- Timestamp:
- 2006-03-09T17:40:30Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a2a46ba
- Parents:
- b994a60
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/src/ivt.S
rb994a60 r901122b 33 33 #include <align.h> 34 34 35 #define STACK_ITEMS 1 435 #define STACK_ITEMS 18 36 36 #define STACK_FRAME_SIZE ALIGN_UP((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE, STACK_ALIGNMENT) 37 37 … … 46 46 #define R_HANDLER r17 47 47 #define R_RET r18 48 #define R_TMP r19 48 49 #define R_KSTACK_BSP r22 /* keep in sync with before_thread_runs_arch() */ 49 50 #define R_KSTACK r23 /* keep in sync with before_thread_runs_arch() */ … … 105 106 * Set p4 to false if the stack register doesn't reference kernel address space. 106 107 */ 107 (p3)cmp.eq p3, p4 = VRN_KERNEL, r31 ;;108 (p3) cmp.eq p3, p4 = VRN_KERNEL, r31 ;; 108 109 109 110 /* … … 111 112 */ 112 113 mov r30 = r12 113 (p4)mov r12 = R_KSTACK ;;114 (p4) mov r12 = R_KSTACK ;; 114 115 115 116 add r31 = -STACK_FRAME_BIAS, r12 ;; 116 117 add r12 = -STACK_FRAME_SIZE, r12 117 118 118 /* 4. save registers in bank 0 into memory stack */ 119 /* 4. save registers in bank 0 into memory stack */ 120 121 /* 122 * If this is break_instruction handler, 123 * copy input parameters to stack. 124 */ 125 mov R_TMP = 0x2c00 ;; 126 cmp.eq p6,p5 = R_OFFS, R_TMP ;; 127 128 /* 129 * From now on, if this is break_instruction handler, p6 is true and p5 is false. 130 * Otherwise p6 is false and p5 is true. 131 * Note that p5 is a preserved predicate register and we make use of it. 132 */ 133 134 (p6) st8 [r31] = r35, -8 ;; /* save in3 */ 135 (p6) st8 [r31] = r34, -8 ;; /* save in2 */ 136 (p6) st8 [r31] = r33, -8 ;; /* save in1 */ 137 (p6) st8 [r31] = r32, -8 ;; /* save in0 */ 138 (p5) add r31 = -32, r31 ;; 139 119 140 st8 [r31] = r30, -8 ;; /* save old stack pointer */ 120 141 … … 147 168 * Inspect BSPSTORE to figure out whether it is necessary to switch to kernel BSPSTORE. 148 169 */ 149 (p1)shr.u r30 = r28, VRN_SHIFT ;;150 (p1)cmp.eq p1, p2 = VRN_KERNEL, r30 ;;170 (p1) shr.u r30 = r28, VRN_SHIFT ;; 171 (p1) cmp.eq p1, p2 = VRN_KERNEL, r30 ;; 151 172 152 173 /* 153 174 * If BSPSTORE needs to be switched, p1 is false and p2 is true. 154 175 */ 155 (p1)mov r30 = r28156 (p2)mov r30 = R_KSTACK_BSP ;;157 (p2)mov ar.bspstore = r30 ;;176 (p1) mov r30 = r28 177 (p2) mov r30 = R_KSTACK_BSP ;; 178 (p2) mov ar.bspstore = r30 ;; 158 179 159 180 mov r29 = ar.bsp … … 269 290 mov loc22 = r6 270 291 mov loc23 = r7 271 mov loc24 = r8 292 (p5) mov loc24 = r8 /* only if not in break_instruction handler */ 272 293 mov loc25 = r9 273 294 mov loc26 = r10 … … 326 347 mov r6 = loc22 327 348 mov r7 = loc23 328 mov r8 = loc24 349 (p5) mov r8 = loc24 /* only if not in break_instruction handler */ 329 350 mov r9 = loc25 330 351 mov r10 = loc26
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