Changeset 93e90c7 in mainline

Timestamp:

2006-01-02T22:10:11Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0132630

Parents:

95d191c

Message:

ia32 work.
Initialize LDR and DFR registers in Local APIC so that logical destination addresses work.

Location:

arch/ia32

Files:

• include/smp/apic.h (modified) (2 diffs)
• src/smp/apic.c (modified) (4 diffs)

arch/ia32/include/smp/apic.h

@@ -94 +94 @@
 /** Destination masks. */
 #define DEST_ALL        0xff
+
+/** Dest format models. */
+#define MODEL_FLAT      0xf
+#define MODEL_CLUSTER   0x0
 
 /** Interrupt Command Register. */
@@ -248 +252 @@
 #define is_local_xapic(x)       (((x)&LAVR_Mask)==0x14)
 
+/** Logical Destination Register. */
+#define  LDR            (0x0d0/sizeof(__u32))
+union ldr {
+        __u32 value;
+        struct {
+                unsigned : 24;          /**< Reserver. */
+                __u8 id;                /**< Logical APIC ID. */
+        } __attribute__ ((packed));
+};
+typedef union ldr ldr_t;
+
+/** Destination Format Register. */
+#define DFR             (0x0e0/sizeof(__u32))
+union dfr {
+        __u32 value;
+        struct {
+                unsigned : 28;          /**< Reserved, all ones. */
+                unsigned model : 4;     /**< Model. */
+        } __attribute__ ((packed));
+};
+typedef union dfr dfr_t;
+
 /* IO APIC */
 #define IOREGSEL        (0x00/sizeof(__u32))

arch/ia32/src/smp/apic.c

@@ -44 +44 @@
  * Advanced Programmable Interrupt Controller for SMP systems.
  * Tested on:
- *      Bochs 2.0.2 - Bochs 2.2 with 2-8 CPUs
+ *      Bochs 2.0.2 - Bochs 2.2.5 with 2-8 CPUs
  *      Simics 2.0.28 - Simics 2.2.19 2-15 CPUs
  *      VMware Workstation 5.5 with 2 CPUs
@@ -312 +312 @@
         tdcr_t tdcr;
         lvt_tm_t tm;
+        ldr_t ldr;
+        dfr_t dfr;
         __u32 t1, t2;
 
@@ -373 +375 @@
         
         l_apic[ICRT] = t1-t2;
+        
+        /* Program Logical Destination Register. */
+        ldr.value = l_apic[LDR];
+        if (CPU->id < sizeof(CPU->id)*8)        /* size in bits */
+                ldr.id = (1<<CPU->id);
+        l_apic[LDR] = ldr.value;
+        
+        /* Program Destination Format Register for Flat mode. */
+        dfr.value = l_apic[DFR];
+        dfr.model = MODEL_FLAT;
+        l_apic[DFR] = dfr.value;
 }
 
@@ -471 +484 @@
                 dlvr = DELMOD_LOWPRI;
 
-        
         reg.lo = io_apic_read(IOREDTBL + pin*2);
         reg.hi = io_apic_read(IOREDTBL + pin*2 + 1);
         
-        reg.dest =  dest;
+        reg.dest = dest;
         reg.destmod = DESTMOD_LOGIC;
         reg.trigger_mode = TRIGMOD_EDGE;