Changeset 94d211e in mainline
- Timestamp:
- 2018-03-21T19:32:48Z (7 years ago)
- Children:
- 1c7a170
- Parents:
- 973be387
- Location:
- kernel
- Files:
-
- 48 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/abs32le/include/arch/mm/page.h
r973be387 r94d211e 92 92 get_pt_flags((pte_t *) (ptl0), (size_t) (i)) 93 93 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 94 PAGE_ PRESENT94 PAGE_NEXT_LEVEL_PT 95 95 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 96 PAGE_ PRESENT96 PAGE_NEXT_LEVEL_PT 97 97 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ 98 98 get_pt_flags((pte_t *) (ptl3), (size_t) (i)) … … 121 121 #define PTE_GET_FRAME_ARCH(p) \ 122 122 ((p)->frame_address << FRAME_WIDTH) 123 #define PTE_READABLE_ARCH(p) \ 124 1 123 125 #define PTE_WRITABLE_ARCH(p) \ 124 126 ((p)->writeable != 0) 125 #define PTE_EXECUTABLE_ARCH(p) 1 127 #define PTE_EXECUTABLE_ARCH(p) \ 128 1 126 129 127 130 #include <mm/mm.h> … … 154 157 return ( 155 158 ((unsigned int) (!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT) | 156 ((unsigned int) (!p->present) << PAGE_ PRESENT_SHIFT) |159 ((unsigned int) (!p->present) << PAGE_NOT_PRESENT_SHIFT) | 157 160 ((unsigned int) p->uaccessible << PAGE_USER_SHIFT) | 158 161 (1 << PAGE_READ_SHIFT) | … … 172 175 p->present = !(flags & PAGE_NOT_PRESENT); 173 176 p->uaccessible = (flags & PAGE_USER) != 0; 174 p->writeable = (flags & PAGE_WRITE) != 0;177 p->writeable = (flags & _PAGE_WRITE) != 0; 175 178 p->global = (flags & PAGE_GLOBAL) != 0; 176 179 -
kernel/arch/amd64/include/arch/mm/page.h
r973be387 r94d211e 157 157 ((((uintptr_t) (p)->addr_12_31) << 12) | \ 158 158 ((uintptr_t) (p)->addr_32_51 << 32)) 159 #define PTE_READABLE_ARCH(p) \ 160 1 159 161 #define PTE_WRITABLE_ARCH(p) \ 160 162 ((p)->writeable != 0) … … 211 213 pte_t *p = &pt[i]; 212 214 213 return (( !p->page_cache_disable) << PAGE_CACHEABLE_SHIFT|214 (!p->present) << PAGE_ PRESENT_SHIFT |215 p->uaccessible << PAGE_USER_SHIFT |215 return ((p->page_cache_disable ? PAGE_NOT_CACHEABLE : PAGE_CACHEABLE) | 216 (!p->present) << PAGE_NOT_PRESENT_SHIFT | 217 (!p->uaccessible) << PAGE_KERNEL_SHIFT | 216 218 1 << PAGE_READ_SHIFT | 217 219 p->writeable << PAGE_WRITE_SHIFT | … … 234 236 p->page_cache_disable = !(flags & PAGE_CACHEABLE); 235 237 p->present = !(flags & PAGE_NOT_PRESENT); 236 p->uaccessible = (flags & PAGE_USER) != 0;237 p->writeable = (flags & PAGE_WRITE) != 0;238 p->no_execute = (flags & PAGE_EXEC) == 0;238 p->uaccessible = !(flags & PAGE_KERNEL); 239 p->writeable = (flags & _PAGE_WRITE) != 0; 240 p->no_execute = (flags & _PAGE_EXEC) == 0; 239 241 p->global = (flags & PAGE_GLOBAL) != 0; 240 242 -
kernel/arch/amd64/src/mm/page.c
r973be387 r94d211e 55 55 56 56 uintptr_t cur; 57 unsigned int identity_flags = 58 PAGE_ GLOBAL | PAGE_CACHEABLE | PAGE_EXEC | PAGE_WRITE | PAGE_READ;57 unsigned int identity_flags = PAGE_READ_WRITE_EXECUTE | 58 PAGE_CACHEABLE | PAGE_KERNEL | PAGE_GLOBAL; 59 59 60 60 page_mapping_operations = &pt_mapping_operations; -
kernel/arch/amd64/src/vreg.c
r973be387 r94d211e 67 67 68 68 page = (uint64_t *) km_map(frame, PAGE_SIZE, 69 PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);69 PAGE_READ_WRITE | PAGE_USER | PAGE_CACHEABLE); 70 70 71 71 write_msr(AMD_MSR_FS, (uintptr_t) page); -
kernel/arch/arm32/include/arch/mm/page.h
r973be387 r94d211e 108 108 get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i)) 109 109 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 110 PAGE_ PRESENT110 PAGE_NEXT_LEVEL_PT 111 111 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 112 PAGE_ PRESENT112 PAGE_NEXT_LEVEL_PT 113 113 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ 114 114 get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i)) -
kernel/arch/arm32/include/arch/mm/page_armv4.h
r973be387 r94d211e 49 49 #define PTE_GET_FRAME_ARCH(pte) \ 50 50 (((uintptr_t) ((pte_t *) (pte))->l1.frame_base_addr) << FRAME_WIDTH) 51 #define PTE_READABLE_ARCH(pte) \ 52 1 51 53 #define PTE_WRITABLE_ARCH(pte) \ 52 54 (((pte_t *) (pte))->l1.access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) … … 138 140 int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); 139 141 140 return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | 141 (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) | 142 (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); 142 return (np << PAGE_NOT_PRESENT_SHIFT) | PAGE_NEXT_LEVEL_PT; 143 143 } 144 144 … … 156 156 int ap = p->access_permission_0; 157 157 158 return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_ PRESENT_SHIFT) |158 return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_NOT_PRESENT_SHIFT) | 159 159 ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) | 160 160 ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT) | … … 164 164 ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT) | 165 165 (1 << PAGE_EXEC_SHIFT) | 166 (p->bufferable << PAGE_CACHEABLE);166 (p->bufferable ? PAGE_CACHEABLE : PAGE_NOT_CACHEABLE); 167 167 } 168 168 … … 220 220 221 221 if (flags & PAGE_USER) { 222 if (flags & PAGE_READ) {222 if (flags & _PAGE_READ) { 223 223 p->access_permission_0 = p->access_permission_1 = 224 224 p->access_permission_2 = p->access_permission_3 = 225 225 PTE_AP_USER_RO_KERNEL_RW; 226 226 } 227 if (flags & PAGE_WRITE) {227 if (flags & _PAGE_WRITE) { 228 228 p->access_permission_0 = p->access_permission_1 = 229 229 p->access_permission_2 = p->access_permission_3 = -
kernel/arch/arm32/include/arch/mm/page_armv6.h
r973be387 r94d211e 49 49 #define PTE_GET_FRAME_ARCH(pte) \ 50 50 (((uintptr_t) ((pte_t *) (pte))->l1.frame_base_addr) << FRAME_WIDTH) 51 #define PTE_READABLE_ARCH(pte) \ 52 1 51 53 #define PTE_WRITABLE_ARCH(pte) \ 52 54 (((pte_t *) (pte))->l1.access_permission_1 != PTE_AP1_RO) … … 171 173 const unsigned np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); 172 174 173 return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | 174 (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) | 175 (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); 175 return (np << PAGE_NOT_PRESENT_SHIFT) | PAGE_NEXT_LEVEL_PT; 176 176 } 177 177 … … 190 190 const unsigned ap1 = p->access_permission_1; 191 191 192 return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_ PRESENT_SHIFT) |192 return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_NOT_PRESENT_SHIFT) | 193 193 ((dt != PTE_DESCRIPTOR_SMALL_PAGE_NX) << PAGE_EXEC_SHIFT) | 194 194 ((ap0 == PTE_AP0_USER_LIMITED_KERNEL_FULL) << PAGE_READ_SHIFT) | … … 198 198 (((ap1 != PTE_AP1_RO) && (ap0 == PTE_AP0_USER_FULL_KERNEL_FULL)) << PAGE_WRITE_SHIFT) | 199 199 (((ap1 != PTE_AP1_RO) && (ap0 == PTE_AP0_USER_NO_KERNEL_FULL)) << PAGE_WRITE_SHIFT) | 200 (p->bufferable << PAGE_CACHEABLE);200 (p->bufferable ? PAGE_CACHEABLE : PAGE_NOT_CACHEABLE); 201 201 } 202 202 … … 249 249 p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; 250 250 } else { 251 if (flags & PAGE_EXEC)251 if (flags & _PAGE_EXEC) 252 252 p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; 253 253 else … … 288 288 p->access_permission_0 = PTE_AP0_USER_NO_KERNEL_FULL; 289 289 290 if (flags & PAGE_USER) {290 if (flags & PAGE_USER) 291 291 p->access_permission_0 = PTE_AP0_USER_FULL_KERNEL_FULL; 292 // TODO Fix kernel to use PAGE_WRITE flag properly and 293 // apply this for kernel pages as well. 294 if (!(flags & PAGE_WRITE)) 295 p->access_permission_1 = PTE_AP1_RO; 296 } 292 293 if (!(flags & _PAGE_WRITE)) 294 p->access_permission_1 = PTE_AP1_RO; 295 297 296 pt_coherence(p); 298 297 } -
kernel/arch/arm32/src/mach/beagleboardxm/beagleboardxm.c
r973be387 r94d211e 101 101 beagleboard.irc_addr = 102 102 (void *) km_map(AMDM37x_IRC_BASE_ADDRESS, AMDM37x_IRC_SIZE, 103 PAGE_ NOT_CACHEABLE);103 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 104 104 assert(beagleboard.irc_addr); 105 105 omap_irc_init(beagleboard.irc_addr); -
kernel/arch/arm32/src/mach/beaglebone/beaglebone.c
r973be387 r94d211e 87 87 { 88 88 bbone.irc_addr = (void *) km_map(AM335x_IRC_BASE_ADDRESS, 89 AM335x_IRC_SIZE, PAGE_NOT_CACHEABLE); 89 AM335x_IRC_SIZE, 90 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 90 91 91 92 bbone.cm_per_addr = (void *) km_map(AM335x_CM_PER_BASE_ADDRESS, 92 AM335x_CM_PER_SIZE, PAGE_NOT_CACHEABLE); 93 AM335x_CM_PER_SIZE, 94 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 93 95 94 96 bbone.cm_dpll_addr = (void *) km_map(AM335x_CM_DPLL_BASE_ADDRESS, 95 AM335x_CM_DPLL_SIZE, PAGE_NOT_CACHEABLE); 97 AM335x_CM_DPLL_SIZE, 98 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 96 99 97 100 bbone.ctrl_module = (void *) km_map(AM335x_CTRL_MODULE_BASE_ADDRESS, 98 AM335x_CTRL_MODULE_SIZE, PAGE_NOT_CACHEABLE); 101 AM335x_CTRL_MODULE_SIZE, 102 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 99 103 100 104 assert(bbone.irc_addr != NULL); -
kernel/arch/arm32/src/mach/gta02/gta02.c
r973be387 r94d211e 103 103 104 104 gta02_timer = (void *) km_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE, 105 PAGE_ NOT_CACHEABLE);105 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 106 106 irqc_regs = (void *) km_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE, 107 PAGE_ NOT_CACHEABLE);107 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 108 108 109 109 /* Initialize interrupt controller. */ -
kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
r973be387 r94d211e 135 135 { 136 136 icp.hw_map.uart = km_map(ICP_UART, PAGE_SIZE, 137 PAGE_WRITE | PAGE_NOT_CACHEABLE); 138 icp.hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, PAGE_NOT_CACHEABLE); 137 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 138 icp.hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, 139 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 139 140 icp.hw_map.kbd_stat = icp.hw_map.kbd_ctrl + ICP_KBD_STAT; 140 141 icp.hw_map.kbd_data = icp.hw_map.kbd_ctrl + ICP_KBD_DATA; 141 142 icp.hw_map.kbd_intstat = icp.hw_map.kbd_ctrl + ICP_KBD_INTR_STAT; 142 143 icp.hw_map.rtc = km_map(ICP_RTC, PAGE_SIZE, 143 PAGE_ WRITE| PAGE_NOT_CACHEABLE);144 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 144 145 icp.hw_map.rtc1_load = icp.hw_map.rtc + ICP_RTC1_LOAD_OFFSET; 145 146 icp.hw_map.rtc1_read = icp.hw_map.rtc + ICP_RTC1_READ_OFFSET; … … 150 151 151 152 icp.hw_map.irqc = km_map(ICP_IRQC, PAGE_SIZE, 152 PAGE_ WRITE| PAGE_NOT_CACHEABLE);153 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 153 154 icp.hw_map.irqc_mask = icp.hw_map.irqc + ICP_IRQC_MASK_OFFSET; 154 155 icp.hw_map.irqc_unmask = icp.hw_map.irqc + ICP_IRQC_UNMASK_OFFSET; 155 156 icp.hw_map.cmcr = km_map(ICP_CMCR, PAGE_SIZE, 156 PAGE_ WRITE| PAGE_NOT_CACHEABLE);157 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 157 158 icp.hw_map.sdramcr = icp.hw_map.cmcr + ICP_SDRAMCR_OFFSET; 158 159 icp.hw_map.vga = km_map(ICP_VGA, PAGE_SIZE, 159 PAGE_ WRITE| PAGE_NOT_CACHEABLE);160 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 160 161 161 162 hw_map_init_called = true; -
kernel/arch/arm32/src/mach/raspberrypi/raspberrypi.c
r973be387 r94d211e 102 102 /* Initialize interrupt controller */ 103 103 raspi.irc = (void *) km_map(BCM2835_IRC_ADDR, sizeof(bcm2835_irc_t), 104 104 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 105 105 assert(raspi.irc); 106 106 bcm2835_irc_init(raspi.irc); … … 108 108 /* Initialize system timer */ 109 109 raspi.timer = (void *) km_map(BCM2835_TIMER_ADDR, 110 111 110 sizeof(bcm2835_timer_t), 111 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 112 112 } 113 113 -
kernel/arch/arm32/src/mm/page.c
r973be387 r94d211e 52 52 void page_arch_init(void) 53 53 { 54 int flags = PAGE_ CACHEABLE | PAGE_EXEC;54 int flags = PAGE_READ_WRITE_EXECUTE | PAGE_KERNEL | PAGE_CACHEABLE; 55 55 page_mapping_operations = &pt_mapping_operations; 56 56 -
kernel/arch/arm32/src/ras.c
r973be387 r94d211e 57 57 58 58 ras_page = (uintptr_t *) km_map(frame, 59 PAGE_SIZE, PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);59 PAGE_SIZE, PAGE_READ_WRITE | PAGE_USER | PAGE_CACHEABLE); 60 60 61 61 memsetb(ras_page, PAGE_SIZE, 0); -
kernel/arch/ia32/include/arch/mm/page.h
r973be387 r94d211e 109 109 get_pt_flags((pte_t *) (ptl0), (size_t) (i)) 110 110 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 111 PAGE_ PRESENT111 PAGE_NEXT_LEVEL_PT 112 112 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 113 PAGE_ PRESENT113 PAGE_NEXT_LEVEL_PT 114 114 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ 115 115 get_pt_flags((pte_t *) (ptl3), (size_t) (i)) … … 138 138 #define PTE_GET_FRAME_ARCH(p) \ 139 139 ((p)->frame_address << FRAME_WIDTH) 140 #define PTE_READABLE_ARCH(p) \ 141 1 140 142 #define PTE_WRITABLE_ARCH(p) \ 141 143 ((p)->writeable != 0) 142 #define PTE_EXECUTABLE_ARCH(p) 1 144 #define PTE_EXECUTABLE_ARCH(p) \ 145 1 143 146 144 147 #ifndef __ASSEMBLER__ … … 184 187 pte_t *p = &pt[i]; 185 188 186 return (( !p->page_cache_disable) << PAGE_CACHEABLE_SHIFT|187 (!p->present) << PAGE_ PRESENT_SHIFT |188 p->uaccessible << PAGE_USER_SHIFT|189 1 << PAGE_READ_SHIFT|189 return ((p->page_cache_disable ? PAGE_NOT_CACHEABLE : PAGE_CACHEABLE) | 190 (!p->present) << PAGE_NOT_PRESENT_SHIFT | 191 (p->uaccessible ? PAGE_USER : PAGE_KERNEL) | 192 _PAGE_READ | 190 193 p->writeable << PAGE_WRITE_SHIFT | 191 1 << PAGE_EXEC_SHIFT|194 _PAGE_EXEC | 192 195 p->global << PAGE_GLOBAL_SHIFT); 193 196 } … … 199 202 p->page_cache_disable = !(flags & PAGE_CACHEABLE); 200 203 p->present = !(flags & PAGE_NOT_PRESENT); 201 p->uaccessible = (flags & PAGE_USER) != 0;202 p->writeable = (flags & PAGE_WRITE) != 0;204 p->uaccessible = !(flags & PAGE_KERNEL); 205 p->writeable = (flags & _PAGE_WRITE) != 0; 203 206 p->global = (flags & PAGE_GLOBAL) != 0; 204 207 -
kernel/arch/ia32/src/mm/page.c
r973be387 r94d211e 70 70 for (cur = 0; cur < min(config.identity_size, config.physmem_end); 71 71 cur += FRAME_SIZE) { 72 flags = PAGE_ GLOBAL | PAGE_CACHEABLE | PAGE_WRITE | PAGE_READ;72 flags = PAGE_READ_WRITE | PAGE_KERNEL | PAGE_GLOBAL | PAGE_CACHEABLE; 73 73 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); 74 74 } -
kernel/arch/ia32/src/smp/smp.c
r973be387 r94d211e 75 75 76 76 if (config.cpu_count > 1) { 77 l_apic = (uint32_t *) km_map((uintptr_t) l_apic, PAGE_SIZE, 78 PAGE_WRITE | PAGE_NOT_CACHEABLE); 79 io_apic = (uint32_t *) km_map((uintptr_t) io_apic, PAGE_SIZE, 80 PAGE_WRITE | PAGE_NOT_CACHEABLE); 77 l_apic = (uint32_t *) km_map((uintptr_t) l_apic, 78 PAGE_SIZE, 79 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 80 io_apic = (uint32_t *) km_map((uintptr_t) io_apic, 81 PAGE_SIZE, 82 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 81 83 } 82 84 } -
kernel/arch/ia32/src/vreg.c
r973be387 r94d211e 68 68 69 69 page = (uint32_t *) km_map(frame, PAGE_SIZE, 70 PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);70 PAGE_READ_WRITE | PAGE_USER | PAGE_CACHEABLE); 71 71 72 72 gdt_setbase(&gdt_p[VREG_DES], (uintptr_t) page); -
kernel/arch/ia64/src/ia64.c
r973be387 r94d211e 106 106 { 107 107 uintptr_t IOSAPIC = km_map(iosapic_base, PAGE_SIZE, 108 PAGE_ WRITE| PAGE_NOT_CACHEABLE);108 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 109 109 int i; 110 110 … … 135 135 /* Map the page with legacy I/O. */ 136 136 legacyio_virt_base = km_map(LEGACYIO_PHYS_BASE, LEGACYIO_SIZE, 137 PAGE_ WRITE| PAGE_NOT_CACHEABLE);137 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 138 138 139 139 iosapic_init(); -
kernel/arch/ia64/src/mm/page.c
r973be387 r94d211e 246 246 v->present.d = false; /* not dirty */ 247 247 v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL; 248 v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;249 v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;248 v->present.ar = (flags & _PAGE_WRITE) ? AR_WRITE : AR_READ; 249 v->present.ar |= (flags & _PAGE_EXEC) ? AR_EXECUTE : 0; 250 250 v->present.ppn = frame >> PPN_SHIFT; 251 251 v->present.ed = false; /* exception not deffered */ -
kernel/arch/mips32/include/arch/mm/page.h
r973be387 r94d211e 114 114 get_pt_flags((pte_t *) (ptl0), (size_t) (i)) 115 115 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 116 PAGE_ PRESENT116 PAGE_NEXT_LEVEL_PT 117 117 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 118 PAGE_ PRESENT118 PAGE_NEXT_LEVEL_PT 119 119 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ 120 120 get_pt_flags((pte_t *) (ptl3), (size_t) (i)) … … 140 140 #define PTE_PRESENT_ARCH(pte) ((pte)->p != 0) 141 141 #define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) 142 #define PTE_READABLE_ARCH(pte) 1 142 143 #define PTE_WRITABLE_ARCH(pte) ((pte)->w != 0) 143 144 #define PTE_EXECUTABLE_ARCH(pte) 1 … … 147 148 #include <mm/mm.h> 148 149 #include <arch/exception.h> 150 151 // FIXME: PAGE_USER / PAGE_KERNEL handling? 149 152 150 153 /** Page Table Entry. */ … … 167 170 168 171 return ((p->cacheable << PAGE_CACHEABLE_SHIFT) | 169 ((!p->p) << PAGE_ PRESENT_SHIFT) |172 ((!p->p) << PAGE_NOT_PRESENT_SHIFT) | 170 173 (1 << PAGE_USER_SHIFT) | 171 174 (1 << PAGE_READ_SHIFT) | … … 182 185 p->p = !(flags & PAGE_NOT_PRESENT); 183 186 p->g = (flags & PAGE_GLOBAL) != 0; 184 p->w = (flags & PAGE_WRITE) != 0;187 p->w = (flags & _PAGE_WRITE) != 0; 185 188 186 189 /* -
kernel/arch/ppc32/include/arch/mm/page.h
r973be387 r94d211e 111 111 112 112 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 113 PAGE_ PRESENT113 PAGE_NEXT_LEVEL_PT 114 114 115 115 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 116 PAGE_ PRESENT116 PAGE_NEXT_LEVEL_PT 117 117 118 118 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ … … 143 143 #define PTE_PRESENT_ARCH(pte) ((pte)->present != 0) 144 144 #define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) 145 #define PTE_READABLE_ARCH(pte) 1 145 146 #define PTE_WRITABLE_ARCH(pte) 1 146 147 #define PTE_EXECUTABLE_ARCH(pte) 1 … … 167 168 168 169 return (((!entry->page_cache_disable) << PAGE_CACHEABLE_SHIFT) | 169 ((!entry->present) << PAGE_ PRESENT_SHIFT) |170 ((!entry->present) << PAGE_NOT_PRESENT_SHIFT) | 170 171 (1 << PAGE_USER_SHIFT) | 171 172 (1 << PAGE_READ_SHIFT) | -
kernel/arch/ppc32/src/drivers/pic.c
r973be387 r94d211e 42 42 void pic_init(uintptr_t base, size_t size, cir_t *cir, void **cir_arg) 43 43 { 44 pic = (uint32_t *) km_map(base, size, PAGE_WRITE | PAGE_NOT_CACHEABLE); 44 pic = (uint32_t *) km_map(base, size, 45 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 45 46 *cir = pic_ack_interrupt; 46 47 *cir_arg = NULL; -
kernel/arch/ppc32/src/ppc32.c
r973be387 r94d211e 242 242 243 243 cuda_t *cuda = (cuda_t *) (km_map(aligned_addr, offset + size, 244 PAGE_ WRITE| PAGE_NOT_CACHEABLE) + offset);244 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE) + offset); 245 245 246 246 /* Initialize I/O controller */ -
kernel/arch/riscv64/include/arch/mm/page.h
r973be387 r94d211e 82 82 83 83 /* Flags mask for non-leaf page table entries */ 84 #define NON_LEAF_MASK (~( PAGE_READ | PAGE_WRITE |PAGE_EXEC))84 #define NON_LEAF_MASK (~(_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)) 85 85 86 86 /* Get PTE address accessors for each level. */ … … 156 156 #define PTE_PRESENT_ARCH(pte) ((pte)->valid != 0) 157 157 #define PTE_GET_FRAME_ARCH(pte) ((uintptr_t) (pte)->pfn << 12) 158 #define PTE_READABLE_ARCH(pte) ((pte)->readable != 0) 158 159 #define PTE_WRITABLE_ARCH(pte) ((pte)->writable != 0) 159 160 #define PTE_EXECUTABLE_ARCH(pte) ((pte)->executable != 0) … … 183 184 pte_t *entry = &pt[i]; 184 185 185 return (((!entry->valid) << PAGE_ PRESENT_SHIFT) |186 return (((!entry->valid) << PAGE_NOT_PRESENT_SHIFT) | 186 187 (entry->user << PAGE_USER_SHIFT) | 187 188 (entry->readable << PAGE_READ_SHIFT) | … … 196 197 197 198 entry->valid = !(flags & PAGE_NOT_PRESENT); 198 entry->readable = (flags & PAGE_READ) != 0;199 entry->writable = (flags & PAGE_WRITE) != 0;200 entry->executable = (flags & PAGE_EXEC) != 0;199 entry->readable = (flags & _PAGE_READ) != 0; 200 entry->writable = (flags & _PAGE_WRITE) != 0; 201 entry->executable = (flags & _PAGE_EXEC) != 0; 201 202 entry->user = (flags & PAGE_USER) != 0; 202 203 entry->global = (flags & PAGE_GLOBAL) != 0; -
kernel/arch/riscv64/src/mm/page.c
r973be387 r94d211e 63 63 cur += FRAME_SIZE) 64 64 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, 65 PAGE_ GLOBAL | PAGE_CACHEABLE | PAGE_EXEC | PAGE_WRITE | PAGE_READ);65 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_GLOBAL | PAGE_CACHEABLE); 66 66 67 67 page_table_unlock(AS_KERNEL, true); -
kernel/arch/sparc64/src/drivers/kbd.c
r973be387 r94d211e 119 119 120 120 ioport8_t *ns16550 = (ioport8_t *) (km_map(aligned_addr, offset + size, 121 PAGE_ WRITE| PAGE_NOT_CACHEABLE) + offset);121 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE) + offset); 122 122 123 123 ns16550_instance_t *ns16550_instance = ns16550_init(ns16550, 0, inr, cir, -
kernel/arch/sparc64/src/drivers/pci.c
r973be387 r94d211e 110 110 pci->op = &pci_sabre_ops; 111 111 pci->reg = (uint64_t *) km_map(paddr, reg[SABRE_INTERNAL_REG].size, 112 PAGE_ WRITE| PAGE_NOT_CACHEABLE);112 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 113 113 114 114 return pci; … … 152 152 pci->op = &pci_psycho_ops; 153 153 pci->reg = (uint64_t *) km_map(paddr, reg[PSYCHO_INTERNAL_REG].size, 154 PAGE_ WRITE| PAGE_NOT_CACHEABLE);154 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 155 155 156 156 return pci; -
kernel/genarch/include/genarch/drivers/amdm37x/gpt.h
r973be387 r94d211e 208 208 // TODO find a nicer way to setup 32kHz clock source for timer1 209 209 // reg 0x48004C40 is CM_CLKSEL_WKUP see page 485 of the manual 210 ioport32_t *clksel = (void*) km_map(0x48004C40, 4, PAGE_NOT_CACHEABLE); 210 ioport32_t *clksel = (void*) km_map(0x48004C40, 4, 211 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 211 212 *clksel &= ~1; 212 213 km_unmap((uintptr_t)clksel, 4); … … 214 215 assert(timer); 215 216 /* Map control register */ 216 timer->regs = (void*) km_map(ioregs, iosize, PAGE_NOT_CACHEABLE); 217 timer->regs = (void*) km_map(ioregs, iosize, 218 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 217 219 218 220 /* Reset the timer */ -
kernel/genarch/include/genarch/mm/page_pt.h
r973be387 r94d211e 136 136 #define PTE_PRESENT(p) PTE_PRESENT_ARCH((p)) 137 137 #define PTE_GET_FRAME(p) PTE_GET_FRAME_ARCH((p)) 138 #define PTE_READABLE(p) 1138 #define PTE_READABLE(p) PTE_READABLE_ARCH((p)) 139 139 #define PTE_WRITABLE(p) PTE_WRITABLE_ARCH((p)) 140 140 #define PTE_EXECUTABLE(p) PTE_EXECUTABLE_ARCH((p)) -
kernel/genarch/src/acpi/acpi.c
r973be387 r94d211e 104 104 /* Start with mapping the header only. */ 105 105 vhdr = (struct acpi_sdt_header *) km_map((uintptr_t) psdt, 106 sizeof(struct acpi_sdt_header), PAGE_READ | PAGE_NOT_CACHEABLE); 106 sizeof(struct acpi_sdt_header), 107 PAGE_READ_ONLY | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 107 108 108 109 /* Now we can map the entire structure. */ 109 110 vsdt = (struct acpi_sdt_header *) km_map((uintptr_t) psdt, 110 vhdr->length, PAGE_WRITE | PAGE_NOT_CACHEABLE); 111 vhdr->length, 112 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 111 113 112 114 // TODO: do not leak vtmp -
kernel/genarch/src/drivers/am335x/timer.c
r973be387 r94d211e 100 100 size = regs_map[id].size; 101 101 102 timer->regs = (void *) km_map(base_addr, size, PAGE_NOT_CACHEABLE); 102 timer->regs = (void *) km_map(base_addr, size, 103 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 103 104 assert(timer->regs != NULL); 104 105 -
kernel/genarch/src/drivers/bcm2835/mbox.c
r973be387 r94d211e 91 91 92 92 fb_mbox = (void *) km_map(BCM2835_MBOX0_ADDR, sizeof(bcm2835_mbox_t), 93 93 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 94 94 95 95 fb_desc->width = 640; -
kernel/genarch/src/drivers/ega/ega.c
r973be387 r94d211e 601 601 instance->base = base; 602 602 instance->addr = (uint8_t *) km_map(addr, EGA_VRAM_SIZE, 603 PAGE_ WRITE| PAGE_NOT_CACHEABLE);603 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 604 604 if (!instance->addr) { 605 605 LOG("Unable to EGA video memory."); -
kernel/genarch/src/drivers/omap/uart.c
r973be387 r94d211e 87 87 { 88 88 assert(uart); 89 uart->regs = (void *)km_map(addr, size, PAGE_NOT_CACHEABLE); 89 uart->regs = (void *)km_map(addr, size, 90 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 90 91 91 92 assert(uart->regs); -
kernel/genarch/src/drivers/pl011/pl011.c
r973be387 r94d211e 100 100 assert(uart); 101 101 uart->regs = (void*)km_map(addr, sizeof(pl011_uart_regs_t), 102 102 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 103 103 assert(uart->regs); 104 104 -
kernel/genarch/src/drivers/s3c24xx/uart.c
r973be387 r94d211e 117 117 118 118 uart->io = (s3c24xx_uart_io_t *) km_map(paddr, PAGE_SIZE, 119 PAGE_ WRITE| PAGE_NOT_CACHEABLE);119 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 120 120 uart->indev = NULL; 121 121 -
kernel/genarch/src/fb/fb.c
r973be387 r94d211e 610 610 611 611 instance->addr = (uint8_t *) km_map((uintptr_t) props->addr, fbsize, 612 PAGE_ WRITE| PAGE_NOT_CACHEABLE);612 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 613 613 if (!instance->addr) { 614 614 LOG("Unable to map framebuffer."); -
kernel/genarch/src/mm/page_ht.c
r973be387 r94d211e 61 61 static void ht_mapping_remove(as_t *, uintptr_t); 62 62 static bool ht_mapping_find(as_t *, uintptr_t, bool, pte_t *); 63 static void ht_mapping_update(as_t *, uintptr_t, bool, pte_t *);63 static void ht_mapping_update(as_t *, uintptr_t, bool, const pte_t *); 64 64 static void ht_mapping_make_global(uintptr_t, size_t); 65 65 … … 168 168 169 169 pte->g = (flags & PAGE_GLOBAL) != 0; 170 pte->x = (flags & PAGE_EXEC) != 0;171 pte->w = (flags & PAGE_WRITE) != 0;170 pte->x = (flags & _PAGE_EXEC) != 0; 171 pte->w = (flags & _PAGE_WRITE) != 0; 172 172 pte->k = !(flags & PAGE_USER); 173 173 pte->c = (flags & PAGE_CACHEABLE) != 0; … … 268 268 * @param pte New PTE. 269 269 */ 270 void ht_mapping_update(as_t *as, uintptr_t page, bool nolock, pte_t *pte)270 void ht_mapping_update(as_t *as, uintptr_t page, bool nolock, const pte_t *pte) 271 271 { 272 272 irq_spinlock_lock(&page_ht_lock, true); -
kernel/genarch/src/mm/page_pt.c
r973be387 r94d211e 55 55 static void pt_mapping_remove(as_t *, uintptr_t); 56 56 static bool pt_mapping_find(as_t *, uintptr_t, bool, pte_t *pte); 57 static void pt_mapping_update(as_t *, uintptr_t, bool, pte_t *pte);57 static void pt_mapping_update(as_t *, uintptr_t, bool, const pte_t *pte); 58 58 static void pt_mapping_make_global(uintptr_t, size_t); 59 59 … … 90 90 SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt)); 91 91 SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page), 92 PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | 93 PAGE_WRITE); 92 PAGE_NOT_PRESENT | PAGE_NEXT_LEVEL_PT); 94 93 /* 95 94 * Make sure that a concurrent hardware page table walk or … … 109 108 SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt)); 110 109 SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page), 111 PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | 112 PAGE_WRITE); 110 PAGE_NOT_PRESENT | PAGE_NEXT_LEVEL_PT); 113 111 /* 114 112 * Make the new PTL2 visible only after it is fully initialized. … … 126 124 SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt)); 127 125 SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page), 128 PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | 129 PAGE_WRITE); 126 PAGE_NOT_PRESENT | PAGE_NEXT_LEVEL_PT); 130 127 /* 131 128 * Make the new PTL3 visible only after it is fully initialized. … … 353 350 * @param[in] pte New PTE. 354 351 */ 355 void pt_mapping_update(as_t *as, uintptr_t page, bool nolock, pte_t *pte)352 void pt_mapping_update(as_t *as, uintptr_t page, bool nolock, const pte_t *pte) 356 353 { 357 354 pte_t *t = pt_mapping_find_internal(as, page, nolock); … … 431 428 SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(addr), KA2PA(l1)); 432 429 SET_PTL1_FLAGS(ptl0, PTL0_INDEX(addr), 433 PAGE_PRESENT | PAGE_USER | PAGE_CACHEABLE | 434 PAGE_EXEC | PAGE_WRITE | PAGE_READ); 430 PAGE_NEXT_LEVEL_PT); 435 431 } 436 432 } -
kernel/generic/include/mm/mm.h
r973be387 r94d211e 36 36 #define KERN_MM_H_ 37 37 38 # define PAGE_CACHEABLE_SHIFT 039 # define PAGE_NOT_CACHEABLE_SHIFT PAGE_CACHEABLE_SHIFT40 #define PAGE_PRESENT_SHIFT 1 41 #define PAGE_NOT_ PRESENT_SHIFT PAGE_PRESENT_SHIFT42 #define PAGE_ USER_SHIFT 243 #define PAGE_ KERNEL_SHIFT PAGE_USER_SHIFT38 #include <assert.h> 39 #include <stdbool.h> 40 41 #define PAGE_NOT_CACHEABLE_SHIFT 0 42 #define PAGE_CACHEABLE_SHIFT 1 43 #define PAGE_NOT_PRESENT_SHIFT 2 44 44 #define PAGE_READ_SHIFT 3 45 45 #define PAGE_WRITE_SHIFT 4 46 46 #define PAGE_EXEC_SHIFT 5 47 47 #define PAGE_GLOBAL_SHIFT 6 48 #define PAGE_USER_SHIFT 7 49 #define PAGE_KERNEL_SHIFT 8 48 50 49 #define PAGE_NOT_CACHEABLE (0 << PAGE_CACHEABLE_SHIFT) 51 /* Cacheability. 52 * Platform-independent code should always use PAGE_CACHEABLE for normal memory, 53 * and PAGE_NOT_CACHEABLE for I/O memory. 54 * In particular, setting PAGE_NOT_CACHEABLE on normal memory does not prevent 55 * caching on all platforms. You have been warned. 56 * Exactly one must be present for leaf pages. 57 * None may be present for non-leaf entries. 58 */ 59 60 #define PAGE_NOT_CACHEABLE (1 << PAGE_NOT_CACHEABLE_SHIFT) 50 61 #define PAGE_CACHEABLE (1 << PAGE_CACHEABLE_SHIFT) 51 62 52 #define PAGE_PRESENT (0 << PAGE_PRESENT_SHIFT)53 #define PAGE_NOT_PRESENT (1 << PAGE_PRESENT_SHIFT)54 63 55 #define PAGE_USER (1 << PAGE_USER_SHIFT) 56 #define PAGE_KERNEL (0 << PAGE_USER_SHIFT) 64 /* Discriminant, exactly one of the following seven must be set for 65 * the flags to be valid. Furthermore, the first two are only legal 66 * for setting individual page table entries. Setting an entry 67 * to PAGE_NOT_PRESENT renders the entry eligible for removal. 68 * In an earlier iteration of this interface, page could be not 69 * present but valid, preventing removal. This has been changed, and 70 * if future iterations allow kernel to hide data (e.g. swap identifiers) 71 * in page tables, it should be achieved by adding a separate discriminant. 72 */ 73 #define PAGE_NOT_PRESENT (1 << PAGE_NOT_PRESENT_SHIFT) 57 74 58 #define PAGE_READ (1 << PAGE_READ_SHIFT) 59 #define PAGE_WRITE (1 << PAGE_WRITE_SHIFT) 60 #define PAGE_EXEC (1 << PAGE_EXEC_SHIFT) 75 // TODO: This will be a separate flag. 76 #define PAGE_NEXT_LEVEL_PT (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC | PAGE_USER | PAGE_CACHEABLE) 61 77 62 #define PAGE_GLOBAL (1 << PAGE_GLOBAL_SHIFT) 78 #define PAGE_READ_ONLY (_PAGE_READ) 79 #define PAGE_READ_EXECUTE (_PAGE_READ | _PAGE_EXEC) 80 #define PAGE_READ_WRITE (_PAGE_READ | _PAGE_WRITE) 81 #define PAGE_READ_WRITE_EXECUTE (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC) 82 #define PAGE_EXECUTE_ONLY (_PAGE_EXEC) 83 84 /* Individual permissions. 85 * Only used when the flags are tested or translated from other 86 * format. In constant flags, use one of the combinations above. 87 */ 88 #define _PAGE_READ (1 << PAGE_READ_SHIFT) 89 #define _PAGE_WRITE (1 << PAGE_WRITE_SHIFT) 90 #define _PAGE_EXEC (1 << PAGE_EXEC_SHIFT) 91 92 /* Global page. Can be combined with anything except PAGE_NOT_PRESENT. 93 * PAGE_GLOBAL on non-leaf entry means all the leaf entries under it are global, 94 * even if they don't have the PAGE_GLOBAL flag themselves. 95 */ 96 #define PAGE_GLOBAL (1 << PAGE_GLOBAL_SHIFT) 97 98 /* Protection. 99 * PAGE_USER for memory accessible to userspace programs, PAGE_KERNEL for 100 * memory accessible only to the kernel. Note that on some platforms, 101 * PAGE_USER pages are accessible to kernel, while on others, they are not. 102 * For non-leaf entries, PAGE_USER means that all of the lower-level pages 103 * are PAGE_USER, likewise with PAGE_KERNEL. Exactly one of these two must be 104 * used for leaf entries, but it may be omitted for non-leaf entries. 105 */ 106 #define PAGE_USER (1 << PAGE_USER_SHIFT) 107 #define PAGE_KERNEL (1 << PAGE_KERNEL_SHIFT) 108 109 110 111 static inline bool PAGE_FLAGS_VALID(unsigned flags) { 112 // TODO 113 114 /* Empty entry supports no flags. */ 115 if (flags & PAGE_NOT_PRESENT) 116 return flags == PAGE_NOT_PRESENT; 117 118 /* PAGE_USER and PAGE_KERNEL are mutually exclusive. */ 119 if ((flags & PAGE_USER) && (flags & PAGE_KERNEL)) 120 return false; 121 122 /* Check allowed flags for non-leaf entry. */ 123 if (flags & PAGE_NEXT_LEVEL_PT) 124 return flags == (flags & (PAGE_NEXT_LEVEL_PT | PAGE_GLOBAL | PAGE_USER | PAGE_KERNEL)); 125 126 /* Leaf entries only. */ 127 128 /* Check that at least one permission is set. */ 129 if (!(flags & (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC))) 130 return false; 131 132 /* Check that write implies read. */ 133 if ((flags & _PAGE_WRITE) && !(flags & _PAGE_READ)) 134 return false; 135 136 /* One of PAGE_USER and PAGE_KERNEL must be used. */ 137 if (!(flags & (PAGE_USER | PAGE_KERNEL))) 138 return false; 139 140 /* One of PAGE_CACHEABLE and PAGE_NOT_CACHEABLE must be used. */ 141 if ((flags & PAGE_CACHEABLE) && (flags & PAGE_NOT_CACHEABLE)) 142 return false; 143 if (!(flags & (PAGE_CACHEABLE | PAGE_NOT_CACHEABLE))) 144 return false; 145 146 return true; 147 } 63 148 64 149 #endif -
kernel/generic/include/mm/page.h
r973be387 r94d211e 49 49 void (*mapping_remove)(as_t *, uintptr_t); 50 50 bool (*mapping_find)(as_t *, uintptr_t, bool, pte_t *); 51 void (*mapping_update)(as_t *, uintptr_t, bool, pte_t *);51 void (*mapping_update)(as_t *, uintptr_t, bool, const pte_t *); 52 52 void (*mapping_make_global)(uintptr_t, size_t); 53 53 } page_mapping_operations_t; -
kernel/generic/src/console/cmd.c
r973be387 r94d211e 727 727 else 728 728 #endif 729 ptr = (uint8_t *) km_map(argv[0].intval, sizeof(uint8_t), 730 PAGE_NOT_CACHEABLE); 729 ptr = (uint8_t *) km_map( 730 argv[0].intval, sizeof(uint8_t), 731 PAGE_READ_ONLY | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 731 732 732 733 const uint8_t val = pio_read_8(ptr); … … 749 750 */ 750 751 static int cmd_pio_read_16(cmd_arg_t *argv) 752 { 753 uint16_t *ptr = NULL; 754 755 #ifdef IO_SPACE_BOUNDARY 756 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 757 ptr = (void *) argv[0].intval; 758 else 759 #endif 760 ptr = (uint16_t *) km_map( 761 argv[0].intval, sizeof(uint16_t), 762 PAGE_READ_ONLY | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 763 764 const uint16_t val = pio_read_16(ptr); 765 printf("read %" PRIxn ": %" PRIx16 "\n", argv[0].intval, val); 766 767 #ifdef IO_SPACE_BOUNDARY 768 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 769 return 1; 770 #endif 771 772 km_unmap((uintptr_t) ptr, sizeof(uint16_t)); 773 return 1; 774 } 775 776 /** Read 4 bytes from phys memory or io port. 777 * 778 * @param argv Argument vector. 779 * 780 * @return 0 on failure, 1 on success. 781 */ 782 static int cmd_pio_read_32(cmd_arg_t *argv) 783 { 784 uint32_t *ptr = NULL; 785 786 #ifdef IO_SPACE_BOUNDARY 787 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 788 ptr = (void *) argv[0].intval; 789 else 790 #endif 791 ptr = (uint32_t *) km_map( 792 argv[0].intval, sizeof(uint32_t), 793 PAGE_READ_ONLY | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 794 795 const uint32_t val = pio_read_32(ptr); 796 printf("read %" PRIxn ": %" PRIx32 "\n", argv[0].intval, val); 797 798 #ifdef IO_SPACE_BOUNDARY 799 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 800 return 1; 801 #endif 802 803 km_unmap((uintptr_t) ptr, sizeof(uint32_t)); 804 return 1; 805 } 806 807 /** Write 1 byte to phys memory or io port. 808 * 809 * @param argv Argument vector. 810 * 811 * @return 0 on failure, 1 on success. 812 */ 813 static int cmd_pio_write_8(cmd_arg_t *argv) 814 { 815 uint8_t *ptr = NULL; 816 817 #ifdef IO_SPACE_BOUNDARY 818 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 819 ptr = (void *) argv[0].intval; 820 else 821 #endif 822 ptr = (uint8_t *) km_map(argv[0].intval, sizeof(uint8_t), 823 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 824 825 printf("write %" PRIxn ": %" PRIx8 "\n", argv[0].intval, 826 (uint8_t) argv[1].intval); 827 pio_write_8(ptr, (uint8_t) argv[1].intval); 828 829 #ifdef IO_SPACE_BOUNDARY 830 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 831 return 1; 832 #endif 833 834 km_unmap((uintptr_t) ptr, sizeof(uint8_t)); 835 return 1; 836 } 837 838 /** Write 2 bytes to phys memory or io port. 839 * 840 * @param argv Argument vector. 841 * 842 * @return 0 on failure, 1 on success. 843 */ 844 static int cmd_pio_write_16(cmd_arg_t *argv) 751 845 { 752 846 uint16_t *ptr = NULL; … … 758 852 #endif 759 853 ptr = (uint16_t *) km_map(argv[0].intval, sizeof(uint16_t), 760 PAGE_NOT_CACHEABLE); 761 762 const uint16_t val = pio_read_16(ptr); 763 printf("read %" PRIxn ": %" PRIx16 "\n", argv[0].intval, val); 854 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 855 856 printf("write %" PRIxn ": %" PRIx16 "\n", argv[0].intval, 857 (uint16_t) argv[1].intval); 858 pio_write_16(ptr, (uint16_t) argv[1].intval); 764 859 765 860 #ifdef IO_SPACE_BOUNDARY … … 772 867 } 773 868 774 /** Read 4 bytes fromphys memory or io port.869 /** Write 4 bytes to phys memory or io port. 775 870 * 776 871 * @param argv Argument vector. … … 778 873 * @return 0 on failure, 1 on success. 779 874 */ 780 static int cmd_pio_ read_32(cmd_arg_t *argv)875 static int cmd_pio_write_32(cmd_arg_t *argv) 781 876 { 782 877 uint32_t *ptr = NULL; … … 788 883 #endif 789 884 ptr = (uint32_t *) km_map(argv[0].intval, sizeof(uint32_t), 790 PAGE_NOT_CACHEABLE); 791 792 const uint32_t val = pio_read_32(ptr); 793 printf("read %" PRIxn ": %" PRIx32 "\n", argv[0].intval, val); 794 795 #ifdef IO_SPACE_BOUNDARY 796 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 797 return 1; 798 #endif 799 800 km_unmap((uintptr_t) ptr, sizeof(uint32_t)); 801 return 1; 802 } 803 804 /** Write 1 byte to phys memory or io port. 805 * 806 * @param argv Argument vector. 807 * 808 * @return 0 on failure, 1 on success. 809 */ 810 static int cmd_pio_write_8(cmd_arg_t *argv) 811 { 812 uint8_t *ptr = NULL; 813 814 #ifdef IO_SPACE_BOUNDARY 815 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 816 ptr = (void *) argv[0].intval; 817 else 818 #endif 819 ptr = (uint8_t *) km_map(argv[0].intval, sizeof(uint8_t), 820 PAGE_NOT_CACHEABLE); 821 822 printf("write %" PRIxn ": %" PRIx8 "\n", argv[0].intval, 823 (uint8_t) argv[1].intval); 824 pio_write_8(ptr, (uint8_t) argv[1].intval); 825 826 #ifdef IO_SPACE_BOUNDARY 827 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 828 return 1; 829 #endif 830 831 km_unmap((uintptr_t) ptr, sizeof(uint8_t)); 832 return 1; 833 } 834 835 /** Write 2 bytes to phys memory or io port. 836 * 837 * @param argv Argument vector. 838 * 839 * @return 0 on failure, 1 on success. 840 */ 841 static int cmd_pio_write_16(cmd_arg_t *argv) 842 { 843 uint16_t *ptr = NULL; 844 845 #ifdef IO_SPACE_BOUNDARY 846 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 847 ptr = (void *) argv[0].intval; 848 else 849 #endif 850 ptr = (uint16_t *) km_map(argv[0].intval, sizeof(uint16_t), 851 PAGE_NOT_CACHEABLE); 852 853 printf("write %" PRIxn ": %" PRIx16 "\n", argv[0].intval, 854 (uint16_t) argv[1].intval); 855 pio_write_16(ptr, (uint16_t) argv[1].intval); 856 857 #ifdef IO_SPACE_BOUNDARY 858 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 859 return 1; 860 #endif 861 862 km_unmap((uintptr_t) ptr, sizeof(uint16_t)); 863 return 1; 864 } 865 866 /** Write 4 bytes to phys memory or io port. 867 * 868 * @param argv Argument vector. 869 * 870 * @return 0 on failure, 1 on success. 871 */ 872 static int cmd_pio_write_32(cmd_arg_t *argv) 873 { 874 uint32_t *ptr = NULL; 875 876 #ifdef IO_SPACE_BOUNDARY 877 if ((void *) argv->intval < IO_SPACE_BOUNDARY) 878 ptr = (void *) argv[0].intval; 879 else 880 #endif 881 ptr = (uint32_t *) km_map(argv[0].intval, sizeof(uint32_t), 882 PAGE_NOT_CACHEABLE); 885 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 883 886 884 887 printf("write %" PRIxn ": %" PRIx32 "\n", argv[0].intval, -
kernel/generic/src/ipc/irq.c
r973be387 r94d211e 93 93 #endif 94 94 ranges[i].base = km_map(pbase[i], ranges[i].size, 95 PAGE_READ | PAGE_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE);95 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE); 96 96 if (!ranges[i].base) { 97 97 ranges_unmap(ranges, i); -
kernel/generic/src/main/kinit.c
r973be387 r94d211e 250 250 uintptr_t page = km_map(init.tasks[i].paddr, 251 251 init.tasks[i].size, 252 PAGE_READ | PAGE_WRITE| PAGE_CACHEABLE);252 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_CACHEABLE); 253 253 assert(page); 254 254 -
kernel/generic/src/mm/as.c
r973be387 r94d211e 1217 1217 NO_TRACE static unsigned int area_flags_to_page_flags(unsigned int aflags) 1218 1218 { 1219 unsigned int flags = PAGE_USER | PAGE_PRESENT;1219 unsigned int flags = PAGE_USER; 1220 1220 1221 1221 if (aflags & AS_AREA_READ) 1222 flags |= PAGE_READ;1222 flags |= _PAGE_READ; 1223 1223 1224 1224 if (aflags & AS_AREA_WRITE) 1225 flags |= PAGE_WRITE;1225 flags |= _PAGE_WRITE; 1226 1226 1227 1227 if (aflags & AS_AREA_EXEC) 1228 flags |= PAGE_EXEC;1228 flags |= _PAGE_EXEC; 1229 1229 1230 1230 if (aflags & AS_AREA_CACHEABLE) 1231 1231 flags |= PAGE_CACHEABLE; 1232 else 1233 flags |= PAGE_NOT_CACHEABLE; 1232 1234 1233 1235 return flags; -
kernel/generic/src/mm/km.c
r973be387 r94d211e 257 257 if (frame) { 258 258 page = km_map(frame, PAGE_SIZE, 259 PAGE_READ | PAGE_WRITE| PAGE_CACHEABLE);259 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_CACHEABLE); 260 260 if (!page) { 261 261 frame_free(frame, 1); -
kernel/test/mm/mapping1.c
r973be387 r94d211e 44 44 45 45 uintptr_t page0 = km_map(frame, FRAME_SIZE, 46 PAGE_READ | PAGE_WRITE| PAGE_CACHEABLE);46 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_CACHEABLE); 47 47 TPRINTF("Virtual address %p mapped to physical address %p.\n", 48 48 (void *) page0, (void *) frame); 49 49 50 50 uintptr_t page1 = km_map(frame, FRAME_SIZE, 51 PAGE_READ | PAGE_WRITE| PAGE_CACHEABLE);51 PAGE_READ_WRITE | PAGE_KERNEL | PAGE_CACHEABLE); 52 52 TPRINTF("Virtual address %p mapped to physical address %p.\n", 53 53 (void *) page1, (void *) frame);
Note:
See TracChangeset
for help on using the changeset viewer.