Changeset 973be64e in mainline for arch/mips32/src/interrupt.c

Timestamp:

2005-12-10T00:19:57Z (19 years ago)

Author:

Ondrej Palkovsky <ondrap@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

fcfac420

Parents:

705b4149

Message:

Added generic exc_register/exc_dispatch functions,
copied from ia32 architecture. Currently only mips32 uses them.

The chardev_t can now be both input & output device (was
needed for serial driver).

Broken other architectures - ia64, sparc, powerpc will not compile.

Mips32 supports input on all msim, gxemul, indy(tested emulation
in gxemul, loses characters), simics. Simics serial line
is done using polling, I was unable to make it produce
an interrupt when the key was pressed.

File:

• arch/mips32/src/interrupt.c (modified) (4 diffs)

arch/mips32/src/interrupt.c

@@ -27 +27 @@
  */
 
+#include <interrupt.h>
 #include <arch/interrupt.h>
 #include <arch/types.h>
@@ -36 +37 @@
 #include <symtab.h>
 #include <arch/drivers/arc.h>
-#include <arch/drivers/keyboard.h>
 
 static void print_regdump(struct exception_regdump *pstate)
@@ -94 +94 @@
 }
 
+static void unhandled_exception(int n, void *stack)
+{
+        struct exception_regdump *pstate = (struct exception_regdump *)stack;
+
+        print_regdump(pstate);
+        panic("unhandled interrupt %d\n", n);
+}
+
+static void timer_exception(int n, void *stack)
+{
+        cp0_compare_write(cp0_count_read() + cp0_compare_value); 
+        clock();
+}
+
+static void swint0(int n, void *stack)
+{
+        cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */
+}
+
+static void swint1(int n, void *stack)
+{
+        cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */
+}
+
+/** Basic exception handler */
 void interrupt(struct exception_regdump *pstate)
 {
@@ -102 +127 @@
         cause = (cp0_cause_read() >> 8) &0xff;
         
-        for (i = 0; i < 8; i++) {
-                if (cause & (1 << i)) {
-                        switch (i) {
-                                case 0: /* SW0 - Software interrupt 0 */
-                                        cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */
-                                        break;
-                                case 1: /* SW1 - Software interrupt 1 */
-                                        cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */
-                                        break;
-                                case KEYBOARD_IRQ:
-                                        keyboard();
-                                        break;
-                                case 3:
-                                case 4: /* IRQ2 */
-                                case 5: /* IRQ3 */
-                                case 6: /* IRQ4 */
-                                default:
-                                        print_regdump(pstate);
-                                        panic("unhandled interrupt %d\n", i);
-                                        break;
-                                case TIMER_IRQ:
-                                        /* clear timer interrupt & set new */
-                                        cp0_compare_write(cp0_count_read() + cp0_compare_value); 
-                                        clock();
-                                        keyboard_poll();
-                                        break;
-                        }
-                }
-        }
+        for (i = 0; i < 8; i++)
+                if (cause & (1 << i))
+                        exc_dispatch(i, (void *)pstate);
+}
 
+/* Initialize basic tables for exception dispatching */
+void interrupt_init(void)
+{
+        int i;
+
+        for (i=0;i < IVT_ITEMS; i++)
+                exc_register(i, "undef", unhandled_exception);
+
+        exc_register(TIMER_IRQ, "timer", timer_exception);
+        exc_register(0, "swint0", swint0);
+        exc_register(1, "swint1", swint1);
 }