Changeset 97718a5 in mainline
- Timestamp:
- 2013-01-10T22:33:30Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- b9f72b97
- Parents:
- 7dc8bf1
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/fpu_context.c
r7dc8bf1 r97718a5 59 59 FPEXC_EX_FLAG = (1 << 31), 60 60 FPEXC_ENABLED_FLAG = (1 << 30), 61 };62 63 /* See Architecture reference manual ch. B4.1.40 */64 enum {65 CPACR_CP10_MASK = 0x3 << 20,66 CPACR_CP11_MASK = 0x3 << 22,67 CPACR_CP10_USER_ACCESS = CPACR_CP10_MASK,68 CPACR_CP11_USER_ACCESS = CPACR_CP11_MASK,69 NSACR_CP10_FLAG = 1 << 10,70 NSACR_CP11_FLAG = 1 << 11,71 61 }; 72 62 … … 131 121 return 1; 132 122 #endif 133 uint32_t cpacr; 134 asm volatile ("MRC p15, 0, %0, c1, c0, 2" :"=r" (cpacr)::); 123 const uint32_t cpacr = CPACR_read(); 135 124 /* FPU needs access to coprocessor 10 and 11. 136 125 * Moreover they need to have same access enabledd */ 137 if (((cpacr & CPACR_CP 10_MASK) == CPACR_CP10_USER_ACCESS) &&138 ((cpacr & CPACR_CP 11_MASK) == CPACR_CP11_USER_ACCESS))126 if (((cpacr & CPACR_CP_MASK(10)) == CPACR_CP_FULL_ACCESS(10)) && 127 ((cpacr & CPACR_CP_MASK(11)) == CPACR_CP_FULL_ACCESS(11))) 139 128 return 1; 140 129 printf("No sccess to CP10 and CP11: %" PRIx32 "\n", cpacr); … … 161 150 return; 162 151 #endif 152 #if 0 163 153 uint32_t cpr; 164 154 asm volatile("MRC p15, 0, %0, c1, c1, 0" : "=r" (cpr)::); … … 177 167 asm volatile ("isb" ::: "memory" ); 178 168 #endif 179 169 #endif 180 170 /* Allow coprocessor access */ 181 uint32_t cpacr; 182 asm volatile ("mrc p15, 0, %0, c1, c0, 2" :"=r" (cpacr)::); 171 uint32_t cpacr = CPACR_read(); 183 172 printf("CPACR before: %x\n", cpacr); 184 173 /* FPU needs access to coprocessor 10 and 11. 185 174 * Moreover, they need to have same access enabled */ 186 cpacr |= CPACR_CP10_USER_ACCESS;187 cpacr |= CPACR_CP 11_USER_ACCESS;188 asm volatile ("mcr p15, 0, %0, c1, c0, 2" :"=r" (cpacr)::);175 cpacr &= ~(CPACR_CP_MASK(10) | CPACR_CP_MASK(11)); 176 cpacr |= CPACR_CP_FULL_ACCESS(10) | CPACR_CP_FULL_ACCESS(11); 177 CPACR_write(cpacr); 189 178 printf("CPACR after: %x\n", cpacr); 190 179 191 #ifdef MACHINE_beagleboardxm 192 asm volatile ("isb" ::: "memory" ); 193 #endif 180 smc_coherence(0); 194 181 } 195 182
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