Changeset 97f1691 in mainline
- Timestamp:
- 2006-02-28T00:02:39Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 7d6ec87
- Parents:
- d87c3f3
- Files:
-
- 1 added
- 16 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/amd64/src/proc/scheduler.c
rd87c3f3 r97f1691 44 44 swapgs(); 45 45 } 46 47 void after_thread_ran_arch(void) 48 { 49 } -
arch/ia32/src/proc/scheduler.c
rd87c3f3 r97f1691 38 38 CPU->arch.tss->ss0 = selector(KDATA_DES); 39 39 } 40 41 void after_thread_ran_arch(void) 42 { 43 } -
arch/ia64/src/dummy.s
rd87c3f3 r97f1691 33 33 .global userspace 34 34 .global before_thread_runs_arch 35 .global after_thread_ran_arch 35 36 .global cpu_sleep 36 37 .global dummy … … 40 41 41 42 before_thread_runs_arch: 43 after_thread_ran_arch: 42 44 userspace: 43 45 calibrate_delay_loop: -
arch/mips32/src/mips32.c
rd87c3f3 r97f1691 135 135 supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; 136 136 } 137 138 void after_thread_ran_arch(void) 139 { 140 } -
arch/ppc32/src/dummy.s
rd87c3f3 r97f1691 32 32 .global userspace 33 33 .global before_thread_runs_arch 34 .global after_thread_ran_arch 34 35 .global dummy 35 36 .global fpu_init … … 38 39 39 40 before_thread_runs_arch: 41 after_thread_ran_arch: 40 42 userspace: 41 43 asm_delay_loop: -
arch/sparc64/Makefile.inc
rd87c3f3 r97f1691 82 82 arch/$(ARCH)/src/sparc64.c \ 83 83 arch/$(ARCH)/src/start.S \ 84 arch/$(ARCH)/src/proc/scheduler.c \ 84 85 arch/$(ARCH)/src/trap/trap_table.S \ 85 86 arch/$(ARCH)/src/trap/trap.c \ -
arch/sparc64/include/drivers/i8042.h
rd87c3f3 r97f1691 33 33 34 34 #define KBD_PHYS_ADDRESS 0x1fff8904000ULL 35 #define KBD_VIRT_ADDRESS 0x000 00d00000ULL35 #define KBD_VIRT_ADDRESS 0x000d0000000ULL 36 36 37 37 #define STATUS_REG 4 … … 41 41 static inline void i8042_data_write(__u8 data) 42 42 { 43 (( __u8 *)(KBD_VIRT_ADDRESS))[DATA_REG] = data;43 ((volatile __u8 *)(KBD_VIRT_ADDRESS))[DATA_REG] = data; 44 44 } 45 45 … … 56 56 static inline void i8042_command_write(__u8 command) 57 57 { 58 (( __u8 *)(KBD_VIRT_ADDRESS))[COMMAND_REG] = command;58 ((volatile __u8 *)(KBD_VIRT_ADDRESS))[COMMAND_REG] = command; 59 59 } 60 60 -
arch/sparc64/include/mm/tlb.h
rd87c3f3 r97f1691 406 406 extern void fast_data_access_protection(void); 407 407 408 extern void dtlb_insert_mapping(__address page, __address frame, int pagesize, bool locked, bool cacheable); 409 408 410 #endif -
arch/sparc64/include/trap/exception.h
rd87c3f3 r97f1691 32 32 #define TT_INSTRUCTION_ACCESS_EXCEPTION 0x08 33 33 #define TT_ILLEGAL_INSTRUCTION 0x10 34 #define TT_DATA_ACCESS_ERROR 0x32 34 35 #define TT_MEM_ADDRESS_NOT_ALIGNED 0x34 35 36 … … 37 38 extern void do_instruction_access_exc(void); 38 39 extern void do_mem_address_not_aligned(void); 40 extern void do_data_access_error(void); 39 41 extern void do_illegal_instruction(void); 40 42 #endif /* !__ASM__ */ -
arch/sparc64/src/console.c
rd87c3f3 r97f1691 41 41 #include <proc/thread.h> 42 42 #include <synch/mutex.h> 43 #include <arch/mm/tlb.h> 43 44 44 45 #define KEYBOARD_POLL_PAUSE 50000 /* 50ms */ … … 76 77 ofw_console_active = 0; 77 78 stdin = NULL; 79 80 dtlb_insert_mapping(FB_VIRT_ADDRESS, FB_PHYS_ADDRESS, PAGESIZE_4M, true, false); 81 dtlb_insert_mapping(KBD_VIRT_ADDRESS, KBD_PHYS_ADDRESS, PAGESIZE_8K, true, false); 82 78 83 fb_init(FB_VIRT_ADDRESS, FB_X_RES, FB_Y_RES, FB_COLOR_DEPTH/8); 79 84 i8042_init(); -
arch/sparc64/src/mm/tlb.c
rd87c3f3 r97f1691 110 110 dmmu_enable(); 111 111 immu_enable(); 112 113 /* 114 * Quick hack: map frame buffer 115 */ 116 fr.address = FB_PHYS_ADDRESS; 117 pg.address = FB_VIRT_ADDRESS; 112 } 113 114 /** Insert privileged mapping into DMMU TLB. 115 * 116 * @param page Virtual page address. 117 * @param frame Physical frame address. 118 * @param pagesize Page size. 119 * @param locked True for permanent mappings, false otherwise. 120 * @param cacheable True if the mapping is cacheable, false otherwise. 121 */ 122 void dtlb_insert_mapping(__address page, __address frame, int pagesize, bool locked, bool cacheable) 123 { 124 tlb_tag_access_reg_t tag; 125 tlb_data_t data; 126 page_address_t pg; 127 frame_address_t fr; 128 129 pg.address = page; 130 fr.address = frame; 118 131 119 132 tag.value = ASID_KERNEL; … … 124 137 data.value = 0; 125 138 data.v = true; 126 data.size = PAGESIZE_4M;139 data.size = pagesize; 127 140 data.pfn = fr.pfn; 128 data.l = true;129 data.cp = 0;130 data.cv = 0;141 data.l = locked; 142 data.cp = cacheable; 143 data.cv = cacheable; 131 144 data.p = true; 132 145 data.w = true; … … 134 147 135 148 dtlb_data_in_write(data.value); 136 137 /*138 * Quick hack: map keyboard139 */140 fr.address = KBD_PHYS_ADDRESS;141 pg.address = KBD_VIRT_ADDRESS;142 143 tag.value = ASID_KERNEL;144 tag.vpn = pg.vpn;145 146 dtlb_tag_access_write(tag.value);147 148 data.value = 0;149 data.v = true;150 data.size = PAGESIZE_8K;151 data.pfn = fr.pfn;152 data.l = true;153 data.cp = 0;154 data.cv = 0;155 data.p = true;156 data.w = true;157 data.g = true;158 159 dtlb_data_in_write(data.value);160 149 } 161 150 … … 170 159 { 171 160 tlb_tag_access_reg_t tag; 172 tlb_data_t data;173 161 __address tpc; 174 162 char *tpc_str; … … 187 175 * Identity map piece of faulting kernel address space. 188 176 */ 189 data.value = 0; 190 data.v = true; 191 data.size = PAGESIZE_8K; 192 data.pfn = tag.vpn; 193 data.l = false; 194 data.cp = 1; 195 data.cv = 1; 196 data.p = true; 197 data.w = true; 198 data.g = true; 199 200 dtlb_data_in_write(data.value); 177 dtlb_insert_mapping(tag.vpn * PAGE_SIZE, tag.vpn * FRAME_SIZE, PAGESIZE_8K, false, true); 201 178 } 202 179 -
arch/sparc64/src/sparc64.c
rd87c3f3 r97f1691 75 75 { 76 76 } 77 78 void before_thread_runs_arch(void)79 {80 } -
arch/sparc64/src/trap/exception.c
rd87c3f3 r97f1691 43 43 } 44 44 45 /** Handle data_access_error. */ 46 void do_data_access_error(void) 47 { 48 panic("Data Access Error: %P\n", tpc_read()); 49 } 50 45 51 /** Handle mem_address_not_aligned. */ 46 52 void do_illegal_instruction(void) -
arch/sparc64/src/trap/trap_table.S
rd87c3f3 r97f1691 73 73 CLEAN_WINDOW_HANDLER 74 74 75 /* TT = 0x32, TL = 0, data_access_error */ 76 .org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE 77 .global data_access_error 78 data_access_error: 79 SIMPLE_HANDLER do_data_access_error 80 75 81 /* TT = 0x34, TL = 0, mem_address_not_aligned */ 76 82 .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE … … 226 232 clean_window_handler_high: 227 233 CLEAN_WINDOW_HANDLER 234 235 /* TT = 0x32, TL > 0, data_access_error */ 236 .org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE 237 .global data_access_error_high 238 data_access_error_high: 239 SIMPLE_HANDLER do_data_access_error 228 240 229 241 /* TT = 0x34, TL > 0, mem_address_not_aligned */ -
generic/include/proc/scheduler.h
rd87c3f3 r97f1691 54 54 55 55 extern void before_thread_runs(void); 56 extern void after_thread_ran(void); 56 57 57 58 extern void sched_print_list(void); 59 58 60 /* 59 61 * To be defined by architectures: 60 62 */ 61 62 63 extern void before_thread_runs_arch(void); 64 extern void after_thread_ran_arch(void); 63 65 64 66 #endif -
generic/src/proc/scheduler.c
rd87c3f3 r97f1691 50 50 atomic_t nrdy; 51 51 52 /** Take actions before new thread runs 52 /** Take actions before new thread runs. 53 53 * 54 54 * Perform actions that need to be … … 76 76 } 77 77 #endif 78 } 79 80 /** Take actions after old thread ran. 81 * 82 * Perform actions that need to be 83 * taken after the running thread 84 * was preempted by the scheduler. 85 * 86 * THREAD->lock is locked on entry 87 * 88 */ 89 void after_thread_ran(void) 90 { 91 after_thread_ran_arch(); 78 92 } 79 93 … … 258 272 259 273 if (THREAD) { 274 /* must be run after switch to scheduler stack */ 275 after_thread_ran(); 276 260 277 switch (THREAD->state) { 261 278 case Running: … … 301 318 break; 302 319 } 320 303 321 THREAD = NULL; 304 322 } … … 350 368 printf("cpu%d: tid %d (priority=%d,ticks=%d,nrdy=%d)\n", CPU->id, THREAD->tid, THREAD->priority, THREAD->ticks, atomic_get(&CPU->nrdy)); 351 369 #endif 370 371 /* 372 * Some architectures provide late kernel PA2KA(identity) 373 * mapping in a page fault handler. However, the page fault 374 * handler uses the kernel stack of the running thread and 375 * therefore cannot be used to map it. The kernel stack, if 376 * necessary, is to be mapped in before_thread_runs(). This 377 * function must be executed before the switch to the new stack. 378 */ 379 before_thread_runs(); 352 380 353 381 /* … … 388 416 * This is the place where threads leave scheduler(); 389 417 */ 390 before_thread_runs();391 418 spinlock_unlock(&THREAD->lock); 392 419 interrupts_restore(THREAD->saved_context.ipl);
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