Changes in kernel/arch/arm32/include/mm/page.h [7a0359b:98000fb] in mainline

File:

• kernel/arch/arm32/include/mm/page.h (modified) (14 diffs)

kernel/arch/arm32/include/mm/page.h

@@ -27 +27 @@
  */
 
-/** @addtogroup arm32mm
+/** @addtogroup arm32mm 
  * @{
  */
@@ -40 +40 @@
 #include <mm/mm.h>
 #include <arch/exception.h>
-#include <trace.h>
 
 #define PAGE_WIDTH      FRAME_WIDTH
@@ -76 +75 @@
 /* Get PTE address accessors for each level. */
 #define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
-        ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10))
+        ((pte_t *) ((((pte_level0_t *)(ptl0))[(i)]).coarse_table_addr << 10))
 #define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
         (ptl1)
@@ -82 +81 @@
         (ptl2)
 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
-        ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12))
+        ((uintptr_t) ((((pte_level1_t *)(ptl3))[(i)]).frame_base_addr << 12))
 
 /* Set PTE address accessors for each level. */
 #define SET_PTL0_ADDRESS_ARCH(ptl0) \
-        (set_ptl0_addr((pte_t *) (ptl0)))
+        (set_ptl0_addr((pte_level0_t *) (ptl0)))
 #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
-        (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10)
+        (((pte_level0_t *) (ptl0))[(i)].coarse_table_addr = (a) >> 10)
 #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
 #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
 #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
-        (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12)
+        (((pte_level1_t *) (ptl3))[(i)].frame_base_addr = (a) >> 12)
 
 /* Get PTE flags accessors for each level. */
 #define GET_PTL1_FLAGS_ARCH(ptl0, i) \
-        get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i))
+        get_pt_level0_flags((pte_level0_t *) (ptl0), (size_t) (i))
 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \
         PAGE_PRESENT
@@ -102 +101 @@
         PAGE_PRESENT
 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \
-        get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i))
+        get_pt_level1_flags((pte_level1_t *) (ptl3), (size_t) (i))
 
 /* Set PTE flags accessors for each level. */
 #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
-        set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x))
+        set_pt_level0_flags((pte_level0_t *) (ptl0), (size_t) (i), (x))
 #define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
 #define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
 #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
-        set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x))
+        set_pt_level1_flags((pte_level1_t *) (ptl3), (size_t) (i), (x))
 
 /* Macros for querying the last-level PTE entries. */
@@ -116 +115 @@
         (*((uint32_t *) (pte)) != 0)
 #define PTE_PRESENT_ARCH(pte) \
-        (((pte_t *) (pte))->l0.descriptor_type != 0)
+        (((pte_level0_t *) (pte))->descriptor_type != 0)
 #define PTE_GET_FRAME_ARCH(pte) \
-        (((pte_t *) (pte))->l1.frame_base_addr << FRAME_WIDTH)
+        (((pte_level1_t *) (pte))->frame_base_addr << FRAME_WIDTH)
 #define PTE_WRITABLE_ARCH(pte) \
-        (((pte_t *) (pte))->l1.access_permission_0 == PTE_AP_USER_RW_KERNEL_RW)
+        (((pte_level1_t *) (pte))->access_permission_0 == \
+            PTE_AP_USER_RW_KERNEL_RW)
 #define PTE_EXECUTABLE_ARCH(pte) \
         1
@@ -159 +159 @@
 } ATTRIBUTE_PACKED pte_level1_t;
 
-typedef union {
-        pte_level0_t l0;
-        pte_level1_t l1;
-} pte_t;
 
 /* Level 1 page tables access permissions */
@@ -193 +189 @@
 /** Sets the address of level 0 page table.
  *
- * @param pt Pointer to the page table to set.
- *
- */
-NO_TRACE static inline void set_ptl0_addr(pte_t *pt)
+ * @param pt    Pointer to the page table to set.
+ */   
+static inline void set_ptl0_addr(pte_level0_t *pt)
 {
         asm volatile (
@@ -207 +202 @@
 /** Returns level 0 page table entry flags.
  *
- * @param pt Level 0 page table.
- * @param i  Index of the entry to return.
- *
- */
-NO_TRACE static inline int get_pt_level0_flags(pte_t *pt, size_t i)
-{
-        pte_level0_t *p = &pt[i].l0;
+ *  @param pt     Level 0 page table.
+ *  @param i      Index of the entry to return.
+ */
+static inline int get_pt_level0_flags(pte_level0_t *pt, size_t i)
+{
+        pte_level0_t *p = &pt[i];
         int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT);
-        
+
         return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) |
             (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) |
@@ -223 +217 @@
 /** Returns level 1 page table entry flags.
  *
- * @param pt Level 1 page table.
- * @param i  Index of the entry to return.
- *
- */
-NO_TRACE static inline int get_pt_level1_flags(pte_t *pt, size_t i)
-{
-        pte_level1_t *p = &pt[i].l1;
-        
+ *  @param pt     Level 1 page table.
+ *  @param i      Index of the entry to return.
+ */
+static inline int get_pt_level1_flags(pte_level1_t *pt, size_t i)
+{
+        pte_level1_t *p = &pt[i];
+
         int dt = p->descriptor_type;
         int ap = p->access_permission_0;
-        
+
         return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) |
             ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) |
@@ -245 +238 @@
 }
 
+
 /** Sets flags of level 0 page table entry.
  *
- * @param pt    level 0 page table
- * @param i     index of the entry to be changed
- * @param flags new flags
- *
- */
-NO_TRACE static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags)
-{
-        pte_level0_t *p = &pt[i].l0;
-        
+ *  @param pt     level 0 page table
+ *  @param i      index of the entry to be changed
+ *  @param flags  new flags
+ */
+static inline void set_pt_level0_flags(pte_level0_t *pt, size_t i, int flags)
+{
+        pte_level0_t *p = &pt[i];
+
         if (flags & PAGE_NOT_PRESENT) {
                 p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
@@ -266 +259 @@
                 p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE;
                 p->should_be_zero = 0;
-        }
+    }
 }
 
@@ -272 +265 @@
 /** Sets flags of level 1 page table entry.
  *
- * We use same access rights for the whole page. When page
- * is not preset we store 1 in acess_rigts_3 so that at least
- * one bit is 1 (to mark correct page entry, see #PAGE_VALID_ARCH).
- *
- * @param pt    Level 1 page table.
- * @param i     Index of the entry to be changed.
- * @param flags New flags.
- *
- */
-NO_TRACE static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags)
-{
-        pte_level1_t *p = &pt[i].l1;
+ *  We use same access rights for the whole page. When page is not preset we
+ *  store 1 in acess_rigts_3 so that at least one bit is 1 (to mark correct
+ *  page entry, see #PAGE_VALID_ARCH).
+ *
+ *  @param pt     Level 1 page table.
+ *  @param i      Index of the entry to be changed.
+ *  @param flags  New flags.
+ */  
+static inline void set_pt_level1_flags(pte_level1_t *pt, size_t i, int flags)
+{
+        pte_level1_t *p = &pt[i];
         
         if (flags & PAGE_NOT_PRESENT) {
@@ -292 +284 @@
                 p->access_permission_3 = p->access_permission_0;
         }
-        
+  
         p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0;
-        
+
         /* default access permission */
         p->access_permission_0 = p->access_permission_1 = 
             p->access_permission_2 = p->access_permission_3 =
             PTE_AP_USER_NO_KERNEL_RW;
-        
+
         if (flags & PAGE_USER)  {
                 if (flags & PAGE_READ) {