Changes in / [792807f:9916841] in mainline
- Files:
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- 1 deleted
- 31 edited
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abi/include/ddi/arg.h
r792807f r9916841 36 36 #define ABI_DDI_ARG_H_ 37 37 38 #define DMAMEM_FLAGS_ANONYMOUS 0x0139 40 38 /** Structure encapsulating arguments for SYS_PHYSMEM_MAP syscall. */ 41 39 typedef struct { -
abi/include/syscall.h
r792807f r9916841 85 85 SYS_DEVICE_ASSIGN_DEVNO, 86 86 SYS_PHYSMEM_MAP, 87 SYS_DMAMEM_MAP,88 SYS_DMAMEM_UNMAP,89 87 SYS_IOSPACE_ENABLE, 90 88 SYS_REGISTER_IRQ, -
boot/Makefile.common
r792807f r9916841 123 123 test/test3 \ 124 124 nic/lo \ 125 nic/ne2k \ 126 nic/e1k 125 nic/ne2k 127 126 128 127 RD_DRV_CFG = … … 204 203 $(USPACE_PATH)/srv/net/cfg/general \ 205 204 $(USPACE_PATH)/srv/net/cfg/lo.nic \ 206 $(USPACE_PATH)/srv/net/cfg/ne2k.nic \ 207 $(USPACE_PATH)/srv/net/cfg/e1k.nic 205 $(USPACE_PATH)/srv/net/cfg/ne2k.nic 208 206 endif 209 207 -
contrib/conf/net-qe.sh
r792807f r9916841 1 1 #!/bin/sh 2 2 3 case "$1" in 4 ne2k) 5 shift 6 qemu $@ -device ne2k_isa,irq=5,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso 7 ;; 8 e1k) 9 shift 10 qemu $@ -device e1000,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso 11 ;; 12 *) 13 echo "Usage: $0 {ne2k|e1k}" 14 esac 3 # Obsolete versions of QEMU 4 # 5 # QEMU 0.10.2 and later 0.10.* 6 # qemu $@ -no-kqemu -vga std -M isapc -net nic,model=ne2k_isa -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso 7 # 8 # QEMU 0.11.* and 0.12.* 9 # qemu $@ -vga std -M isapc -net nic,model=ne2k_isa -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso 10 11 # QEMU 0.13 and later 12 qemu $@ -device ne2k_isa,irq=5,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso -
kernel/arch/abs32le/src/abs32le.c
r792807f r9916841 86 86 } 87 87 88 sysarg_t sys_tls_set( uintptr_t addr)88 sysarg_t sys_tls_set(sysarg_t addr) 89 89 { 90 90 return EOK; -
kernel/arch/amd64/src/amd64.c
r792807f r9916841 34 34 35 35 #include <arch.h> 36 36 37 #include <typedefs.h> 37 #include <errno.h> 38 #include <memstr.h> 39 #include <interrupt.h> 40 #include <console/console.h> 41 #include <syscall/syscall.h> 42 #include <sysinfo/sysinfo.h> 43 #include <arch/bios/bios.h> 44 #include <arch/boot/boot.h> 45 #include <arch/debugger.h> 38 39 #include <config.h> 40 41 #include <proc/thread.h> 42 #include <genarch/multiboot/multiboot.h> 43 #include <genarch/multiboot/multiboot2.h> 44 #include <genarch/drivers/legacy/ia32/io.h> 45 #include <genarch/drivers/ega/ega.h> 46 #include <genarch/fb/bfb.h> 47 #include <genarch/drivers/i8042/i8042.h> 48 #include <genarch/kbrd/kbrd.h> 46 49 #include <arch/drivers/i8254.h> 47 50 #include <arch/drivers/i8259.h> 48 #include <arch/syscall.h> 49 #include <genarch/acpi/acpi.h> 50 #include <genarch/drivers/ega/ega.h> 51 #include <genarch/drivers/i8042/i8042.h> 52 #include <genarch/drivers/legacy/ia32/io.h> 53 #include <genarch/fb/bfb.h> 54 #include <genarch/kbrd/kbrd.h> 55 #include <genarch/multiboot/multiboot.h> 56 #include <genarch/multiboot/multiboot2.h> 51 #include <arch/boot/boot.h> 57 52 58 53 #ifdef CONFIG_SMP 59 54 #include <arch/smp/apic.h> 60 55 #endif 56 57 #include <arch/bios/bios.h> 58 #include <arch/cpu.h> 59 #include <print.h> 60 #include <arch/cpuid.h> 61 #include <genarch/acpi/acpi.h> 62 #include <panic.h> 63 #include <interrupt.h> 64 #include <arch/syscall.h> 65 #include <arch/debugger.h> 66 #include <syscall/syscall.h> 67 #include <console/console.h> 68 #include <ddi/irq.h> 69 #include <sysinfo/sysinfo.h> 70 #include <memstr.h> 61 71 62 72 /** Disable I/O on non-privileged levels … … 254 264 * we need not to go to CPL0 to read it. 255 265 */ 256 sysarg_t sys_tls_set( uintptr_t addr)266 sysarg_t sys_tls_set(sysarg_t addr) 257 267 { 258 268 THREAD->arch.tls = addr; 259 269 write_msr(AMD_MSR_FS, addr); 260 270 261 return EOK;271 return 0; 262 272 } 263 273 -
kernel/arch/ia32/src/ia32.c
r792807f r9916841 36 36 37 37 #include <arch.h> 38 38 39 #include <typedefs.h> 39 #include <errno.h> 40 #include <memstr.h> 41 #include <interrupt.h> 42 #include <console/console.h> 43 #include <syscall/syscall.h> 44 #include <sysinfo/sysinfo.h> 45 #include <arch/bios/bios.h> 46 #include <arch/boot/boot.h> 47 #include <arch/debugger.h> 40 41 #include <arch/pm.h> 42 43 #include <genarch/multiboot/multiboot.h> 44 #include <genarch/multiboot/multiboot2.h> 45 #include <genarch/drivers/legacy/ia32/io.h> 46 #include <genarch/drivers/ega/ega.h> 47 #include <genarch/fb/bfb.h> 48 #include <genarch/drivers/i8042/i8042.h> 49 #include <genarch/kbrd/kbrd.h> 48 50 #include <arch/drivers/i8254.h> 49 51 #include <arch/drivers/i8259.h> 52 53 #include <arch/context.h> 54 55 #include <config.h> 56 57 #include <arch/interrupt.h> 58 #include <arch/asm.h> 50 59 #include <genarch/acpi/acpi.h> 51 #include <genarch/drivers/ega/ega.h> 52 #include <genarch/drivers/i8042/i8042.h> 53 #include <genarch/drivers/legacy/ia32/io.h> 54 #include <genarch/fb/bfb.h> 55 #include <genarch/kbrd/kbrd.h> 56 #include <genarch/multiboot/multiboot.h> 57 #include <genarch/multiboot/multiboot2.h> 60 61 #include <arch/bios/bios.h> 62 63 #include <interrupt.h> 64 #include <ddi/irq.h> 65 #include <arch/debugger.h> 66 #include <proc/thread.h> 67 #include <syscall/syscall.h> 68 #include <console/console.h> 69 #include <sysinfo/sysinfo.h> 70 #include <arch/boot/boot.h> 71 #include <memstr.h> 58 72 59 73 #ifdef CONFIG_SMP … … 205 219 * selector, and the descriptor->base is the correct address. 206 220 */ 207 sysarg_t sys_tls_set( uintptr_t addr)221 sysarg_t sys_tls_set(sysarg_t addr) 208 222 { 209 223 THREAD->arch.tls = addr; 210 224 set_tls_desc(addr); 211 225 212 return EOK;226 return 0; 213 227 } 214 228 -
kernel/arch/ia64/include/asm.h
r792807f r9916841 38 38 #include <config.h> 39 39 #include <typedefs.h> 40 #include <typedefs.h> 40 41 #include <arch/register.h> 41 42 #include <trace.h> -
kernel/arch/ia64/src/ia64.c
r792807f r9916841 34 34 35 35 #include <arch.h> 36 #include <arch/drivers/ski.h> 37 #include <arch/drivers/it.h> 38 #include <arch/interrupt.h> 39 #include <arch/barrier.h> 40 #include <arch/asm.h> 41 #include <arch/register.h> 36 42 #include <typedefs.h> 37 #include <errno.h> 43 #include <arch/context.h> 44 #include <arch/stack.h> 45 #include <arch/mm/page.h> 38 46 #include <interrupt.h> 47 #include <mm/as.h> 48 #include <config.h> 39 49 #include <macros.h> 40 #include <str.h>41 50 #include <userspace.h> 42 51 #include <console/console.h> 52 #include <abi/proc/uarg.h> 43 53 #include <syscall/syscall.h> 44 #include < sysinfo/sysinfo.h>45 #include <arch/ drivers/it.h>46 #include < arch/drivers/kbd.h>54 #include <ddi/irq.h> 55 #include <arch/bootinfo.h> 56 #include <genarch/drivers/legacy/ia32/io.h> 47 57 #include <genarch/drivers/ega/ega.h> 58 #include <genarch/kbrd/kbrd.h> 59 #include <genarch/srln/srln.h> 48 60 #include <genarch/drivers/i8042/i8042.h> 49 61 #include <genarch/drivers/ns16550/ns16550.h> 50 #include <genarch/drivers/legacy/ia32/io.h> 51 #include <genarch/kbrd/kbrd.h> 52 #include <genarch/srln/srln.h> 62 #include <arch/drivers/kbd.h> 63 #include <smp/smp.h> 64 #include <smp/ipi.h> 65 #include <arch/atomic.h> 66 #include <panic.h> 67 #include <print.h> 68 #include <sysinfo/sysinfo.h> 69 #include <str.h> 53 70 54 71 /* NS16550 as a COM 1 */ … … 245 262 * We use r13 (a.k.a. tp) for this purpose. 246 263 */ 247 sysarg_t sys_tls_set( uintptr_t addr)248 { 249 return EOK;264 sysarg_t sys_tls_set(sysarg_t addr) 265 { 266 return 0; 250 267 } 251 268 … … 253 270 { 254 271 pio_write_8((ioport8_t *)0x64, 0xfe); 255 while (1); 272 while (1) 273 ; 256 274 } 257 275 -
kernel/arch/mips32/src/mips32.c
r792807f r9916841 34 34 35 35 #include <arch.h> 36 #include < typedefs.h>37 #include < errno.h>38 #include < interrupt.h>39 #include <m acros.h>40 #include < str.h>36 #include <arch/cp0.h> 37 #include <arch/exception.h> 38 #include <arch/debug.h> 39 #include <mm/as.h> 40 #include <userspace.h> 41 41 #include <memstr.h> 42 #include <userspace.h> 42 #include <proc/thread.h> 43 #include <abi/proc/uarg.h> 44 #include <print.h> 43 45 #include <console/console.h> 44 46 #include <syscall/syscall.h> 45 47 #include <sysinfo/sysinfo.h> 46 #include <arch/debug.h> 48 #include <arch/interrupt.h> 49 #include <interrupt.h> 50 #include <console/chardev.h> 51 #include <arch/barrier.h> 47 52 #include <arch/debugger.h> 48 #include <arch/drivers/msim.h>49 53 #include <genarch/fb/fb.h> 54 #include <abi/fb/visuals.h> 50 55 #include <genarch/drivers/dsrln/dsrlnin.h> 51 56 #include <genarch/drivers/dsrln/dsrlnout.h> 52 57 #include <genarch/srln/srln.h> 58 #include <macros.h> 59 #include <config.h> 60 #include <str.h> 61 #include <arch/drivers/msim.h> 62 #include <arch/asm/regname.h> 53 63 54 64 /* Size of the code jumping to the exception handler code … … 238 248 * possible to have it separately in the future. 239 249 */ 240 sysarg_t sys_tls_set( uintptr_t addr)241 { 242 return EOK;250 sysarg_t sys_tls_set(sysarg_t addr) 251 { 252 return 0; 243 253 } 244 254 -
kernel/arch/mips64/src/mips64.c
r792807f r9916841 34 34 35 35 #include <arch.h> 36 #include < typedefs.h>37 #include < errno.h>38 #include < interrupt.h>39 #include <m acros.h>40 #include < str.h>36 #include <arch/cp0.h> 37 #include <arch/exception.h> 38 #include <arch/debug.h> 39 #include <mm/as.h> 40 #include <userspace.h> 41 41 #include <memstr.h> 42 #include <userspace.h> 42 #include <proc/thread.h> 43 #include <abi/proc/uarg.h> 44 #include <print.h> 43 45 #include <console/console.h> 44 46 #include <syscall/syscall.h> 45 47 #include <sysinfo/sysinfo.h> 46 #include <arch/debug.h> 48 #include <arch/interrupt.h> 49 #include <interrupt.h> 50 #include <console/chardev.h> 51 #include <arch/barrier.h> 47 52 #include <arch/debugger.h> 48 #include <arch/drivers/msim.h>49 53 #include <genarch/fb/fb.h> 54 #include <abi/fb/visuals.h> 50 55 #include <genarch/drivers/dsrln/dsrlnin.h> 51 56 #include <genarch/drivers/dsrln/dsrlnout.h> 52 57 #include <genarch/srln/srln.h> 58 #include <macros.h> 59 #include <config.h> 60 #include <str.h> 61 #include <arch/drivers/msim.h> 62 #include <arch/asm/regname.h> 53 63 54 64 /* Size of the code jumping to the exception handler code … … 216 226 * possible to have it separately in the future. 217 227 */ 218 sysarg_t sys_tls_set( uintptr_t addr)219 { 220 return EOK;228 sysarg_t sys_tls_set(sysarg_t addr) 229 { 230 return 0; 221 231 } 222 232 -
kernel/generic/include/ddi/ddi.h
r792807f r9916841 55 55 extern void ddi_parea_register(parea_t *); 56 56 57 extern sysarg_t sys_physmem_map(uintptr_t, uintptr_t, size_t, unsigned int); 58 59 extern sysarg_t sys_dmamem_map(uintptr_t, size_t, unsigned int, unsigned int, 60 void *); 61 extern sysarg_t sys_dmamem_unmap(uintptr_t, size_t, unsigned int); 62 57 extern sysarg_t sys_physmem_map(sysarg_t, sysarg_t, sysarg_t, sysarg_t); 63 58 extern sysarg_t sys_iospace_enable(ddi_ioarg_t *); 64 59 -
kernel/generic/include/mm/page.h
r792807f r9916841 66 66 extern uintptr_t hw_map(uintptr_t, size_t); 67 67 68 extern int page_find_mapping(uintptr_t, void **); 69 extern sysarg_t sys_page_find_mapping(uintptr_t, void *); 68 extern sysarg_t sys_page_find_mapping(uintptr_t, uintptr_t *); 70 69 71 70 #endif -
kernel/generic/include/synch/smc.h
r792807f r9916841 36 36 #define KERN_SMC_H_ 37 37 38 extern sysarg_t sys_smc_coherence(uintptr_t , size_t);38 extern sysarg_t sys_smc_coherence(uintptr_t va, size_t size); 39 39 40 40 #endif -
kernel/generic/include/syscall/syscall.h
r792807f r9916841 45 45 extern sysarg_t syscall_handler(sysarg_t, sysarg_t, sysarg_t, sysarg_t, 46 46 sysarg_t, sysarg_t, sysarg_t); 47 extern sysarg_t sys_tls_set( uintptr_t);47 extern sysarg_t sys_tls_set(sysarg_t); 48 48 49 49 #endif -
kernel/generic/src/ddi/ddi.c
r792807f r9916841 45 45 #include <mm/frame.h> 46 46 #include <mm/as.h> 47 #include <mm/page.h>48 47 #include <synch/mutex.h> 49 48 #include <syscall/copy.h> … … 53 52 #include <errno.h> 54 53 #include <trace.h> 55 #include <bitops.h>56 54 57 55 /** This lock protects the parea_btree. */ … … 89 87 /** Map piece of physical memory into virtual address space of current task. 90 88 * 91 * @param p hysPhysical address of the starting frame.92 * @param v irtVirtual address of the starting page.89 * @param pf Physical address of the starting frame. 90 * @param vp Virtual address of the starting page. 93 91 * @param pages Number of pages to map. 94 92 * @param flags Address space area flags for the mapping. 95 93 * 96 * @return EOK on success. 97 * @return EPERM if the caller lacks capabilities to use this syscall. 98 * @return EBADMEM if phys or virt is not page aligned. 99 * @return ENOENT if there is no task matching the specified ID or 100 * the physical address space is not enabled for mapping. 101 * @return ENOMEM if there was a problem in creating address space area. 102 * 103 */ 104 NO_TRACE static int ddi_physmem_map(uintptr_t phys, uintptr_t virt, size_t pages, 94 * @return 0 on success, EPERM if the caller lacks capabilities to use this 95 * syscall, EBADMEM if pf or vf is not page aligned, ENOENT if there 96 * is no task matching the specified ID or the physical address space 97 * is not enabled for mapping and ENOMEM if there was a problem in 98 * creating address space area. 99 * 100 */ 101 NO_TRACE static int ddi_physmem_map(uintptr_t pf, uintptr_t vp, size_t pages, 105 102 unsigned int flags) 106 103 { 107 104 ASSERT(TASK); 108 105 109 if ((p hys% FRAME_SIZE) != 0)106 if ((pf % FRAME_SIZE) != 0) 110 107 return EBADMEM; 111 108 112 if ((v irt% PAGE_SIZE) != 0)109 if ((vp % PAGE_SIZE) != 0) 113 110 return EBADMEM; 114 111 … … 121 118 122 119 mem_backend_data_t backend_data; 123 backend_data.base = p hys;120 backend_data.base = pf; 124 121 backend_data.frames = pages; 125 122 … … 132 129 btree_node_t *nodep; 133 130 parea_t *parea = (parea_t *) btree_search(&parea_btree, 134 (btree_key_t) p hys, &nodep);131 (btree_key_t) pf, &nodep); 135 132 136 133 if ((parea != NULL) && (parea->frames >= pages)) { … … 152 149 153 150 irq_spinlock_lock(&zones.lock, true); 154 size_t znum = find_zone(ADDR2PFN(p hys), pages, 0);151 size_t znum = find_zone(ADDR2PFN(pf), pages, 0); 155 152 156 153 if (znum == (size_t) -1) { … … 185 182 186 183 map: 187 if (!as_area_create(TASK->as, flags, FRAMES2SIZE(pages), virt,184 if (!as_area_create(TASK->as, flags, pages * PAGE_SIZE, vp, 188 185 AS_AREA_ATTR_NONE, &phys_backend, &backend_data)) { 189 186 /* … … 256 253 /** Wrapper for SYS_PHYSMEM_MAP syscall. 257 254 * 258 * @param phys 259 * @param virt 255 * @param phys_base Physical base address to map 256 * @param virt_base Destination virtual address 260 257 * @param pages Number of pages 261 258 * @param flags Flags of newly mapped pages … … 264 261 * 265 262 */ 266 sysarg_t sys_physmem_map( uintptr_t phys, uintptr_t virt,267 s ize_t pages, unsigned int flags)268 { 269 return (sysarg_t) 270 ddi_physmem_map(ALIGN_DOWN(phys, FRAME_SIZE),271 ALIGN_DOWN(virt, PAGE_SIZE), pages,flags);263 sysarg_t sys_physmem_map(sysarg_t phys_base, sysarg_t virt_base, 264 sysarg_t pages, sysarg_t flags) 265 { 266 return (sysarg_t) ddi_physmem_map(ALIGN_DOWN((uintptr_t) phys_base, 267 FRAME_SIZE), ALIGN_DOWN((uintptr_t) virt_base, PAGE_SIZE), 268 (size_t) pages, (int) flags); 272 269 } 273 270 … … 290 287 } 291 288 292 NO_TRACE static int dmamem_map(uintptr_t virt, size_t size,293 unsigned int map_flags, unsigned int flags, void **phys)294 {295 ASSERT(TASK);296 297 if ((flags & DMAMEM_FLAGS_ANONYMOUS) == 0) {298 // TODO: implement locking of non-anonymous mapping299 return page_find_mapping(virt, phys);300 } else {301 // TODO: implement locking302 303 if ((virt % PAGE_SIZE) != 0)304 return EBADMEM;305 306 size_t pages = SIZE2FRAMES(size);307 uint8_t order;308 309 /* We need the 2^order >= pages */310 if (pages == 1)311 order = 0;312 else313 order = fnzb(pages - 1) + 1;314 315 *phys = frame_alloc_noreserve(order, 0);316 if (*phys == NULL)317 return ENOMEM;318 319 mem_backend_data_t backend_data;320 backend_data.base = (uintptr_t) *phys;321 backend_data.frames = pages;322 323 if (!as_area_create(TASK->as, map_flags, size, virt,324 AS_AREA_ATTR_NONE, &phys_backend, &backend_data)) {325 frame_free_noreserve((uintptr_t) *phys);326 return ENOMEM;327 }328 329 return EOK;330 }331 }332 333 NO_TRACE static int dmamem_unmap(uintptr_t virt, size_t size,334 unsigned int flags)335 {336 // TODO: implement unlocking & unmap337 return EOK;338 }339 340 sysarg_t sys_dmamem_map(uintptr_t virt, size_t size, unsigned int map_flags,341 unsigned int flags, void *phys_ptr)342 {343 void *phys;344 int rc = dmamem_map(virt, size, map_flags, flags, &phys);345 if (rc != EOK)346 return rc;347 348 rc = copy_to_uspace(phys_ptr, &phys, sizeof(phys));349 if (rc != EOK) {350 dmamem_unmap(virt, size, flags);351 return rc;352 }353 354 return EOK;355 }356 357 sysarg_t sys_dmamem_unmap(uintptr_t virt, size_t size, unsigned int flags)358 {359 return dmamem_unmap(virt, size, flags);360 }361 362 289 /** @} 363 290 */ -
kernel/generic/src/ipc/irq.c
r792807f r9916841 365 365 return IRQ_DECLINE; 366 366 367 #define CMD_MEM_READ(target) \ 368 do { \ 369 void *va = code->cmds[i].addr; \ 370 if (AS != irq->driver_as) \ 371 as_switch(AS, irq->driver_as); \ 372 memcpy_from_uspace(&target, va, (sizeof(target))); \ 373 if (dstarg) \ 374 scratch[dstarg] = target; \ 375 } while(0) 376 377 #define CMD_MEM_WRITE(val) \ 378 do { \ 379 void *va = code->cmds[i].addr; \ 380 if (AS != irq->driver_as) \ 381 as_switch(AS, irq->driver_as); \ 382 memcpy_to_uspace(va, &val, sizeof(val)); \ 383 } while (0) 384 367 385 as_t *current_as = AS; 368 if (current_as != irq->driver_as) 369 as_switch(AS, irq->driver_as); 370 371 for (size_t i = 0; i < code->cmdcount; i++) { 386 size_t i; 387 for (i = 0; i < code->cmdcount; i++) { 372 388 uint32_t dstval; 373 void *va;374 uint8_t val8;375 uint16_t val16;376 uint32_t val32;377 378 389 uintptr_t srcarg = code->cmds[i].srcarg; 379 390 uintptr_t dstarg = code->cmds[i].dstarg; … … 431 442 } 432 443 break; 433 case CMD_MEM_READ_8: 434 va = code->cmds[i].addr; 435 memcpy_from_uspace(&val8, va, sizeof(val8)); 436 if (dstarg) 437 scratch[dstarg] = val8; 438 break; 439 case CMD_MEM_READ_16: 440 va = code->cmds[i].addr; 441 memcpy_from_uspace(&val16, va, sizeof(val16)); 442 if (dstarg) 443 scratch[dstarg] = val16; 444 break; 445 case CMD_MEM_READ_32: 446 va = code->cmds[i].addr; 447 memcpy_from_uspace(&val32, va, sizeof(val32)); 448 if (dstarg) 449 scratch[dstarg] = val32; 450 break; 451 case CMD_MEM_WRITE_8: 452 val8 = code->cmds[i].value; 453 va = code->cmds[i].addr; 454 memcpy_to_uspace(va, &val8, sizeof(val8)); 455 break; 456 case CMD_MEM_WRITE_16: 457 val16 = code->cmds[i].value; 458 va = code->cmds[i].addr; 459 memcpy_to_uspace(va, &val16, sizeof(val16)); 460 break; 461 case CMD_MEM_WRITE_32: 462 val32 = code->cmds[i].value; 463 va = code->cmds[i].addr; 464 memcpy_to_uspace(va, &val32, sizeof(val32)); 465 break; 444 case CMD_MEM_READ_8: { 445 uint8_t val; 446 CMD_MEM_READ(val); 447 break; 448 } 449 case CMD_MEM_READ_16: { 450 uint16_t val; 451 CMD_MEM_READ(val); 452 break; 453 } 454 case CMD_MEM_READ_32: { 455 uint32_t val; 456 CMD_MEM_READ(val); 457 break; 458 } 459 case CMD_MEM_WRITE_8: { 460 uint8_t val = code->cmds[i].value; 461 CMD_MEM_WRITE(val); 462 break; 463 } 464 case CMD_MEM_WRITE_16: { 465 uint16_t val = code->cmds[i].value; 466 CMD_MEM_WRITE(val); 467 break; 468 } 469 case CMD_MEM_WRITE_32: { 470 uint32_t val = code->cmds[i].value; 471 CMD_MEM_WRITE(val); 472 break; 473 } 466 474 case CMD_MEM_WRITE_A_8: 467 475 if (srcarg) { 468 val8 = scratch[srcarg]; 469 va = code->cmds[i].addr; 470 memcpy_to_uspace(va, &val8, sizeof(val8)); 476 uint8_t val = scratch[srcarg]; 477 CMD_MEM_WRITE(val); 471 478 } 472 479 break; 473 480 case CMD_MEM_WRITE_A_16: 474 481 if (srcarg) { 475 val16 = scratch[srcarg]; 476 va = code->cmds[i].addr; 477 memcpy_to_uspace(va, &val16, sizeof(val16)); 482 uint16_t val = scratch[srcarg]; 483 CMD_MEM_WRITE(val); 478 484 } 479 485 break; 480 486 case CMD_MEM_WRITE_A_32: 481 487 if (srcarg) { 482 val32 = scratch[srcarg]; 483 va = code->cmds[i].addr; 484 memcpy_to_uspace(va, &val32, sizeof(val32)); 488 uint32_t val = scratch[srcarg]; 489 CMD_MEM_WRITE(val); 485 490 } 486 491 break; … … 508 513 } 509 514 } 510 511 515 if (AS != current_as) 512 516 as_switch(AS, current_as); -
kernel/generic/src/mm/page.c
r792807f r9916841 53 53 * We assume that the other processors are either not using the mapping yet 54 54 * (i.e. during the bootstrap) or are executing the TLB shootdown code. While 55 * we don't care much about the former case, the processors in the latter case 55 * we don't care much about the former case, the processors in the latter case 56 56 * will do an implicit serialization by virtue of running the TLB shootdown 57 57 * interrupt handler. … … 74 74 #include <syscall/copy.h> 75 75 #include <errno.h> 76 #include <align.h>77 76 78 77 /** Virtual operations for page subsystem. */ … … 177 176 } 178 177 179 int page_find_mapping(uintptr_t virt, void **phys) 178 /** Syscall wrapper for getting mapping of a virtual page. 179 * 180 * @retval EOK Everything went find, @p uspace_frame and @p uspace_node 181 * contains correct values. 182 * @retval ENOENT Virtual address has no mapping. 183 */ 184 sysarg_t sys_page_find_mapping(uintptr_t virt_address, 185 uintptr_t *uspace_frame) 180 186 { 181 187 mutex_lock(&AS->lock); 182 188 183 pte_t *pte = page_mapping_find(AS, virt , false);184 if ( (!PTE_VALID(pte)) || (!PTE_PRESENT(pte))) {189 pte_t *pte = page_mapping_find(AS, virt_address, false); 190 if (!PTE_VALID(pte) || !PTE_PRESENT(pte)) { 185 191 mutex_unlock(&AS->lock); 186 return ENOENT; 192 193 return (sysarg_t) ENOENT; 187 194 } 188 195 189 *phys = (void *) PTE_GET_FRAME(pte) + 190 (virt - ALIGN_DOWN(virt, PAGE_SIZE)); 196 uintptr_t phys_address = PTE_GET_FRAME(pte); 191 197 192 198 mutex_unlock(&AS->lock); 193 199 200 int rc = copy_to_uspace(uspace_frame, 201 &phys_address, sizeof(phys_address)); 202 if (rc != EOK) { 203 return (sysarg_t) rc; 204 } 205 194 206 return EOK; 195 207 } 196 208 197 /** Syscall wrapper for getting mapping of a virtual page.198 *199 * @return EOK on success.200 * @return ENOENT if no virtual address mapping found.201 *202 */203 sysarg_t sys_page_find_mapping(uintptr_t virt, void *phys_ptr)204 {205 void *phys;206 int rc = page_find_mapping(virt, &phys);207 if (rc != EOK)208 return rc;209 210 rc = copy_to_uspace(phys_ptr, &phys, sizeof(phys));211 return (sysarg_t) rc;212 }213 214 209 /** @} 215 210 */ -
kernel/generic/src/syscall/syscall.c
r792807f r9916841 176 176 (syshandler_t) sys_device_assign_devno, 177 177 (syshandler_t) sys_physmem_map, 178 (syshandler_t) sys_dmamem_map,179 (syshandler_t) sys_dmamem_unmap,180 178 (syshandler_t) sys_iospace_enable, 181 179 (syshandler_t) sys_register_irq, -
uspace/app/tester/mm/mapping1.c
r792807f r9916841 71 71 int i; 72 72 for (i = 0; i < page_count; i++) { 73 void *page_start = ((char *) 73 void *page_start = ((char *)area) + PAGE_SIZE * i; 74 74 int rc = as_get_physical_mapping(page_start, NULL); 75 75 if (rc != expected_rc) { -
uspace/drv/bus/usb/ohci/utils/malloc32.h
r792807f r9916841 56 56 uintptr_t result; 57 57 int ret = as_get_physical_mapping(addr, &result); 58 58 59 59 if (ret != EOK) 60 60 return 0; 61 62 return result; 61 return (result | ((uintptr_t)addr & 0xfff)); 63 62 } 64 63 /*----------------------------------------------------------------------------*/ -
uspace/drv/bus/usb/uhci/utils/malloc32.h
r792807f r9916841 54 54 if (addr == NULL) 55 55 return 0; 56 56 57 57 uintptr_t result; 58 58 const int ret = as_get_physical_mapping(addr, &result); 59 59 if (ret != EOK) 60 60 return 0; 61 62 return result; 61 return (result | ((uintptr_t)addr & 0xfff)); 63 62 } 64 63 /*----------------------------------------------------------------------------*/ -
uspace/drv/nic/e1k/e1k.c
r792807f r9916841 70 70 71 71 /** nic_driver_data_t* -> e1000_t* cast */ 72 #define DRIVER_DATA_NIC(nic ) \73 ((e1000_t *) nic_get_specific(nic ))72 #define DRIVER_DATA_NIC(nic_data) \ 73 ((e1000_t *) nic_get_specific(nic_data)) 74 74 75 75 /** device_t* -> nic_driver_data_t* cast */ … … 97 97 #define MEMADDR_TO_PTR(memaddr) ((void *) ((size_t) (memaddr))) 98 98 99 #define E1000_REG_BASE(e1000 ) \100 ((e1000 )->reg_base_virt)101 102 #define E1000_REG_ADDR(e1000 , reg) \103 ((uint32_t *) (E1000_REG_BASE(e1000 ) + reg))104 105 #define E1000_REG_READ(e1000 , reg) \106 (pio_read_32(E1000_REG_ADDR(e1000 , reg)))107 108 #define E1000_REG_WRITE(e1000 , reg, value) \109 (pio_write_32(E1000_REG_ADDR(e1000 , reg), value))99 #define E1000_REG_BASE(e1000_data) \ 100 ((e1000_data)->virt_reg_base) 101 102 #define E1000_REG_ADDR(e1000_data, reg) \ 103 ((uint32_t *) (E1000_REG_BASE(e1000_data) + reg)) 104 105 #define E1000_REG_READ(e1000_data, reg) \ 106 (pio_read_32(E1000_REG_ADDR(e1000_data, reg))) 107 108 #define E1000_REG_WRITE(e1000_data, reg, value) \ 109 (pio_write_32(E1000_REG_ADDR(e1000_data, reg), value)) 110 110 111 111 /** E1000 device data */ 112 typedef struct {112 typedef struct e1000_data { 113 113 /** Physical registers base address */ 114 void * reg_base_phys;114 void *phys_reg_base; 115 115 /** Virtual registers base address */ 116 void *reg_base_virt; 117 118 /** Physical tx ring address */ 119 void *tx_ring_phys; 120 /** Virtual tx ring address */ 121 void *tx_ring_virt; 122 116 void *virt_reg_base; 117 /** Tx ring */ 118 dmamem_t tx_ring; 123 119 /** Packets in tx ring */ 124 120 packet_t **tx_ring_packets; 125 126 /** Physical rx ring address */ 127 void *rx_ring_phys; 128 /** Virtual rx ring address */ 129 void *rx_ring_virt; 130 121 /** Rx ring */ 122 dmamem_t rx_ring; 131 123 /** Packets in rx ring */ 132 124 packet_t **rx_ring_packets; 133 134 125 /** VLAN tag */ 135 126 uint16_t vlan_tag; 136 137 127 /** Add VLAN tag to packet */ 138 128 bool vlan_tag_add; 139 140 129 /** Used unicast Receive Address count */ 141 130 unsigned int unicast_ra_count; 142 143 131 /** Used milticast Receive addrress count */ 144 132 unsigned int multicast_ra_count; 145 146 133 /** PCI device ID */ 147 134 uint16_t device_id; 148 149 135 /** The irq assigned */ 150 136 int irq; 151 152 137 /** Lock for CTRL register */ 153 138 fibril_mutex_t ctrl_lock; 154 155 139 /** Lock for receiver */ 156 140 fibril_mutex_t rx_lock; 157 158 141 /** Lock for transmitter */ 159 142 fibril_mutex_t tx_lock; 160 161 143 /** Lock for EEPROM access */ 162 144 fibril_mutex_t eeprom_lock; … … 243 225 .cmd = CMD_PIO_WRITE_32, 244 226 .addr = NULL, 245 .value = 0x ffffffff227 .value = 0xFFFFFFFF 246 228 }, 247 229 { … … 298 280 assert(state); 299 281 300 e1000_t *e1000 = DRIVER_DATA_DEV(dev);301 if (E1000_REG_READ(e1000 , E1000_STATUS) & (STATUS_LU))282 e1000_t *e1000_data = DRIVER_DATA_DEV(dev); 283 if (E1000_REG_READ(e1000_data, E1000_STATUS) & (STATUS_LU)) 302 284 *state = NIC_CS_PLUGGED; 303 285 else … … 318 300 nic_channel_mode_t *duplex, nic_role_t *role) 319 301 { 320 e1000_t *e1000 = DRIVER_DATA_DEV(dev);321 uint32_t status = E1000_REG_READ(e1000 , E1000_STATUS);302 e1000_t *e1000_data = DRIVER_DATA_DEV(dev); 303 uint32_t status = E1000_REG_READ(e1000_data, E1000_STATUS); 322 304 323 305 if (status & STATUS_FD) … … 341 323 } 342 324 343 static void e1000_link_restart(e1000_t * e1000)344 { 345 fibril_mutex_lock(&e1000 ->ctrl_lock);346 347 uint32_t ctrl = E1000_REG_READ(e1000 , E1000_CTRL);325 static void e1000_link_restart(e1000_t * e1000_data) 326 { 327 fibril_mutex_lock(&e1000_data->ctrl_lock); 328 329 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL); 348 330 349 331 if (ctrl & CTRL_SLU) { 350 332 ctrl &= ~(CTRL_SLU); 351 fibril_mutex_unlock(&e1000 ->ctrl_lock);333 fibril_mutex_unlock(&e1000_data->ctrl_lock); 352 334 usleep(10); 353 fibril_mutex_lock(&e1000 ->ctrl_lock);335 fibril_mutex_lock(&e1000_data->ctrl_lock); 354 336 ctrl |= CTRL_SLU; 355 337 } 356 338 357 fibril_mutex_unlock(&e1000 ->ctrl_lock);358 359 e1000_link_restart(e1000 );339 fibril_mutex_unlock(&e1000_data->ctrl_lock); 340 341 e1000_link_restart(e1000_data); 360 342 } 361 343 … … 372 354 return EINVAL; 373 355 374 e1000_t *e1000 = DRIVER_DATA_DEV(dev);375 376 fibril_mutex_lock(&e1000 ->ctrl_lock);377 uint32_t ctrl = E1000_REG_READ(e1000 , E1000_CTRL);356 e1000_t *e1000_data = DRIVER_DATA_DEV(dev); 357 358 fibril_mutex_lock(&e1000_data->ctrl_lock); 359 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL); 378 360 379 361 ctrl |= CTRL_FRCSPD; … … 394 376 ctrl |= CTRL_SPEED_10 << CTRL_SPEED_SHIFT; 395 377 396 E1000_REG_WRITE(e1000 , E1000_CTRL, ctrl);397 398 fibril_mutex_unlock(&e1000 ->ctrl_lock);399 400 e1000_link_restart(e1000 );378 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl); 379 380 fibril_mutex_unlock(&e1000_data->ctrl_lock); 381 382 e1000_link_restart(e1000_data); 401 383 402 384 return EOK; … … 413 395 static int e1000_autoneg_enable(ddf_fun_t *dev, uint32_t advertisement) 414 396 { 415 e1000_t *e1000 = DRIVER_DATA_DEV(dev);416 417 fibril_mutex_lock(&e1000 ->ctrl_lock);418 419 uint32_t ctrl = E1000_REG_READ(e1000 , E1000_CTRL);397 e1000_t *e1000_data = DRIVER_DATA_DEV(dev); 398 399 fibril_mutex_lock(&e1000_data->ctrl_lock); 400 401 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL); 420 402 421 403 ctrl &= ~(CTRL_FRCSPD); … … 423 405 ctrl |= CTRL_ASDE; 424 406 425 E1000_REG_WRITE(e1000 , E1000_CTRL, ctrl);426 427 fibril_mutex_unlock(&e1000 ->ctrl_lock);428 429 e1000_link_restart(e1000 );407 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl); 408 409 fibril_mutex_unlock(&e1000_data->ctrl_lock); 410 411 e1000_link_restart(e1000_data); 430 412 431 413 return EOK; … … 441 423 static int e1000_autoneg_disable(ddf_fun_t *dev) 442 424 { 443 e1000_t *e1000 = DRIVER_DATA_DEV(dev);444 445 fibril_mutex_lock(&e1000 ->ctrl_lock);446 447 uint32_t ctrl = E1000_REG_READ(e1000 , E1000_CTRL);425 e1000_t *e1000_data = DRIVER_DATA_DEV(dev); 426 427 fibril_mutex_lock(&e1000_data->ctrl_lock); 428 429 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL); 448 430 449 431 ctrl |= CTRL_FRCSPD; … … 451 433 ctrl &= ~(CTRL_ASDE); 452 434 453 E1000_REG_WRITE(e1000 , E1000_CTRL, ctrl);454 455 fibril_mutex_unlock(&e1000 ->ctrl_lock);456 457 e1000_link_restart(e1000 );435 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl); 436 437 fibril_mutex_unlock(&e1000_data->ctrl_lock); 438 439 e1000_link_restart(e1000_data); 458 440 459 441 return EOK; … … 480 462 static int e1000_defective_get_mode(ddf_fun_t *device, uint32_t *mode) 481 463 { 482 e1000_t *e1000 = DRIVER_DATA_DEV(device);464 e1000_t *e1000_data = DRIVER_DATA_DEV(device); 483 465 484 466 *mode = 0; 485 uint32_t rctl = E1000_REG_READ(e1000 , E1000_RCTL);467 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL); 486 468 if (rctl & RCTL_SBP) 487 469 *mode = NIC_DEFECTIVE_BAD_CRC | NIC_DEFECTIVE_SHORT; … … 501 483 static int e1000_defective_set_mode(ddf_fun_t *device, uint32_t mode) 502 484 { 503 e1000_t *e1000 = DRIVER_DATA_DEV(device);485 e1000_t *e1000_data = DRIVER_DATA_DEV(device); 504 486 int rc = EOK; 505 487 506 fibril_mutex_lock(&e1000 ->rx_lock);507 508 uint32_t rctl = E1000_REG_READ(e1000 , E1000_RCTL);488 fibril_mutex_lock(&e1000_data->rx_lock); 489 490 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL); 509 491 bool short_mode = (mode & NIC_DEFECTIVE_SHORT ? true : false); 510 492 bool bad_mode = (mode & NIC_DEFECTIVE_BAD_CRC ? true : false); … … 517 499 rc = ENOTSUP; 518 500 519 E1000_REG_WRITE(e1000 , E1000_RCTL, rctl);520 521 fibril_mutex_unlock(&e1000 ->rx_lock);501 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl); 502 503 fibril_mutex_unlock(&e1000_data->rx_lock); 522 504 return rc; 523 505 }; … … 525 507 /** Write receive address to RA registr 526 508 * 527 * @param e1000 509 * @param e1000_data E1000 data structure 528 510 * @param position RA register position 529 511 * @param address Ethernet address … … 531 513 * 532 514 */ 533 static void e1000_write_receive_address(e1000_t *e1000, unsigned int position, 534 const nic_address_t * address, bool set_av_bit) 515 static void e1000_write_receive_address(e1000_t *e1000_data, 516 unsigned int position, const nic_address_t * address, 517 bool set_av_bit) 535 518 { 536 519 uint8_t *mac0 = (uint8_t *) address->address; … … 550 533 rah |= RAH_AV; 551 534 else 552 rah |= E1000_REG_READ(e1000, E1000_RAH_ARRAY(position)) & RAH_AV; 553 554 E1000_REG_WRITE(e1000, E1000_RAH_ARRAY(position), rah); 555 E1000_REG_WRITE(e1000, E1000_RAL_ARRAY(position), ral); 535 rah |= E1000_REG_READ(e1000_data, E1000_RAH_ARRAY(position)) & 536 RAH_AV; 537 538 E1000_REG_WRITE(e1000_data, E1000_RAH_ARRAY(position), rah); 539 E1000_REG_WRITE(e1000_data, E1000_RAL_ARRAY(position), ral); 556 540 } 557 541 … … 560 544 * Clear Address Valid bit 561 545 * 562 * @param e1000 E1000 data structure 563 * @param position RA register position 564 * 565 */ 566 static void e1000_disable_receive_address(e1000_t *e1000, unsigned int position) 567 { 568 uint32_t rah = E1000_REG_READ(e1000, E1000_RAH_ARRAY(position)); 546 * @param e1000_data E1000 data structure 547 * @param position RA register position 548 * 549 */ 550 static void e1000_disable_receive_address(e1000_t *e1000_data, 551 unsigned int position) 552 { 553 uint32_t rah = 554 E1000_REG_READ(e1000_data, E1000_RAH_ARRAY(position)); 569 555 rah = rah & ~RAH_AV; 570 E1000_REG_WRITE(e1000 , E1000_RAH_ARRAY(position), rah);556 E1000_REG_WRITE(e1000_data, E1000_RAH_ARRAY(position), rah); 571 557 } 572 558 573 559 /** Clear all unicast addresses from RA registers 574 560 * 575 * @param e1000 E1000 data structure576 * 577 */ 578 static void e1000_clear_unicast_receive_addresses(e1000_t *e1000 )561 * @param e1000_data E1000 data structure 562 * 563 */ 564 static void e1000_clear_unicast_receive_addresses(e1000_t *e1000_data) 579 565 { 580 566 for (unsigned int ra_num = 1; 581 ra_num <= e1000 ->unicast_ra_count;567 ra_num <= e1000_data->unicast_ra_count; 582 568 ra_num++) 583 e1000_disable_receive_address(e1000 , ra_num);584 585 e1000 ->unicast_ra_count = 0;569 e1000_disable_receive_address(e1000_data, ra_num); 570 571 e1000_data->unicast_ra_count = 0; 586 572 } 587 573 588 574 /** Clear all multicast addresses from RA registers 589 575 * 590 * @param e1000 E1000 data structure591 * 592 */ 593 static void e1000_clear_multicast_receive_addresses(e1000_t *e1000 )576 * @param e1000_data E1000 data structure 577 * 578 */ 579 static void e1000_clear_multicast_receive_addresses(e1000_t *e1000_data) 594 580 { 595 581 unsigned int first_multicast_ra_num = 596 E1000_RECEIVE_ADDRESS - e1000 ->multicast_ra_count;582 E1000_RECEIVE_ADDRESS - e1000_data->multicast_ra_count; 597 583 598 584 for (unsigned int ra_num = E1000_RECEIVE_ADDRESS - 1; 599 585 ra_num >= first_multicast_ra_num; 600 586 ra_num--) 601 e1000_disable_receive_address(e1000 , ra_num);602 603 e1000 ->multicast_ra_count = 0;587 e1000_disable_receive_address(e1000_data, ra_num); 588 589 e1000_data->multicast_ra_count = 0; 604 590 } 605 591 606 592 /** Return receive address filter positions count usable for unicast 607 593 * 608 * @param e1000 E1000 data structure594 * @param e1000_data E1000 data structure 609 595 * 610 596 * @return receive address filter positions count usable for unicast 611 597 * 612 598 */ 613 static unsigned int get_free_unicast_address_count(e1000_t *e1000 )614 { 615 return E1000_RECEIVE_ADDRESS - 1 - e1000 ->multicast_ra_count;599 static unsigned int get_free_unicast_address_count(e1000_t *e1000_data) 600 { 601 return E1000_RECEIVE_ADDRESS - 1 - e1000_data->multicast_ra_count; 616 602 } 617 603 618 604 /** Return receive address filter positions count usable for multicast 619 605 * 620 * @param e1000 E1000 data structure606 * @param e1000_data E1000 data structure 621 607 * 622 608 * @return receive address filter positions count usable for multicast 623 609 * 624 610 */ 625 static unsigned int get_free_multicast_address_count(e1000_t *e1000 )626 { 627 return E1000_RECEIVE_ADDRESS - 1 - e1000 ->unicast_ra_count;611 static unsigned int get_free_multicast_address_count(e1000_t *e1000_data) 612 { 613 return E1000_RECEIVE_ADDRESS - 1 - e1000_data->unicast_ra_count; 628 614 } 629 615 630 616 /** Write unicast receive addresses to receive address filter registers 631 617 * 632 * @param e1000 633 * @param addr Pointer to address array634 * @param addr_cnt Address array count635 * 636 */ 637 static void e1000_add_unicast_receive_addresses(e1000_t *e1000 ,618 * @param e1000_data E1000 data structure 619 * @param addr Pointer to address array 620 * @param addr_cnt Address array count 621 * 622 */ 623 static void e1000_add_unicast_receive_addresses(e1000_t *e1000_data, 638 624 const nic_address_t *addr, size_t addr_cnt) 639 625 { 640 assert(addr_cnt <= get_free_unicast_address_count(e1000 ));626 assert(addr_cnt <= get_free_unicast_address_count(e1000_data)); 641 627 642 628 nic_address_t *addr_iterator = (nic_address_t *) addr; … … 646 632 ra_num <= addr_cnt; 647 633 ra_num++) { 648 e1000_write_receive_address(e1000 , ra_num, addr_iterator, true);634 e1000_write_receive_address(e1000_data, ra_num, addr_iterator, true); 649 635 addr_iterator++; 650 636 } … … 653 639 /** Write multicast receive addresses to receive address filter registers 654 640 * 655 * @param e1000 656 * @param addr Pointer to address array657 * @param addr_cnt Address array count658 * 659 */ 660 static void e1000_add_multicast_receive_addresses(e1000_t *e1000 ,641 * @param e1000_data E1000 data structure 642 * @param addr Pointer to address array 643 * @param addr_cnt Address array count 644 * 645 */ 646 static void e1000_add_multicast_receive_addresses(e1000_t *e1000_data, 661 647 const nic_address_t *addr, size_t addr_cnt) 662 648 { 663 assert(addr_cnt <= get_free_multicast_address_count(e1000 ));649 assert(addr_cnt <= get_free_multicast_address_count(e1000_data)); 664 650 665 651 nic_address_t *addr_iterator = (nic_address_t *) addr; … … 669 655 ra_num >= first_multicast_ra_num; 670 656 ra_num--) { 671 e1000_write_receive_address(e1000 , ra_num, addr_iterator, true);657 e1000_write_receive_address(e1000_data, ra_num, addr_iterator, true); 672 658 addr_iterator++; 673 659 } … … 676 662 /** Disable receiving packets for default address 677 663 * 678 * @param e1000 E1000 data structure679 * 680 */ 681 static void disable_ra0_address_filter(e1000_t *e1000 )682 { 683 uint32_t rah0 = E1000_REG_READ(e1000 , E1000_RAH_ARRAY(0));664 * @param e1000_data E1000 data structure 665 * 666 */ 667 static void disable_ra0_address_filter(e1000_t *e1000_data) 668 { 669 uint32_t rah0 = E1000_REG_READ(e1000_data, E1000_RAH_ARRAY(0)); 684 670 rah0 = rah0 & ~RAH_AV; 685 E1000_REG_WRITE(e1000 , E1000_RAH_ARRAY(0), rah0);671 E1000_REG_WRITE(e1000_data, E1000_RAH_ARRAY(0), rah0); 686 672 } 687 673 688 674 /** Enable receiving packets for default address 689 675 * 690 * @param e1000 E1000 data structure691 * 692 */ 693 static void enable_ra0_address_filter(e1000_t *e1000 )694 { 695 uint32_t rah0 = E1000_REG_READ(e1000 , E1000_RAH_ARRAY(0));676 * @param e1000_data E1000 data structure 677 * 678 */ 679 static void enable_ra0_address_filter(e1000_t *e1000_data) 680 { 681 uint32_t rah0 = E1000_REG_READ(e1000_data, E1000_RAH_ARRAY(0)); 696 682 rah0 = rah0 | RAH_AV; 697 E1000_REG_WRITE(e1000 , E1000_RAH_ARRAY(0), rah0);683 E1000_REG_WRITE(e1000_data, E1000_RAH_ARRAY(0), rah0); 698 684 } 699 685 700 686 /** Disable unicast promiscuous mode 701 687 * 702 * @param e1000 E1000 data structure703 * 704 */ 705 static void e1000_disable_unicast_promisc(e1000_t *e1000 )706 { 707 uint32_t rctl = E1000_REG_READ(e1000 , E1000_RCTL);688 * @param e1000_data E1000 data structure 689 * 690 */ 691 static void e1000_disable_unicast_promisc(e1000_t *e1000_data) 692 { 693 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL); 708 694 rctl = rctl & ~RCTL_UPE; 709 E1000_REG_WRITE(e1000 , E1000_RCTL, rctl);695 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl); 710 696 } 711 697 712 698 /** Enable unicast promiscuous mode 713 699 * 714 * @param e1000 E1000 data structure715 * 716 */ 717 static void e1000_enable_unicast_promisc(e1000_t *e1000 )718 { 719 uint32_t rctl = E1000_REG_READ(e1000 , E1000_RCTL);700 * @param e1000_data E1000 data structure 701 * 702 */ 703 static void e1000_enable_unicast_promisc(e1000_t *e1000_data) 704 { 705 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL); 720 706 rctl = rctl | RCTL_UPE; 721 E1000_REG_WRITE(e1000 , E1000_RCTL, rctl);707 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl); 722 708 } 723 709 724 710 /** Disable multicast promiscuous mode 725 711 * 726 * @param e1000 E1000 data structure727 * 728 */ 729 static void e1000_disable_multicast_promisc(e1000_t *e1000 )730 { 731 uint32_t rctl = E1000_REG_READ(e1000 , E1000_RCTL);712 * @param e1000_data E1000 data structure 713 * 714 */ 715 static void e1000_disable_multicast_promisc(e1000_t *e1000_data) 716 { 717 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL); 732 718 rctl = rctl & ~RCTL_MPE; 733 E1000_REG_WRITE(e1000 , E1000_RCTL, rctl);719 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl); 734 720 } 735 721 736 722 /** Enable multicast promiscuous mode 737 723 * 738 * @param e1000 E1000 data structure739 * 740 */ 741 static void e1000_enable_multicast_promisc(e1000_t *e1000 )742 { 743 uint32_t rctl = E1000_REG_READ(e1000 , E1000_RCTL);724 * @param e1000_data E1000 data structure 725 * 726 */ 727 static void e1000_enable_multicast_promisc(e1000_t *e1000_data) 728 { 729 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL); 744 730 rctl = rctl | RCTL_MPE; 745 E1000_REG_WRITE(e1000 , E1000_RCTL, rctl);731 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl); 746 732 } 747 733 748 734 /** Enable accepting of broadcast packets 749 735 * 750 * @param e1000 E1000 data structure751 * 752 */ 753 static void e1000_enable_broadcast_accept(e1000_t *e1000 )754 { 755 uint32_t rctl = E1000_REG_READ(e1000 , E1000_RCTL);736 * @param e1000_data E1000 data structure 737 * 738 */ 739 static void e1000_enable_broadcast_accept(e1000_t *e1000_data) 740 { 741 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL); 756 742 rctl = rctl | RCTL_BAM; 757 E1000_REG_WRITE(e1000 , E1000_RCTL, rctl);743 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl); 758 744 } 759 745 760 746 /** Disable accepting of broadcast packets 761 747 * 762 * @param e1000 E1000 data structure763 * 764 */ 765 static void e1000_disable_broadcast_accept(e1000_t *e1000 )766 { 767 uint32_t rctl = E1000_REG_READ(e1000 , E1000_RCTL);748 * @param e1000_data E1000 data structure 749 * 750 */ 751 static void e1000_disable_broadcast_accept(e1000_t *e1000_data) 752 { 753 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL); 768 754 rctl = rctl & ~RCTL_BAM; 769 E1000_REG_WRITE(e1000 , E1000_RCTL, rctl);755 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl); 770 756 } 771 757 772 758 /** Enable VLAN filtering according to VFTA registers 773 759 * 774 * @param e1000 E1000 data structure775 * 776 */ 777 static void e1000_enable_vlan_filter(e1000_t *e1000 )778 { 779 uint32_t rctl = E1000_REG_READ(e1000 , E1000_RCTL);760 * @param e1000_data E1000 data structure 761 * 762 */ 763 static void e1000_enable_vlan_filter(e1000_t *e1000_data) 764 { 765 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL); 780 766 rctl = rctl | RCTL_VFE; 781 E1000_REG_WRITE(e1000 , E1000_RCTL, rctl);767 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl); 782 768 } 783 769 784 770 /** Disable VLAN filtering 785 771 * 786 * @param e1000 E1000 data structure787 * 788 */ 789 static void e1000_disable_vlan_filter(e1000_t *e1000 )790 { 791 uint32_t rctl = E1000_REG_READ(e1000 , E1000_RCTL);772 * @param e1000_data E1000 data structure 773 * 774 */ 775 static void e1000_disable_vlan_filter(e1000_t *e1000_data) 776 { 777 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL); 792 778 rctl = rctl & ~RCTL_VFE; 793 E1000_REG_WRITE(e1000 , E1000_RCTL, rctl);779 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl); 794 780 } 795 781 796 782 /** Set multicast packets acceptance mode 797 783 * 798 * @param nic 784 * @param nic_data NIC device to update 799 785 * @param mode Mode to set 800 786 * @param addr Address list (used in mode = NIC_MULTICAST_LIST) … … 804 790 * 805 791 */ 806 static int e1000_on_multicast_mode_change(nic_t *nic , nic_multicast_mode_t mode,807 const nic_address_t *addr, size_t addr_cnt)808 { 809 e1000_t *e1000 = DRIVER_DATA_NIC(nic);792 static int e1000_on_multicast_mode_change(nic_t *nic_data, 793 nic_multicast_mode_t mode, const nic_address_t *addr, size_t addr_cnt) 794 { 795 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 810 796 int rc = EOK; 811 797 812 fibril_mutex_lock(&e1000 ->rx_lock);798 fibril_mutex_lock(&e1000_data->rx_lock); 813 799 814 800 switch (mode) { 815 801 case NIC_MULTICAST_BLOCKED: 816 e1000_clear_multicast_receive_addresses(e1000 );817 e1000_disable_multicast_promisc(e1000 );818 nic_report_hw_filtering(nic , -1, 1, -1);802 e1000_clear_multicast_receive_addresses(e1000_data); 803 e1000_disable_multicast_promisc(e1000_data); 804 nic_report_hw_filtering(nic_data, -1, 1, -1); 819 805 break; 820 806 case NIC_MULTICAST_LIST: 821 e1000_clear_multicast_receive_addresses(e1000 );822 if (addr_cnt > get_free_multicast_address_count(e1000 )) {807 e1000_clear_multicast_receive_addresses(e1000_data); 808 if (addr_cnt > get_free_multicast_address_count(e1000_data)) { 823 809 /* 824 810 * Future work: fill MTA table … … 826 812 * in the NIC library. 827 813 */ 828 e1000_enable_multicast_promisc(e1000 );829 nic_report_hw_filtering(nic , -1, 0, -1);814 e1000_enable_multicast_promisc(e1000_data); 815 nic_report_hw_filtering(nic_data, -1, 0, -1); 830 816 } else { 831 e1000_disable_multicast_promisc(e1000 );832 e1000_add_multicast_receive_addresses(e1000 , addr, addr_cnt);833 nic_report_hw_filtering(nic , -1, 1, -1);817 e1000_disable_multicast_promisc(e1000_data); 818 e1000_add_multicast_receive_addresses(e1000_data, addr, addr_cnt); 819 nic_report_hw_filtering(nic_data, -1, 1, -1); 834 820 } 835 821 break; 836 822 case NIC_MULTICAST_PROMISC: 837 e1000_enable_multicast_promisc(e1000 );838 e1000_clear_multicast_receive_addresses(e1000 );839 nic_report_hw_filtering(nic , -1, 1, -1);823 e1000_enable_multicast_promisc(e1000_data); 824 e1000_clear_multicast_receive_addresses(e1000_data); 825 nic_report_hw_filtering(nic_data, -1, 1, -1); 840 826 break; 841 827 default: … … 844 830 } 845 831 846 fibril_mutex_unlock(&e1000 ->rx_lock);832 fibril_mutex_unlock(&e1000_data->rx_lock); 847 833 return rc; 848 834 } … … 850 836 /** Set unicast packets acceptance mode 851 837 * 852 * @param nic 838 * @param nic_data NIC device to update 853 839 * @param mode Mode to set 854 840 * @param addr Address list (used in mode = NIC_MULTICAST_LIST) … … 858 844 * 859 845 */ 860 static int e1000_on_unicast_mode_change(nic_t *nic , nic_unicast_mode_t mode,861 const nic_address_t *addr, size_t addr_cnt)862 { 863 e1000_t *e1000 = DRIVER_DATA_NIC(nic);846 static int e1000_on_unicast_mode_change(nic_t *nic_data, 847 nic_unicast_mode_t mode, const nic_address_t *addr, size_t addr_cnt) 848 { 849 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 864 850 int rc = EOK; 865 851 866 fibril_mutex_lock(&e1000 ->rx_lock);852 fibril_mutex_lock(&e1000_data->rx_lock); 867 853 868 854 switch (mode) { 869 855 case NIC_UNICAST_BLOCKED: 870 disable_ra0_address_filter(e1000 );871 e1000_clear_unicast_receive_addresses(e1000 );872 e1000_disable_unicast_promisc(e1000 );873 nic_report_hw_filtering(nic , 1, -1, -1);856 disable_ra0_address_filter(e1000_data); 857 e1000_clear_unicast_receive_addresses(e1000_data); 858 e1000_disable_unicast_promisc(e1000_data); 859 nic_report_hw_filtering(nic_data, 1, -1, -1); 874 860 break; 875 861 case NIC_UNICAST_DEFAULT: 876 enable_ra0_address_filter(e1000 );877 e1000_clear_unicast_receive_addresses(e1000 );878 e1000_disable_unicast_promisc(e1000 );879 nic_report_hw_filtering(nic , 1, -1, -1);862 enable_ra0_address_filter(e1000_data); 863 e1000_clear_unicast_receive_addresses(e1000_data); 864 e1000_disable_unicast_promisc(e1000_data); 865 nic_report_hw_filtering(nic_data, 1, -1, -1); 880 866 break; 881 867 case NIC_UNICAST_LIST: 882 enable_ra0_address_filter(e1000 );883 e1000_clear_unicast_receive_addresses(e1000 );884 if (addr_cnt > get_free_unicast_address_count(e1000 )) {885 e1000_enable_unicast_promisc(e1000 );886 nic_report_hw_filtering(nic , 0, -1, -1);868 enable_ra0_address_filter(e1000_data); 869 e1000_clear_unicast_receive_addresses(e1000_data); 870 if (addr_cnt > get_free_unicast_address_count(e1000_data)) { 871 e1000_enable_unicast_promisc(e1000_data); 872 nic_report_hw_filtering(nic_data, 0, -1, -1); 887 873 } else { 888 e1000_disable_unicast_promisc(e1000 );889 e1000_add_unicast_receive_addresses(e1000 , addr, addr_cnt);890 nic_report_hw_filtering(nic , 1, -1, -1);874 e1000_disable_unicast_promisc(e1000_data); 875 e1000_add_unicast_receive_addresses(e1000_data, addr, addr_cnt); 876 nic_report_hw_filtering(nic_data, 1, -1, -1); 891 877 } 892 878 break; 893 879 case NIC_UNICAST_PROMISC: 894 e1000_enable_unicast_promisc(e1000 );895 enable_ra0_address_filter(e1000 );896 e1000_clear_unicast_receive_addresses(e1000 );897 nic_report_hw_filtering(nic , 1, -1, -1);880 e1000_enable_unicast_promisc(e1000_data); 881 enable_ra0_address_filter(e1000_data); 882 e1000_clear_unicast_receive_addresses(e1000_data); 883 nic_report_hw_filtering(nic_data, 1, -1, -1); 898 884 break; 899 885 default: … … 902 888 } 903 889 904 fibril_mutex_unlock(&e1000 ->rx_lock);890 fibril_mutex_unlock(&e1000_data->rx_lock); 905 891 return rc; 906 892 } … … 908 894 /** Set broadcast packets acceptance mode 909 895 * 910 * @param nic 911 * @param mode Mode to set896 * @param nic_data NIC device to update 897 * @param mode Mode to set 912 898 * 913 899 * @return EOK 914 900 * 915 901 */ 916 static int e1000_on_broadcast_mode_change(nic_t *nic, nic_broadcast_mode_t mode) 917 { 918 e1000_t *e1000 = DRIVER_DATA_NIC(nic); 902 static int e1000_on_broadcast_mode_change(nic_t *nic_data, 903 nic_broadcast_mode_t mode) 904 { 905 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 919 906 int rc = EOK; 920 907 921 fibril_mutex_lock(&e1000 ->rx_lock);908 fibril_mutex_lock(&e1000_data->rx_lock); 922 909 923 910 switch (mode) { 924 911 case NIC_BROADCAST_BLOCKED: 925 e1000_disable_broadcast_accept(e1000 );912 e1000_disable_broadcast_accept(e1000_data); 926 913 break; 927 914 case NIC_BROADCAST_ACCEPTED: 928 e1000_enable_broadcast_accept(e1000 );915 e1000_enable_broadcast_accept(e1000_data); 929 916 break; 930 917 default: … … 933 920 } 934 921 935 fibril_mutex_unlock(&e1000 ->rx_lock);922 fibril_mutex_unlock(&e1000_data->rx_lock); 936 923 return rc; 937 924 } … … 939 926 /** Check if receiving is enabled 940 927 * 941 * @param e1000 E1000 data structure928 * @param e1000_data E1000 data structure 942 929 * 943 930 * @return true if receiving is enabled 944 931 * 945 932 */ 946 static bool e1000_is_rx_enabled(e1000_t *e1000 )947 { 948 if (E1000_REG_READ(e1000 , E1000_RCTL) & (RCTL_EN))933 static bool e1000_is_rx_enabled(e1000_t *e1000_data) 934 { 935 if (E1000_REG_READ(e1000_data, E1000_RCTL) & (RCTL_EN)) 949 936 return true; 950 937 … … 954 941 /** Enable receiving 955 942 * 956 * @param e1000 E1000 data structure957 * 958 */ 959 static void e1000_enable_rx(e1000_t *e1000 )943 * @param e1000_data E1000 data structure 944 * 945 */ 946 static void e1000_enable_rx(e1000_t *e1000_data) 960 947 { 961 948 /* Set Receive Enable Bit */ 962 E1000_REG_WRITE(e1000 , E1000_RCTL,963 E1000_REG_READ(e1000 , E1000_RCTL) | (RCTL_EN));949 E1000_REG_WRITE(e1000_data, E1000_RCTL, 950 E1000_REG_READ(e1000_data, E1000_RCTL) | (RCTL_EN)); 964 951 } 965 952 966 953 /** Disable receiving 967 954 * 968 * @param e1000 E1000 data structure969 * 970 */ 971 static void e1000_disable_rx(e1000_t *e1000 )955 * @param e1000_data E1000 data structure 956 * 957 */ 958 static void e1000_disable_rx(e1000_t *e1000_data) 972 959 { 973 960 /* Clear Receive Enable Bit */ 974 E1000_REG_WRITE(e1000 , E1000_RCTL,975 E1000_REG_READ(e1000 , E1000_RCTL) & ~(RCTL_EN));961 E1000_REG_WRITE(e1000_data, E1000_RCTL, 962 E1000_REG_READ(e1000_data, E1000_RCTL) & ~(RCTL_EN)); 976 963 } 977 964 978 965 /** Set VLAN mask 979 966 * 980 * @param nic 967 * @param nic_data NIC device to update 981 968 * @param vlan_mask VLAN mask 982 969 * 983 970 */ 984 static void e1000_on_vlan_mask_change(nic_t *nic ,985 986 { 987 e1000_t *e1000 = DRIVER_DATA_NIC(nic);988 989 fibril_mutex_lock(&e1000 ->rx_lock);971 static void e1000_on_vlan_mask_change(nic_t *nic_data, 972 const nic_vlan_mask_t *vlan_mask) 973 { 974 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 975 976 fibril_mutex_lock(&e1000_data->rx_lock); 990 977 991 978 if (vlan_mask) { … … 994 981 * partially written VLAN is not received. 995 982 */ 996 bool rx_enabled = e1000_is_rx_enabled(e1000 );983 bool rx_enabled = e1000_is_rx_enabled(e1000_data); 997 984 if (rx_enabled) 998 e1000_disable_rx(e1000 );985 e1000_disable_rx(e1000_data); 999 986 1000 987 for (unsigned int i = 0; i < NIC_VLAN_BITMAP_SIZE; i += 4) { … … 1004 991 (((uint32_t) vlan_mask->bitmap[i + 2]) << 16) | 1005 992 (((uint32_t) vlan_mask->bitmap[i + 3]) << 24); 1006 E1000_REG_WRITE(e1000 , E1000_VFTA_ARRAY(i / 4), bitmap_part);993 E1000_REG_WRITE(e1000_data, E1000_VFTA_ARRAY(i / 4), bitmap_part); 1007 994 } 1008 995 1009 e1000_enable_vlan_filter(e1000 );996 e1000_enable_vlan_filter(e1000_data); 1010 997 if (rx_enabled) 1011 e1000_enable_rx(e1000 );998 e1000_enable_rx(e1000_data); 1012 999 } else 1013 e1000_disable_vlan_filter(e1000 );1014 1015 fibril_mutex_unlock(&e1000 ->rx_lock);1000 e1000_disable_vlan_filter(e1000_data); 1001 1002 fibril_mutex_unlock(&e1000_data->rx_lock); 1016 1003 } 1017 1004 … … 1039 1026 return ENOTSUP; 1040 1027 1041 e1000_t *e1000 = DRIVER_DATA_DEV(device);1042 1043 e1000 ->vlan_tag = tag;1044 e1000 ->vlan_tag_add = add;1045 1046 fibril_mutex_lock(&e1000 ->ctrl_lock);1047 1048 uint32_t ctrl = E1000_REG_READ(e1000 , E1000_CTRL);1028 e1000_t *e1000_data = DRIVER_DATA_DEV(device); 1029 1030 e1000_data->vlan_tag = tag; 1031 e1000_data->vlan_tag_add = add; 1032 1033 fibril_mutex_lock(&e1000_data->ctrl_lock); 1034 1035 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL); 1049 1036 if (strip) 1050 1037 ctrl |= CTRL_VME; … … 1052 1039 ctrl &= ~CTRL_VME; 1053 1040 1054 E1000_REG_WRITE(e1000 , E1000_CTRL, ctrl);1055 1056 fibril_mutex_unlock(&e1000 ->ctrl_lock);1041 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl); 1042 1043 fibril_mutex_unlock(&e1000_data->ctrl_lock); 1057 1044 return EOK; 1058 1045 } … … 1060 1047 /** Fill receive descriptor with new empty packet 1061 1048 * 1062 * Store packet in e1000->rx_ring_packets 1063 * 1064 * @param nic NIC data stricture 1065 * @param offset Receive descriptor offset 1066 * 1067 */ 1068 static void e1000_fill_new_rx_descriptor(nic_t *nic, size_t offset) 1069 { 1070 e1000_t *e1000 = DRIVER_DATA_NIC(nic); 1071 packet_t *packet = 1072 nic_alloc_packet(nic, E1000_MAX_RECEIVE_PACKET_SIZE); 1049 * Store packet in e1000_data->rx_ring_packets 1050 * 1051 * @param nic_data NIC data stricture 1052 * @param offset Receive descriptor offset 1053 * 1054 */ 1055 static void e1000_fill_new_rx_descriptor(nic_t *nic_data, unsigned int offset) 1056 { 1057 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1058 packet_t *packet = nic_alloc_packet(nic_data, E1000_MAX_RECEIVE_PACKET_SIZE); 1073 1059 1074 1060 assert(packet); 1075 1061 1076 *(e1000 ->rx_ring_packets + offset) = packet;1077 e1000_rx_descriptor_t * rx_descriptor = (e1000_rx_descriptor_t *)1078 (e1000 ->rx_ring_virt + offset * sizeof(e1000_rx_descriptor_t));1079 1080 void *phys;1081 int rc =1082 nic_dma_lock_packet(packet, E1000_MAX_RECEIVE_PACKET_SIZE, &phys);1083 1084 if (rc == EOK)1085 rx_descriptor->phys_addr = PTR_TO_U64(phys+ packet->data_start);1086 else1062 *(e1000_data->rx_ring_packets + offset) = packet; 1063 e1000_rx_descriptor_t * rx_descriptor = (e1000_rx_descriptor_t *) 1064 (e1000_data->rx_ring.virt + 1065 offset * sizeof(e1000_rx_descriptor_t)); 1066 1067 void *phys_addr = nic_dma_lock_packet(packet); 1068 1069 if (phys_addr) { 1070 rx_descriptor->phys_addr = 1071 PTR_TO_U64(phys_addr + packet->data_start); 1072 } else 1087 1073 rx_descriptor->phys_addr = 0; 1088 1074 … … 1096 1082 /** Clear receive descriptor 1097 1083 * 1098 * @param e1000 1099 * @param offset Receive descriptor offset1100 * 1101 */ 1102 static void e1000_clear_rx_descriptor(e1000_t *e1000 , unsigned int offset)1084 * @param e1000_data E1000 data 1085 * @param offset Receive descriptor offset 1086 * 1087 */ 1088 static void e1000_clear_rx_descriptor(e1000_t *e1000_data, unsigned int offset) 1103 1089 { 1104 1090 e1000_rx_descriptor_t *rx_descriptor = (e1000_rx_descriptor_t *) 1105 (e1000->rx_ring_virt + offset * sizeof(e1000_rx_descriptor_t)); 1091 (e1000_data->rx_ring.virt + 1092 offset * sizeof(e1000_rx_descriptor_t)); 1106 1093 1107 1094 rx_descriptor->length = 0; … … 1114 1101 /** Clear receive descriptor 1115 1102 * 1116 * @param nic NIC data 1117 * @param offset Receive descriptor offset 1118 * 1119 */ 1120 static void e1000_clear_tx_descriptor(nic_t *nic, unsigned int offset) 1121 { 1122 e1000_t *e1000 = DRIVER_DATA_NIC(nic); 1123 1124 e1000_tx_descriptor_t *tx_descriptor = (e1000_tx_descriptor_t *) 1125 (e1000->tx_ring_virt + offset * sizeof(e1000_tx_descriptor_t)); 1103 * @param nic_data NIC data 1104 * @param offset Receive descriptor offset 1105 * 1106 */ 1107 static void e1000_clear_tx_descriptor(nic_t *nic_data, unsigned int offset) 1108 { 1109 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1110 1111 e1000_tx_descriptor_t * tx_descriptor = (e1000_tx_descriptor_t *) 1112 (e1000_data->tx_ring.virt + 1113 offset * sizeof(e1000_tx_descriptor_t)); 1126 1114 1127 1115 if (tx_descriptor->length) { 1128 packet_t * old_packet = *(e1000->tx_ring_packets + offset);1116 packet_t * old_packet = *(e1000_data->tx_ring_packets + offset); 1129 1117 if (old_packet) 1130 nic_release_packet(nic , old_packet);1118 nic_release_packet(nic_data, old_packet); 1131 1119 } 1132 1120 … … 1158 1146 /** Receive packets 1159 1147 * 1160 * @param nic NIC data1161 * 1162 */ 1163 static void e1000_receive_packets(nic_t *nic )1164 { 1165 e1000_t *e1000 = DRIVER_DATA_NIC(nic);1166 1167 fibril_mutex_lock(&e1000 ->rx_lock);1168 1169 uint32_t *tail_addr = E1000_REG_ADDR(e1000 , E1000_RDT);1148 * @param nic_data NIC data 1149 * 1150 */ 1151 static void e1000_receive_packets(nic_t *nic_data) 1152 { 1153 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1154 1155 fibril_mutex_lock(&e1000_data->rx_lock); 1156 1157 uint32_t *tail_addr = E1000_REG_ADDR(e1000_data, E1000_RDT); 1170 1158 uint32_t next_tail = e1000_inc_tail(*tail_addr, E1000_RX_PACKETS_COUNT); 1171 1159 1172 1160 e1000_rx_descriptor_t *rx_descriptor = (e1000_rx_descriptor_t *) 1173 (e1000->rx_ring_virt + next_tail * sizeof(e1000_rx_descriptor_t)); 1161 (e1000_data->rx_ring.virt + 1162 next_tail * sizeof(e1000_rx_descriptor_t)); 1174 1163 1175 1164 while (rx_descriptor->status & 0x01) { 1176 1165 uint32_t packet_size = rx_descriptor->length - E1000_CRC_SIZE; 1177 1166 1178 packet_t *packet = *(e1000 ->rx_ring_packets + next_tail);1167 packet_t *packet = *(e1000_data->rx_ring_packets + next_tail); 1179 1168 packet_suffix(packet, packet_size); 1180 1169 1181 nic_dma_unlock_packet(packet , E1000_MAX_RECEIVE_PACKET_SIZE);1182 nic_received_packet(nic , packet);1170 nic_dma_unlock_packet(packet); 1171 nic_received_packet(nic_data, packet); 1183 1172 1184 e1000_fill_new_rx_descriptor(nic , next_tail);1173 e1000_fill_new_rx_descriptor(nic_data, next_tail); 1185 1174 1186 1175 *tail_addr = e1000_inc_tail(*tail_addr, E1000_RX_PACKETS_COUNT); … … 1188 1177 1189 1178 rx_descriptor = (e1000_rx_descriptor_t *) 1190 (e1000->rx_ring_virt + next_tail * sizeof(e1000_rx_descriptor_t)); 1179 (e1000_data->rx_ring.virt + 1180 next_tail * sizeof(e1000_rx_descriptor_t)); 1191 1181 } 1192 1182 1193 fibril_mutex_unlock(&e1000 ->rx_lock);1183 fibril_mutex_unlock(&e1000_data->rx_lock); 1194 1184 } 1195 1185 1196 1186 /** Enable E1000 interupts 1197 1187 * 1198 * @param e1000 E1000 data structure1199 * 1200 */ 1201 static void e1000_enable_interrupts(e1000_t *e1000 )1202 { 1203 E1000_REG_WRITE(e1000 , E1000_IMS, ICR_RXT0);1188 * @param e1000_data E1000 data structure 1189 * 1190 */ 1191 static void e1000_enable_interrupts(e1000_t *e1000_data) 1192 { 1193 E1000_REG_WRITE(e1000_data, E1000_IMS, ICR_RXT0); 1204 1194 } 1205 1195 1206 1196 /** Disable E1000 interupts 1207 1197 * 1208 * @param e1000 E1000 data structure1209 * 1210 */ 1211 static void e1000_disable_interrupts(e1000_t *e1000 )1212 { 1213 E1000_REG_WRITE(e1000 , E1000_IMS, 0);1198 * @param e1000_data E1000 data structure 1199 * 1200 */ 1201 static void e1000_disable_interrupts(e1000_t *e1000_data) 1202 { 1203 E1000_REG_WRITE(e1000_data, E1000_IMS, 0); 1214 1204 } 1215 1205 … … 1219 1209 * and e1000_poll() 1220 1210 * 1221 * @param nic NIC data1222 * @param icr ICR register value1223 * 1224 */ 1225 static void e1000_interrupt_handler_impl(nic_t *nic , uint32_t icr)1211 * @param nic_data NIC data 1212 * @param icr ICR register value 1213 * 1214 */ 1215 static void e1000_interrupt_handler_impl(nic_t *nic_data, uint32_t icr) 1226 1216 { 1227 1217 if (icr & ICR_RXT0) 1228 e1000_receive_packets(nic );1218 e1000_receive_packets(nic_data); 1229 1219 } 1230 1220 … … 1240 1230 { 1241 1231 uint32_t icr = (uint32_t) IPC_GET_ARG2(*icall); 1242 nic_t *nic = NIC_DATA_DEV(dev);1243 e1000_t *e1000 = DRIVER_DATA_NIC(nic);1244 1245 e1000_interrupt_handler_impl(nic , icr);1246 e1000_enable_interrupts(e1000 );1232 nic_t *nic_data = NIC_DATA_DEV(dev); 1233 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1234 1235 e1000_interrupt_handler_impl(nic_data, icr); 1236 e1000_enable_interrupts(e1000_data); 1247 1237 } 1248 1238 … … 1252 1242 * structure. 1253 1243 * 1254 * @param nic Driver data1244 * @param nic_data Driver data 1255 1245 * 1256 1246 * @return EOK if the handler was registered … … 1258 1248 * 1259 1249 */ 1260 inline static int e1000_register_int_handler(nic_t *nic )1261 { 1262 e1000_t *e1000 = DRIVER_DATA_NIC(nic);1250 inline static int e1000_register_int_handler(nic_t *nic_data) 1251 { 1252 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1263 1253 1264 1254 /* Lock the mutex in whole driver while working with global structure */ 1265 1255 fibril_mutex_lock(&irq_reg_mutex); 1266 1256 1267 e1000_irq_code.cmds[0].addr = e1000->reg_base_virt + E1000_ICR; 1268 e1000_irq_code.cmds[2].addr = e1000->reg_base_virt + E1000_IMC; 1269 1270 int rc = register_interrupt_handler(nic_get_ddf_dev(nic), 1271 e1000->irq, e1000_interrupt_handler, &e1000_irq_code); 1257 // FIXME: This is not supported in mainline 1258 e1000_irq_code.cmds[0].addr = 1259 0xffff800000000000 + e1000_data->phys_reg_base + E1000_ICR; 1260 e1000_irq_code.cmds[2].addr = 1261 0xffff800000000000 + e1000_data->phys_reg_base + E1000_IMC; 1262 1263 int rc = register_interrupt_handler(nic_get_ddf_dev(nic_data), 1264 e1000_data->irq, e1000_interrupt_handler, &e1000_irq_code); 1272 1265 1273 1266 fibril_mutex_unlock(&irq_reg_mutex); … … 1277 1270 /** Force receiving all packets in the receive buffer 1278 1271 * 1279 * @param nic NIC data1280 * 1281 */ 1282 static void e1000_poll(nic_t *nic )1283 { 1284 assert(nic );1285 1286 e1000_t *e1000 = nic_get_specific(nic);1287 assert(e1000 );1288 1289 uint32_t icr = E1000_REG_READ(e1000 , E1000_ICR);1290 e1000_interrupt_handler_impl(nic , icr);1272 * @param nic_data NIC data 1273 * 1274 */ 1275 static void e1000_poll(nic_t *nic_data) 1276 { 1277 assert(nic_data); 1278 1279 e1000_t *e1000_data = nic_get_specific(nic_data); 1280 assert(e1000_data); 1281 1282 uint32_t icr = E1000_REG_READ(e1000_data, E1000_ICR); 1283 e1000_interrupt_handler_impl(nic_data, icr); 1291 1284 } 1292 1285 … … 1312 1305 * 1313 1306 */ 1314 static int e1000_poll_mode_change(nic_t *nic , nic_poll_mode_t mode,1307 static int e1000_poll_mode_change(nic_t *nic_data, nic_poll_mode_t mode, 1315 1308 const struct timeval *period) 1316 1309 { 1317 assert(nic );1318 1319 e1000_t *e1000 = nic_get_specific(nic);1320 assert(e1000 );1310 assert(nic_data); 1311 1312 e1000_t *e1000_data = nic_get_specific(nic_data); 1313 assert(e1000_data); 1321 1314 1322 1315 switch (mode) { 1323 1316 case NIC_POLL_IMMEDIATE: 1324 E1000_REG_WRITE(e1000 , E1000_ITR, 0);1325 e1000_enable_interrupts(e1000 );1317 E1000_REG_WRITE(e1000_data, E1000_ITR, 0); 1318 e1000_enable_interrupts(e1000_data); 1326 1319 break; 1327 1320 case NIC_POLL_ON_DEMAND: 1328 e1000_disable_interrupts(e1000 );1321 e1000_disable_interrupts(e1000_data); 1329 1322 break; 1330 1323 case NIC_POLL_PERIODIC: 1331 1324 assert(period); 1332 1325 uint16_t itr_interval = e1000_calculate_itr_interval(period); 1333 E1000_REG_WRITE(e1000 , E1000_ITR, (uint32_t) itr_interval);1334 e1000_enable_interrupts(e1000 );1326 E1000_REG_WRITE(e1000_data, E1000_ITR, (uint32_t) itr_interval); 1327 e1000_enable_interrupts(e1000_data); 1335 1328 break; 1336 1329 default: … … 1343 1336 /** Initialize receive registers 1344 1337 * 1345 * @param e1000 E1000 data structure1346 * 1347 */ 1348 static void e1000_initialize_rx_registers(e1000_t * e1000)1349 { 1350 E1000_REG_WRITE(e1000 , E1000_RDLEN, E1000_RX_PACKETS_COUNT * 16);1351 E1000_REG_WRITE(e1000 , E1000_RDH, 0);1338 * @param e1000_data E1000 data structure 1339 * 1340 */ 1341 static void e1000_initialize_rx_registers(e1000_t * e1000_data) 1342 { 1343 E1000_REG_WRITE(e1000_data, E1000_RDLEN, E1000_RX_PACKETS_COUNT * 16); 1344 E1000_REG_WRITE(e1000_data, E1000_RDH, 0); 1352 1345 1353 1346 /* It is not posible to let HW use all descriptors */ 1354 E1000_REG_WRITE(e1000 , E1000_RDT, E1000_RX_PACKETS_COUNT - 1);1347 E1000_REG_WRITE(e1000_data, E1000_RDT, E1000_RX_PACKETS_COUNT - 1); 1355 1348 1356 1349 /* Set Broadcast Enable Bit */ 1357 E1000_REG_WRITE(e1000 , E1000_RCTL, RCTL_BAM);1350 E1000_REG_WRITE(e1000_data, E1000_RCTL, RCTL_BAM); 1358 1351 } 1359 1352 1360 1353 /** Initialize receive structure 1361 1354 * 1362 * @param nic NIC data1355 * @param nic_data NIC data 1363 1356 * 1364 1357 * @return EOK if succeed … … 1366 1359 * 1367 1360 */ 1368 static int e1000_initialize_rx_structure(nic_t *nic) 1369 { 1370 e1000_t *e1000 = DRIVER_DATA_NIC(nic); 1371 fibril_mutex_lock(&e1000->rx_lock); 1372 1373 int rc = dmamem_map_anonymous( 1374 E1000_RX_PACKETS_COUNT * sizeof(e1000_rx_descriptor_t), 1375 AS_AREA_READ | AS_AREA_WRITE, 0, &e1000->rx_ring_phys, 1376 &e1000->rx_ring_virt); 1361 static int e1000_initialize_rx_structure(nic_t *nic_data) 1362 { 1363 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1364 fibril_mutex_lock(&e1000_data->rx_lock); 1365 1366 int rc = dmamem_map(&e1000_data->rx_ring, 1367 SIZE2PAGES(E1000_RX_PACKETS_COUNT * sizeof(e1000_rx_descriptor_t)), 1368 AS_AREA_READ | AS_AREA_WRITE, 0); 1377 1369 if (rc != EOK) 1378 1370 return rc; 1379 1371 1380 E1000_REG_WRITE(e1000 , E1000_RDBAH,1381 (uint32_t) (PTR_TO_U64(e1000 ->rx_ring_phys) >> 32));1382 E1000_REG_WRITE(e1000 , E1000_RDBAL,1383 (uint32_t) PTR_TO_U64(e1000 ->rx_ring_phys));1384 1385 e1000 ->rx_ring_packets =1372 E1000_REG_WRITE(e1000_data, E1000_RDBAH, 1373 (uint32_t) (PTR_TO_U64(e1000_data->rx_ring.phys) >> 32)); 1374 E1000_REG_WRITE(e1000_data, E1000_RDBAL, 1375 (uint32_t) PTR_TO_U64(e1000_data->rx_ring.phys)); 1376 1377 e1000_data->rx_ring_packets = 1386 1378 malloc(E1000_RX_PACKETS_COUNT * sizeof(packet_t *)); 1387 1379 // FIXME: Check return value … … 1391 1383 offset < E1000_RX_PACKETS_COUNT; 1392 1384 offset++) 1393 e1000_fill_new_rx_descriptor(nic , offset);1394 1395 e1000_initialize_rx_registers(e1000 );1396 1397 fibril_mutex_unlock(&e1000 ->rx_lock);1385 e1000_fill_new_rx_descriptor(nic_data, offset); 1386 1387 e1000_initialize_rx_registers(e1000_data); 1388 1389 fibril_mutex_unlock(&e1000_data->rx_lock); 1398 1390 return EOK; 1399 1391 } … … 1401 1393 /** Uninitialize receive structure 1402 1394 * 1403 * @param nic NIC data1404 * 1405 */ 1406 static void e1000_uninitialize_rx_structure(nic_t *nic )1407 { 1408 e1000_t *e1000 = DRIVER_DATA_NIC(nic);1395 * @param nic_data NIC data 1396 * 1397 */ 1398 static void e1000_uninitialize_rx_structure(nic_t *nic_data) 1399 { 1400 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1409 1401 1410 1402 /* Write descriptor */ … … 1412 1404 offset < E1000_RX_PACKETS_COUNT; 1413 1405 offset++) { 1414 packet_t *packet = *(e1000 ->rx_ring_packets + offset);1415 nic_dma_unlock_packet(packet , E1000_MAX_RECEIVE_PACKET_SIZE);1416 nic_release_packet(nic , packet);1406 packet_t *packet = *(e1000_data->rx_ring_packets + offset); 1407 nic_dma_unlock_packet(packet); 1408 nic_release_packet(nic_data, packet); 1417 1409 } 1418 1410 1419 free(e1000 ->rx_ring_packets);1420 dmamem_unmap _anonymous(e1000->rx_ring_virt);1411 free(e1000_data->rx_ring_packets); 1412 dmamem_unmap(&e1000_data->rx_ring); 1421 1413 } 1422 1414 1423 1415 /** Clear receive descriptor ring 1424 1416 * 1425 * @param e1000 E1000 data1426 * 1427 */ 1428 static void e1000_clear_rx_ring(e1000_t * e1000)1417 * @param e1000_data E1000 data 1418 * 1419 */ 1420 static void e1000_clear_rx_ring(e1000_t * e1000_data) 1429 1421 { 1430 1422 /* Write descriptor */ … … 1432 1424 offset < E1000_RX_PACKETS_COUNT; 1433 1425 offset++) 1434 e1000_clear_rx_descriptor(e1000 , offset);1426 e1000_clear_rx_descriptor(e1000_data, offset); 1435 1427 } 1436 1428 1437 1429 /** Initialize filters 1438 1430 * 1439 * @param e1000 E1000 data1440 * 1441 */ 1442 static void e1000_initialize_filters(e1000_t *e1000 )1431 * @param e1000_data E1000 data 1432 * 1433 */ 1434 static void e1000_initialize_filters(e1000_t *e1000_data) 1443 1435 { 1444 1436 /* Initialize address filter */ 1445 e1000 ->unicast_ra_count = 0;1446 e1000 ->multicast_ra_count = 0;1447 e1000_clear_unicast_receive_addresses(e1000 );1437 e1000_data->unicast_ra_count = 0; 1438 e1000_data->multicast_ra_count = 0; 1439 e1000_clear_unicast_receive_addresses(e1000_data); 1448 1440 } 1449 1441 1450 1442 /** Initialize VLAN 1451 1443 * 1452 * @param e1000 E1000 data1453 * 1454 */ 1455 static void e1000_initialize_vlan(e1000_t *e1000 )1456 { 1457 e1000 ->vlan_tag_add = false;1444 * @param e1000_data E1000 data 1445 * 1446 */ 1447 static void e1000_initialize_vlan(e1000_t *e1000_data) 1448 { 1449 e1000_data->vlan_tag_add = false; 1458 1450 } 1459 1451 1460 1452 /** Fill MAC address from EEPROM to RA[0] register 1461 1453 * 1462 * @param e1000 E1000 data1463 * 1464 */ 1465 static void e1000_fill_mac_from_eeprom(e1000_t *e1000 )1454 * @param e1000_data E1000 data 1455 * 1456 */ 1457 static void e1000_fill_mac_from_eeprom(e1000_t *e1000_data) 1466 1458 { 1467 1459 /* MAC address from eeprom to RA[0] */ 1468 1460 nic_address_t address; 1469 e1000_eeprom_get_address(e1000 , &address);1470 e1000_write_receive_address(e1000 , 0, &address, true);1461 e1000_eeprom_get_address(e1000_data, &address); 1462 e1000_write_receive_address(e1000_data, 0, &address, true); 1471 1463 } 1472 1464 … … 1479 1471 * 1480 1472 */ 1481 static void e1000_initialize_registers(e1000_t *e1000 )1482 { 1483 E1000_REG_WRITE(e1000 , E1000_ITR,1473 static void e1000_initialize_registers(e1000_t *e1000_data) 1474 { 1475 E1000_REG_WRITE(e1000_data, E1000_ITR, 1484 1476 e1000_calculate_itr_interval_from_usecs( 1485 1477 E1000_DEFAULT_INTERRUPT_INTERVAL_USEC)); 1486 E1000_REG_WRITE(e1000 , E1000_FCAH, 0);1487 E1000_REG_WRITE(e1000 , E1000_FCAL, 0);1488 E1000_REG_WRITE(e1000 , E1000_FCT, 0);1489 E1000_REG_WRITE(e1000 , E1000_FCTTV, 0);1490 E1000_REG_WRITE(e1000 , E1000_VET, VET_VALUE);1491 E1000_REG_WRITE(e1000 , E1000_CTRL, CTRL_ASDE);1478 E1000_REG_WRITE(e1000_data, E1000_FCAH, 0); 1479 E1000_REG_WRITE(e1000_data, E1000_FCAL, 0); 1480 E1000_REG_WRITE(e1000_data, E1000_FCT, 0); 1481 E1000_REG_WRITE(e1000_data, E1000_FCTTV, 0); 1482 E1000_REG_WRITE(e1000_data, E1000_VET, VET_VALUE); 1483 E1000_REG_WRITE(e1000_data, E1000_CTRL, CTRL_ASDE); 1492 1484 } 1493 1485 1494 1486 /** Initialize transmit registers 1495 1487 * 1496 * @param e1000 E1000 data.1497 * 1498 */ 1499 static void e1000_initialize_tx_registers(e1000_t *e1000 )1500 { 1501 E1000_REG_WRITE(e1000 , E1000_TDLEN, E1000_TX_PACKETS_COUNT * 16);1502 E1000_REG_WRITE(e1000 , E1000_TDH, 0);1503 E1000_REG_WRITE(e1000 , E1000_TDT, 0);1504 1505 E1000_REG_WRITE(e1000 , E1000_TIPG,1488 * @param e1000_data E1000 data. 1489 * 1490 */ 1491 static void e1000_initialize_tx_registers(e1000_t *e1000_data) 1492 { 1493 E1000_REG_WRITE(e1000_data, E1000_TDLEN, E1000_TX_PACKETS_COUNT * 16); 1494 E1000_REG_WRITE(e1000_data, E1000_TDH, 0); 1495 E1000_REG_WRITE(e1000_data, E1000_TDT, 0); 1496 1497 E1000_REG_WRITE(e1000_data, E1000_TIPG, 1506 1498 10 << TIPG_IPGT_SHIFT | 1507 1499 8 << TIPG_IPGR1_SHIFT | 1508 1500 6 << TIPG_IPGR2_SHIFT); 1509 1501 1510 E1000_REG_WRITE(e1000 , E1000_TCTL,1502 E1000_REG_WRITE(e1000_data, E1000_TCTL, 1511 1503 0x0F << TCTL_CT_SHIFT /* Collision Threshold */ | 1512 1504 0x40 << TCTL_COLD_SHIFT /* Collision Distance */ | … … 1516 1508 /** Initialize transmit structure 1517 1509 * 1518 * @param e1000 E1000 data. 1519 * 1520 */ 1521 static int e1000_initialize_tx_structure(e1000_t *e1000) 1522 { 1523 fibril_mutex_lock(&e1000->tx_lock); 1524 1525 int rc = dmamem_map_anonymous( 1526 E1000_TX_PACKETS_COUNT * sizeof(e1000_tx_descriptor_t), 1527 AS_AREA_READ | AS_AREA_WRITE, 0, &e1000->tx_ring_phys, 1528 &e1000->tx_ring_virt); 1510 * @param e1000_data E1000 data. 1511 * 1512 */ 1513 static int e1000_initialize_tx_structure(e1000_t *e1000_data) 1514 { 1515 fibril_mutex_lock(&e1000_data->tx_lock); 1516 1517 int rc = dmamem_map(&e1000_data->tx_ring, 1518 SIZE2PAGES(E1000_TX_PACKETS_COUNT * sizeof(e1000_tx_descriptor_t)), 1519 AS_AREA_READ | AS_AREA_WRITE, 0); 1529 1520 if (rc != EOK) 1530 1521 return rc; 1531 1522 1532 bzero(e1000 ->tx_ring_virt,1523 bzero(e1000_data->tx_ring.virt, 1533 1524 E1000_TX_PACKETS_COUNT * sizeof(e1000_tx_descriptor_t)); 1534 1525 1535 E1000_REG_WRITE(e1000 , E1000_TDBAH,1536 (uint32_t) (PTR_TO_U64(e1000 ->tx_ring_phys) >> 32));1537 E1000_REG_WRITE(e1000 , E1000_TDBAL,1538 (uint32_t) PTR_TO_U64(e1000 ->tx_ring_phys));1539 1540 e1000 ->tx_ring_packets =1526 E1000_REG_WRITE(e1000_data, E1000_TDBAH, 1527 (uint32_t) (PTR_TO_U64(e1000_data->tx_ring.phys) >> 32)); 1528 E1000_REG_WRITE(e1000_data, E1000_TDBAL, 1529 (uint32_t) PTR_TO_U64(e1000_data->tx_ring.phys)); 1530 1531 e1000_data->tx_ring_packets = 1541 1532 malloc(E1000_TX_PACKETS_COUNT * sizeof(packet_t *)); 1542 1533 // FIXME: Check return value 1543 1534 1544 e1000_initialize_tx_registers(e1000 );1545 1546 fibril_mutex_unlock(&e1000 ->tx_lock);1535 e1000_initialize_tx_registers(e1000_data); 1536 1537 fibril_mutex_unlock(&e1000_data->tx_lock); 1547 1538 return EOK; 1548 1539 } … … 1550 1541 /** Uninitialize transmit structure 1551 1542 * 1552 * @param nic NIC data1553 * 1554 */ 1555 static void e1000_uninitialize_tx_structure(e1000_t *e1000 )1556 { 1557 free(e1000 ->tx_ring_packets);1558 dmamem_unmap _anonymous(e1000->tx_ring_virt);1543 * @param nic_data NIC data 1544 * 1545 */ 1546 static void e1000_uninitialize_tx_structure(e1000_t *e1000_data) 1547 { 1548 free(e1000_data->tx_ring_packets); 1549 dmamem_unmap(&e1000_data->tx_ring); 1559 1550 } 1560 1551 1561 1552 /** Clear transmit descriptor ring 1562 1553 * 1563 * @param nic NIC data1564 * 1565 */ 1566 static void e1000_clear_tx_ring(nic_t *nic )1554 * @param nic_data NIC data 1555 * 1556 */ 1557 static void e1000_clear_tx_ring(nic_t *nic_data) 1567 1558 { 1568 1559 /* Write descriptor */ … … 1570 1561 offset < E1000_TX_PACKETS_COUNT; 1571 1562 offset++) 1572 e1000_clear_tx_descriptor(nic , offset);1563 e1000_clear_tx_descriptor(nic_data, offset); 1573 1564 } 1574 1565 1575 1566 /** Enable transmit 1576 1567 * 1577 * @param e1000 E1000 data1578 * 1579 */ 1580 static void e1000_enable_tx(e1000_t *e1000 )1568 * @param e1000_data E1000 data 1569 * 1570 */ 1571 static void e1000_enable_tx(e1000_t *e1000_data) 1581 1572 { 1582 1573 /* Set Transmit Enable Bit */ 1583 E1000_REG_WRITE(e1000 , E1000_TCTL,1584 E1000_REG_READ(e1000 , E1000_TCTL) | (TCTL_EN));1574 E1000_REG_WRITE(e1000_data, E1000_TCTL, 1575 E1000_REG_READ(e1000_data, E1000_TCTL) | (TCTL_EN)); 1585 1576 } 1586 1577 1587 1578 /** Disable transmit 1588 1579 * 1589 * @param e1000 E1000 data1590 * 1591 */ 1592 static void e1000_disable_tx(e1000_t *e1000 )1580 * @param e1000_data E1000 data 1581 * 1582 */ 1583 static void e1000_disable_tx(e1000_t *e1000_data) 1593 1584 { 1594 1585 /* Clear Transmit Enable Bit */ 1595 E1000_REG_WRITE(e1000 , E1000_TCTL,1596 E1000_REG_READ(e1000 , E1000_TCTL) & ~(TCTL_EN));1586 E1000_REG_WRITE(e1000_data, E1000_TCTL, 1587 E1000_REG_READ(e1000_data, E1000_TCTL) & ~(TCTL_EN)); 1597 1588 } 1598 1589 1599 1590 /** Reset E1000 device 1600 1591 * 1601 * @param e1000 The E1000 data1602 * 1603 */ 1604 static int e1000_reset(nic_t *nic )1605 { 1606 e1000_t *e1000 = DRIVER_DATA_NIC(nic);1607 1608 E1000_REG_WRITE(e1000 , E1000_CTRL, CTRL_RST);1592 * @param e1000_data The E1000 data 1593 * 1594 */ 1595 static int e1000_reset(nic_t *nic_data) 1596 { 1597 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1598 1599 E1000_REG_WRITE(e1000_data, E1000_CTRL, CTRL_RST); 1609 1600 1610 1601 /* Wait for the reset */ … … 1612 1603 1613 1604 /* check if RST_BIT cleared */ 1614 if (E1000_REG_READ(e1000 , E1000_CTRL) & (CTRL_RST))1605 if (E1000_REG_READ(e1000_data, E1000_CTRL) & (CTRL_RST)) 1615 1606 return EINVAL; 1616 1607 1617 e1000_initialize_registers(e1000 );1618 e1000_initialize_rx_registers(e1000 );1619 e1000_initialize_tx_registers(e1000 );1620 e1000_fill_mac_from_eeprom(e1000 );1621 e1000_initialize_filters(e1000 );1622 e1000_initialize_vlan(e1000 );1608 e1000_initialize_registers(e1000_data); 1609 e1000_initialize_rx_registers(e1000_data); 1610 e1000_initialize_tx_registers(e1000_data); 1611 e1000_fill_mac_from_eeprom(e1000_data); 1612 e1000_initialize_filters(e1000_data); 1613 e1000_initialize_vlan(e1000_data); 1623 1614 1624 1615 return EOK; … … 1627 1618 /** Activate the device to receive and transmit packets 1628 1619 * 1629 * @param nic NIC driver data1620 * @param nic_data NIC driver data 1630 1621 * 1631 1622 * @return EOK if activated successfully … … 1633 1624 * 1634 1625 */ 1635 static int e1000_on_activating(nic_t *nic )1636 { 1637 assert(nic );1638 1639 e1000_t *e1000 = DRIVER_DATA_NIC(nic);1640 1641 fibril_mutex_lock(&e1000 ->rx_lock);1642 fibril_mutex_lock(&e1000 ->tx_lock);1643 fibril_mutex_lock(&e1000 ->ctrl_lock);1644 1645 e1000_enable_interrupts(e1000 );1646 1647 nic_enable_interrupt(nic , e1000->irq);1648 1649 e1000_clear_rx_ring(e1000 );1650 e1000_enable_rx(e1000 );1651 1652 e1000_clear_tx_ring(nic );1653 e1000_enable_tx(e1000 );1654 1655 uint32_t ctrl = E1000_REG_READ(e1000 , E1000_CTRL);1626 static int e1000_on_activating(nic_t *nic_data) 1627 { 1628 assert(nic_data); 1629 1630 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1631 1632 fibril_mutex_lock(&e1000_data->rx_lock); 1633 fibril_mutex_lock(&e1000_data->tx_lock); 1634 fibril_mutex_lock(&e1000_data->ctrl_lock); 1635 1636 e1000_enable_interrupts(e1000_data); 1637 1638 nic_enable_interrupt(nic_data, e1000_data->irq); 1639 1640 e1000_clear_rx_ring(e1000_data); 1641 e1000_enable_rx(e1000_data); 1642 1643 e1000_clear_tx_ring(nic_data); 1644 e1000_enable_tx(e1000_data); 1645 1646 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL); 1656 1647 ctrl |= CTRL_SLU; 1657 E1000_REG_WRITE(e1000 , E1000_CTRL, ctrl);1658 1659 fibril_mutex_unlock(&e1000 ->ctrl_lock);1660 fibril_mutex_unlock(&e1000 ->tx_lock);1661 fibril_mutex_unlock(&e1000 ->rx_lock);1648 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl); 1649 1650 fibril_mutex_unlock(&e1000_data->ctrl_lock); 1651 fibril_mutex_unlock(&e1000_data->tx_lock); 1652 fibril_mutex_unlock(&e1000_data->rx_lock); 1662 1653 1663 1654 return EOK; … … 1666 1657 /** Callback for NIC_STATE_DOWN change 1667 1658 * 1668 * @param nic NIC driver data1659 * @param nic_data NIC driver data 1669 1660 * 1670 1661 * @return EOK if succeed … … 1672 1663 * 1673 1664 */ 1674 static int e1000_on_down_unlocked(nic_t *nic )1675 { 1676 e1000_t *e1000 = DRIVER_DATA_NIC(nic);1677 1678 uint32_t ctrl = E1000_REG_READ(e1000 , E1000_CTRL);1665 static int e1000_on_down_unlocked(nic_t *nic_data) 1666 { 1667 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1668 1669 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL); 1679 1670 ctrl &= ~CTRL_SLU; 1680 E1000_REG_WRITE(e1000 , E1000_CTRL, ctrl);1681 1682 e1000_disable_tx(e1000 );1683 e1000_disable_rx(e1000 );1684 1685 nic_disable_interrupt(nic , e1000->irq);1686 e1000_disable_interrupts(e1000 );1671 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl); 1672 1673 e1000_disable_tx(e1000_data); 1674 e1000_disable_rx(e1000_data); 1675 1676 nic_disable_interrupt(nic_data, e1000_data->irq); 1677 e1000_disable_interrupts(e1000_data); 1687 1678 1688 1679 /* … … 1697 1688 /** Callback for NIC_STATE_DOWN change 1698 1689 * 1699 * @param nic NIC driver data1690 * @param nic_data NIC driver data 1700 1691 * 1701 1692 * @return EOK if succeed … … 1703 1694 * 1704 1695 */ 1705 static int e1000_on_down(nic_t *nic )1706 { 1707 e1000_t *e1000 = DRIVER_DATA_NIC(nic);1708 1709 fibril_mutex_lock(&e1000 ->rx_lock);1710 fibril_mutex_lock(&e1000 ->tx_lock);1711 fibril_mutex_lock(&e1000 ->ctrl_lock);1712 1713 int rc = e1000_on_down_unlocked(nic );1714 1715 fibril_mutex_unlock(&e1000 ->ctrl_lock);1716 fibril_mutex_unlock(&e1000 ->tx_lock);1717 fibril_mutex_unlock(&e1000 ->rx_lock);1696 static int e1000_on_down(nic_t *nic_data) 1697 { 1698 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1699 1700 fibril_mutex_lock(&e1000_data->rx_lock); 1701 fibril_mutex_lock(&e1000_data->tx_lock); 1702 fibril_mutex_lock(&e1000_data->ctrl_lock); 1703 1704 int rc = e1000_on_down_unlocked(nic_data); 1705 1706 fibril_mutex_unlock(&e1000_data->ctrl_lock); 1707 fibril_mutex_unlock(&e1000_data->tx_lock); 1708 fibril_mutex_unlock(&e1000_data->rx_lock); 1718 1709 1719 1710 return rc; … … 1722 1713 /** Callback for NIC_STATE_STOPPED change 1723 1714 * 1724 * @param nic NIC driver data1715 * @param nic_data NIC driver data 1725 1716 * 1726 1717 * @return EOK if succeed … … 1728 1719 * 1729 1720 */ 1730 static int e1000_on_stopping(nic_t *nic )1731 { 1732 e1000_t *e1000 = DRIVER_DATA_NIC(nic);1733 1734 fibril_mutex_lock(&e1000 ->rx_lock);1735 fibril_mutex_lock(&e1000 ->tx_lock);1736 fibril_mutex_lock(&e1000 ->ctrl_lock);1737 1738 int rc = e1000_on_down_unlocked(nic );1721 static int e1000_on_stopping(nic_t *nic_data) 1722 { 1723 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1724 1725 fibril_mutex_lock(&e1000_data->rx_lock); 1726 fibril_mutex_lock(&e1000_data->tx_lock); 1727 fibril_mutex_lock(&e1000_data->ctrl_lock); 1728 1729 int rc = e1000_on_down_unlocked(nic_data); 1739 1730 if (rc == EOK) 1740 rc = e1000_reset(nic );1741 1742 fibril_mutex_unlock(&e1000 ->ctrl_lock);1743 fibril_mutex_unlock(&e1000 ->tx_lock);1744 fibril_mutex_unlock(&e1000 ->rx_lock);1731 rc = e1000_reset(nic_data); 1732 1733 fibril_mutex_unlock(&e1000_data->ctrl_lock); 1734 fibril_mutex_unlock(&e1000_data->tx_lock); 1735 fibril_mutex_unlock(&e1000_data->rx_lock); 1745 1736 1746 1737 return rc; … … 1757 1748 assert(!dev->driver_data); 1758 1749 1759 nic_t *nic = nic_create_and_bind(dev);1760 if (!nic )1750 nic_t *nic_data = nic_create_and_bind(dev); 1751 if (!nic_data) 1761 1752 return NULL; 1762 1753 1763 e1000_t *e1000 = malloc(sizeof(e1000_t));1764 if (!e1000 ) {1754 e1000_t *e1000_data = malloc(sizeof(e1000_t)); 1755 if (!e1000_data) { 1765 1756 nic_unbind_and_destroy(dev); 1766 1757 return NULL; 1767 1758 } 1768 1759 1769 bzero(e1000 , sizeof(e1000_t));1770 1771 nic_set_specific(nic , e1000);1772 nic_set_write_packet_handler(nic , e1000_write_packet);1773 nic_set_state_change_handlers(nic , e1000_on_activating,1760 bzero(e1000_data, sizeof(e1000_t)); 1761 1762 nic_set_specific(nic_data, e1000_data); 1763 nic_set_write_packet_handler(nic_data, e1000_write_packet); 1764 nic_set_state_change_handlers(nic_data, e1000_on_activating, 1774 1765 e1000_on_down, e1000_on_stopping); 1775 nic_set_filtering_change_handlers(nic ,1766 nic_set_filtering_change_handlers(nic_data, 1776 1767 e1000_on_unicast_mode_change, e1000_on_multicast_mode_change, 1777 1768 e1000_on_broadcast_mode_change, NULL, e1000_on_vlan_mask_change); 1778 nic_set_poll_handlers(nic , e1000_poll_mode_change, e1000_poll);1779 1780 fibril_mutex_initialize(&e1000 ->ctrl_lock);1781 fibril_mutex_initialize(&e1000 ->rx_lock);1782 fibril_mutex_initialize(&e1000 ->tx_lock);1783 fibril_mutex_initialize(&e1000 ->eeprom_lock);1784 1785 return e1000 ;1769 nic_set_poll_handlers(nic_data, e1000_poll_mode_change, e1000_poll); 1770 1771 fibril_mutex_initialize(&e1000_data->ctrl_lock); 1772 fibril_mutex_initialize(&e1000_data->rx_lock); 1773 fibril_mutex_initialize(&e1000_data->tx_lock); 1774 fibril_mutex_initialize(&e1000_data->eeprom_lock); 1775 1776 return e1000_data; 1786 1777 } 1787 1778 … … 1834 1825 assert(dev->driver_data != NULL); 1835 1826 1836 e1000_t *e1000 = DRIVER_DATA_DEV(dev);1827 e1000_t *e1000_data = DRIVER_DATA_DEV(dev); 1837 1828 1838 1829 if (hw_resources->irqs.count != 1) 1839 1830 return EINVAL; 1840 1831 1841 e1000 ->irq = hw_resources->irqs.irqs[0];1842 e1000 ->reg_base_phys=1832 e1000_data->irq = hw_resources->irqs.irqs[0]; 1833 e1000_data->phys_reg_base = 1843 1834 MEMADDR_TO_PTR(hw_resources->mem_ranges.ranges[0].address); 1844 1835 … … 1887 1878 { 1888 1879 /* Allocate driver data for the device. */ 1889 e1000_t *e1000 = e1000_create_dev_data(dev);1890 if (e1000 == NULL)1880 e1000_t *e1000_data = e1000_create_dev_data(dev); 1881 if (e1000_data == NULL) 1891 1882 return ENOMEM; 1892 1883 … … 1899 1890 1900 1891 rc = pci_config_space_read_16(dev->parent_sess, PCI_DEVICE_ID, 1901 &e1000 ->device_id);1892 &e1000_data->device_id); 1902 1893 if (rc != EOK) { 1903 1894 e1000_dev_cleanup(dev); … … 1918 1909 static int e1000_pio_enable(ddf_dev_t *dev) 1919 1910 { 1920 e1000_t *e1000 = DRIVER_DATA_DEV(dev);1921 1922 int rc = pio_enable(e1000 ->reg_base_phys, 8 * PAGE_SIZE,1923 &e1000 ->reg_base_virt);1911 e1000_t *e1000_data = DRIVER_DATA_DEV(dev); 1912 1913 int rc = pio_enable(e1000_data->phys_reg_base, 8 * PAGE_SIZE, 1914 &e1000_data->virt_reg_base); 1924 1915 if (rc != EOK) 1925 1916 return EADDRNOTAVAIL; … … 1943 1934 1944 1935 /* Device initialization */ 1945 nic_t *nic = dev->driver_data;1946 e1000_t *e1000 = DRIVER_DATA_NIC(nic);1936 nic_t *nic_data = dev->driver_data; 1937 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 1947 1938 1948 1939 /* Map registers */ … … 1951 1942 goto err_destroy; 1952 1943 1953 e1000_initialize_registers(e1000 );1954 rc = e1000_initialize_tx_structure(e1000 );1944 e1000_initialize_registers(e1000_data); 1945 rc = e1000_initialize_tx_structure(e1000_data); 1955 1946 if (rc != EOK) 1956 1947 goto err_pio; 1957 1948 1958 fibril_mutex_lock(&e1000 ->rx_lock);1959 1960 e1000_fill_mac_from_eeprom(e1000 );1961 e1000_initialize_filters(e1000 );1962 1963 fibril_mutex_unlock(&e1000 ->rx_lock);1964 1965 e1000_initialize_vlan(e1000 );1966 1967 rc = nic_register_as_ddf_fun(nic , &e1000_dev_ops);1949 fibril_mutex_lock(&e1000_data->rx_lock); 1950 1951 e1000_fill_mac_from_eeprom(e1000_data); 1952 e1000_initialize_filters(e1000_data); 1953 1954 fibril_mutex_unlock(&e1000_data->rx_lock); 1955 1956 e1000_initialize_vlan(e1000_data); 1957 1958 rc = nic_register_as_ddf_fun(nic_data, &e1000_dev_ops); 1968 1959 if (rc != EOK) 1969 1960 goto err_tx_structure; 1970 1961 1971 rc = e1000_register_int_handler(nic );1962 rc = e1000_register_int_handler(nic_data); 1972 1963 if (rc != EOK) 1973 1964 goto err_tx_structure; 1974 1965 1975 rc = nic_connect_to_services(nic );1966 rc = nic_connect_to_services(nic_data); 1976 1967 if (rc != EOK) 1977 1968 goto err_irq; 1978 1969 1979 rc = e1000_initialize_rx_structure(nic );1970 rc = e1000_initialize_rx_structure(nic_data); 1980 1971 if (rc != EOK) 1981 1972 goto err_irq; 1982 1973 1983 1974 nic_address_t e1000_address; 1984 e1000_get_address(e1000 , &e1000_address);1985 rc = nic_report_address(nic , &e1000_address);1975 e1000_get_address(e1000_data, &e1000_address); 1976 rc = nic_report_address(nic_data, &e1000_address); 1986 1977 if (rc != EOK) 1987 1978 goto err_rx_structure; … … 1990 1981 period.tv_sec = 0; 1991 1982 period.tv_usec = E1000_DEFAULT_INTERRUPT_INTERVAL_USEC; 1992 rc = nic_report_poll_mode(nic , NIC_POLL_PERIODIC, &period);1983 rc = nic_report_poll_mode(nic_data, NIC_POLL_PERIODIC, &period); 1993 1984 if (rc != EOK) 1994 1985 goto err_rx_structure; … … 1997 1988 1998 1989 err_rx_structure: 1999 e1000_uninitialize_rx_structure(nic );1990 e1000_uninitialize_rx_structure(nic_data); 2000 1991 err_irq: 2001 1992 unregister_interrupt_handler(dev, DRIVER_DATA_DEV(dev)->irq); 2002 1993 err_tx_structure: 2003 e1000_uninitialize_tx_structure(e1000 );1994 e1000_uninitialize_tx_structure(e1000_data); 2004 1995 err_pio: 2005 1996 // TODO: e1000_pio_disable(dev); … … 2019 2010 * 2020 2011 */ 2021 static uint16_t e1000_eeprom_read(e1000_t *e1000 , uint8_t eeprom_address)2022 { 2023 fibril_mutex_lock(&e1000 ->eeprom_lock);2012 static uint16_t e1000_eeprom_read(e1000_t *e1000_data, uint8_t eeprom_address) 2013 { 2014 fibril_mutex_lock(&e1000_data->eeprom_lock); 2024 2015 2025 2016 uint32_t eerd_done; 2026 2017 uint32_t eerd_address_offset; 2027 2018 2028 switch (e1000 ->device_id) {2019 switch (e1000_data->device_id) { 2029 2020 case 0x107c: 2030 2021 case 0x1013: … … 2049 2040 uint32_t write_data = EERD_START | 2050 2041 (((uint32_t) eeprom_address) << eerd_address_offset); 2051 E1000_REG_WRITE(e1000 , E1000_EERD, write_data);2052 2053 uint32_t eerd = E1000_REG_READ(e1000 , E1000_EERD);2042 E1000_REG_WRITE(e1000_data, E1000_EERD, write_data); 2043 2044 uint32_t eerd = E1000_REG_READ(e1000_data, E1000_EERD); 2054 2045 while ((eerd & eerd_done) == 0) { 2055 2046 usleep(1); 2056 eerd = E1000_REG_READ(e1000 , E1000_EERD);2047 eerd = E1000_REG_READ(e1000_data, E1000_EERD); 2057 2048 } 2058 2049 2059 fibril_mutex_unlock(&e1000 ->eeprom_lock);2050 fibril_mutex_unlock(&e1000_data->eeprom_lock); 2060 2051 2061 2052 return (uint16_t) (eerd >> EERD_DATA_OFFSET); … … 2072 2063 * 2073 2064 */ 2074 static int e1000_get_address(e1000_t *e1000 , nic_address_t *address)2075 { 2076 fibril_mutex_lock(&e1000 ->rx_lock);2065 static int e1000_get_address(e1000_t *e1000_data, nic_address_t *address) 2066 { 2067 fibril_mutex_lock(&e1000_data->rx_lock); 2077 2068 2078 2069 uint8_t *mac0_dest = (uint8_t *) address->address; … … 2083 2074 uint8_t *mac5_dest = (uint8_t *) address->address + 5; 2084 2075 2085 uint32_t rah = E1000_REG_READ(e1000 , E1000_RAH_ARRAY(0));2086 uint32_t ral = E1000_REG_READ(e1000 , E1000_RAL_ARRAY(0));2076 uint32_t rah = E1000_REG_READ(e1000_data, E1000_RAH_ARRAY(0)); 2077 uint32_t ral = E1000_REG_READ(e1000_data, E1000_RAL_ARRAY(0)); 2087 2078 2088 2079 *mac0_dest = (uint8_t) ral; … … 2093 2084 *mac5_dest = (uint8_t) (rah >> 8); 2094 2085 2095 fibril_mutex_unlock(&e1000 ->rx_lock);2086 fibril_mutex_unlock(&e1000_data->rx_lock); 2096 2087 return EOK; 2097 2088 }; … … 2107 2098 static int e1000_set_addr(ddf_fun_t *dev, const nic_address_t *addr) 2108 2099 { 2109 nic_t *nic = NIC_DATA_DEV(dev);2110 e1000_t *e1000 = DRIVER_DATA_NIC(nic);2111 2112 fibril_mutex_lock(&e1000 ->rx_lock);2113 fibril_mutex_lock(&e1000 ->tx_lock);2114 2115 int rc = nic_report_address(nic , addr);2100 nic_t *nic_data = NIC_DATA_DEV(dev); 2101 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 2102 2103 fibril_mutex_lock(&e1000_data->rx_lock); 2104 fibril_mutex_lock(&e1000_data->tx_lock); 2105 2106 int rc = nic_report_address(nic_data, addr); 2116 2107 if (rc == EOK) 2117 e1000_write_receive_address(e1000 , 0, addr, false);2118 2119 fibril_mutex_unlock(&e1000 ->tx_lock);2120 fibril_mutex_unlock(&e1000 ->rx_lock);2108 e1000_write_receive_address(e1000_data, 0, addr, false); 2109 2110 fibril_mutex_unlock(&e1000_data->tx_lock); 2111 fibril_mutex_unlock(&e1000_data->rx_lock); 2121 2112 2122 2113 return rc; 2123 2114 } 2124 2115 2125 static void e1000_eeprom_get_address(e1000_t *e1000 ,2116 static void e1000_eeprom_get_address(e1000_t *e1000_data, 2126 2117 nic_address_t *address) 2127 2118 { … … 2130 2121 uint16_t *mac4_dest = (uint16_t *) (address->address + 4); 2131 2122 2132 *mac0_dest = e1000_eeprom_read(e1000 , 0);2133 *mac2_dest = e1000_eeprom_read(e1000 , 1);2134 *mac4_dest = e1000_eeprom_read(e1000 , 2);2123 *mac0_dest = e1000_eeprom_read(e1000_data, 0); 2124 *mac2_dest = e1000_eeprom_read(e1000_data, 1); 2125 *mac4_dest = e1000_eeprom_read(e1000_data, 2); 2135 2126 } 2136 2127 2137 2128 /** Send packet 2138 2129 * 2139 * @param nic 2140 * @param packet Packet to send2130 * @param nic_data NIC driver data structure 2131 * @param packet Packet to send 2141 2132 * 2142 2133 * @return EOK if succeed … … 2144 2135 * 2145 2136 */ 2146 static void e1000_write_packet(nic_t *nic , packet_t *packet)2147 { 2148 assert(nic );2149 2150 e1000_t *e1000 = DRIVER_DATA_NIC(nic);2151 fibril_mutex_lock(&e1000 ->tx_lock);2152 2153 uint32_t tdt = E1000_REG_READ(e1000 , E1000_TDT);2137 static void e1000_write_packet(nic_t *nic_data, packet_t *packet) 2138 { 2139 assert(nic_data); 2140 2141 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data); 2142 fibril_mutex_lock(&e1000_data->tx_lock); 2143 2144 uint32_t tdt = E1000_REG_READ(e1000_data, E1000_TDT); 2154 2145 e1000_tx_descriptor_t *tx_descriptor_addr = (e1000_tx_descriptor_t *) 2155 (e1000 ->tx_ring_virt + tdt * sizeof(e1000_tx_descriptor_t));2146 (e1000_data->tx_ring.virt + tdt * sizeof(e1000_tx_descriptor_t)); 2156 2147 2157 2148 bool descriptor_available = false; … … 2164 2155 if (tx_descriptor_addr->status & TXDESCRIPTOR_STATUS_DD) { 2165 2156 descriptor_available = true; 2166 packet_t *old_packet = *(e1000 ->tx_ring_packets + tdt);2157 packet_t *old_packet = *(e1000_data->tx_ring_packets + tdt); 2167 2158 if (old_packet) { 2168 size_t old_packet_size = packet_get_data_length(old_packet); 2169 nic_dma_unlock_packet(old_packet, old_packet_size); 2170 nic_release_packet(nic, old_packet); 2159 nic_dma_unlock_packet(old_packet); 2160 nic_release_packet(nic_data, old_packet); 2171 2161 } 2172 2162 } … … 2174 2164 if (!descriptor_available) { 2175 2165 /* Packet lost */ 2176 fibril_mutex_unlock(&e1000 ->tx_lock);2166 fibril_mutex_unlock(&e1000_data->tx_lock); 2177 2167 return; 2178 2168 } … … 2180 2170 size_t packet_size = packet_get_data_length(packet); 2181 2171 2182 void *phys; 2183 int rc = nic_dma_lock_packet(packet, packet_size, &phys); 2184 if (rc != EOK) { 2185 fibril_mutex_unlock(&e1000->tx_lock); 2172 void *phys_addr = nic_dma_lock_packet(packet); 2173 if (!phys_addr) { 2174 fibril_mutex_unlock(&e1000_data->tx_lock); 2186 2175 return; 2187 2176 } 2188 2177 2189 *(e1000 ->tx_ring_packets + tdt) = packet;2178 *(e1000_data->tx_ring_packets + tdt) = packet; 2190 2179 2191 2180 tx_descriptor_addr->phys_addr = 2192 PTR_TO_U64(phys + packet->data_start);2181 PTR_TO_U64(phys_addr + packet->data_start); 2193 2182 tx_descriptor_addr->length = packet_size; 2194 2183 … … 2203 2192 tx_descriptor_addr->checksum_offset = 0; 2204 2193 tx_descriptor_addr->status = 0; 2205 if (e1000 ->vlan_tag_add) {2206 tx_descriptor_addr->special = e1000 ->vlan_tag;2194 if (e1000_data->vlan_tag_add) { 2195 tx_descriptor_addr->special = e1000_data->vlan_tag; 2207 2196 tx_descriptor_addr->command |= TXDESCRIPTOR_COMMAND_VLE; 2208 2197 } else … … 2215 2204 tdt = 0; 2216 2205 2217 E1000_REG_WRITE(e1000 , E1000_TDT, tdt);2218 2219 fibril_mutex_unlock(&e1000 ->tx_lock);2206 E1000_REG_WRITE(e1000_data, E1000_TDT, tdt); 2207 2208 fibril_mutex_unlock(&e1000_data->tx_lock); 2220 2209 } 2221 2210 … … 2226 2215 return rc; 2227 2216 2228 nic_driver_implement(&e1000_driver_ops, &e1000_dev_ops, 2229 &e1000_nic_iface); 2217 nic_driver_implement(&e1000_driver_ops, &e1000_dev_ops, &e1000_nic_iface); 2230 2218 return ddf_driver_main(&e1000_driver); 2231 2219 } -
uspace/drv/nic/e1k/e1k.h
r792807f r9916841 49 49 50 50 /** Receive descriptior */ 51 typedef struct {51 typedef struct e1000_rx_descriptor { 52 52 /** Buffer Address - physical */ 53 53 uint64_t phys_addr; … … 57 57 uint16_t checksum; 58 58 /** Status field */ 59 uint8_t status;59 uint8_t status; 60 60 /** Errors field */ 61 61 uint8_t errors; … … 65 65 66 66 /** Legacy transmit descriptior */ 67 typedef struct {67 typedef struct e1000_tx_descriptor { 68 68 /** Buffer Address - physical */ 69 69 uint64_t phys_addr; … … 75 75 uint8_t command; 76 76 /** Status field, upper bits are reserved */ 77 uint8_t status;77 uint8_t status; 78 78 /** Checksum Start Field */ 79 79 uint8_t checksum_start_field; -
uspace/lib/c/generic/as.c
r792807f r9916841 117 117 /** Find mapping to physical address. 118 118 * 119 * @param virt Virtual address to find mapping for. 120 * @param[out] phys Physical adress. 121 * 122 * @return EOK on no error. 123 * @retval ENOENT if no mapping was found. 124 * 119 * @param address Virtual address in question (virtual). 120 * @param[out] frame Frame address (physical). 121 * @return Error code. 122 * @retval EOK No error, @p frame holds the translation. 123 * @retval ENOENT Mapping not found. 125 124 */ 126 int as_get_physical_mapping(const void * virt, uintptr_t *phys)125 int as_get_physical_mapping(const void *address, uintptr_t *frame) 127 126 { 128 return (int) __SYSCALL2(SYS_PAGE_FIND_MAPPING, (sysarg_t) virt, 129 (sysarg_t) phys); 127 uintptr_t tmp_frame; 128 uintptr_t virt = (uintptr_t) address; 129 130 int rc = (int) __SYSCALL2(SYS_PAGE_FIND_MAPPING, 131 (sysarg_t) virt, (sysarg_t) &tmp_frame); 132 if (rc != EOK) { 133 return rc; 134 } 135 136 if (frame != NULL) { 137 *frame = tmp_frame; 138 } 139 140 return EOK; 130 141 } 131 142 -
uspace/lib/c/generic/ddi.c
r792807f r9916841 33 33 */ 34 34 35 #include <assert.h>36 #include <unistd.h>37 #include <errno.h>38 35 #include <sys/types.h> 39 36 #include <abi/ddi/arg.h> … … 60 57 * Caller of this function must have the CAP_MEM_MANAGER capability. 61 58 * 62 * @param p hysPhysical address of the starting frame.63 * @param v irtVirtual address of the starting page.59 * @param pf Physical address of the starting frame. 60 * @param vp Virtual address of the starting page. 64 61 * @param pages Number of pages to map. 65 62 * @param flags Flags for the new address space area. … … 72 69 * 73 70 */ 74 int physmem_map(void *p hys, void *virt, size_t pages, unsigned int flags)71 int physmem_map(void *pf, void *vp, size_t pages, unsigned int flags) 75 72 { 76 return __SYSCALL4(SYS_PHYSMEM_MAP, (sysarg_t) p hys,77 (sysarg_t) virt,pages, flags);73 return __SYSCALL4(SYS_PHYSMEM_MAP, (sysarg_t) pf, (sysarg_t) vp, 74 pages, flags); 78 75 } 79 76 80 int dmamem_map( void *virt, size_t size, unsigned int map_flags,81 unsigned int flags, void **phys)77 int dmamem_map(dmamem_t *dmamem, size_t pages, unsigned int map_flags, 78 unsigned int dma_flags) 82 79 { 83 return (int) __SYSCALL5(SYS_DMAMEM_MAP, (sysarg_t) virt, 84 (sysarg_t) size, (sysarg_t) map_flags, (sysarg_t) flags, 85 (sysarg_t) phys); 80 // FIXME TODO 81 return -1; 86 82 } 87 83 88 int dmamem_map_anonymous(size_t size, unsigned int map_flags, 89 unsigned int flags, void **phys, void **virt) 84 int dmamem_unmap(dmamem_t *dmamem) 90 85 { 91 *virt = as_get_mappable_page(size); 92 if (*virt == NULL) 93 return ENOMEM; 94 95 return dmamem_map(*virt, size, map_flags, 96 flags | DMAMEM_FLAGS_ANONYMOUS, phys); 86 // FIXME TODO 87 return -1; 97 88 } 98 89 99 int dmamem_ unmap(void *virt, size_t size, unsigned int flags)90 int dmamem_lock(void *virt, void **phys, size_t pages) 100 91 { 101 return __SYSCALL3(SYS_DMAMEM_UNMAP, (sysarg_t) virt, (sysarg_t) size,102 (sysarg_t) flags);92 // FIXME TODO 93 return -1; 103 94 } 104 95 105 int dmamem_un map_anonymous(void *virt)96 int dmamem_unlock(void *virt, size_t pages) 106 97 { 107 return __SYSCALL3(SYS_DMAMEM_UNMAP, (sysarg_t) virt, 0,108 DMAMEM_FLAGS_ANONYMOUS);98 // FIXME TODO 99 return -1; 109 100 } 110 101 -
uspace/lib/c/include/ddi.h
r792807f r9916841 40 40 #include <task.h> 41 41 42 typedef struct { 43 /** Physical memory */ 44 void *phys; 45 46 /** Virtual memory */ 47 void *virt; 48 49 /** Size in pages */ 50 size_t size; 51 52 /** Mapping flags */ 53 unsigned int flags; 54 } dmamem_t; 55 42 56 extern int device_assign_devno(void); 43 44 57 extern int physmem_map(void *, void *, size_t, unsigned int); 45 46 extern int dmamem_map(void *, size_t, unsigned int, unsigned int, void **); 47 extern int dmamem_map_anonymous(size_t, unsigned int, unsigned int, void **, 48 void **); 49 extern int dmamem_unmap(void *, size_t, unsigned int); 50 extern int dmamem_unmap_anonymous(void *); 51 58 extern int dmamem_map(dmamem_t *, size_t, unsigned int, unsigned int); 59 extern int dmamem_unmap(dmamem_t *); 60 extern int dmamem_lock(void *, void **, size_t); 61 extern int dmamem_unlock(void *, size_t); 52 62 extern int iospace_enable(task_id_t, void *, unsigned long); 53 63 extern int pio_enable(void *, size_t, void **); 54 55 64 extern int register_irq(int, int, int, irq_code_t *); 56 65 extern int unregister_irq(int, int); -
uspace/lib/net/generic/packet_client.c
r792807f r9916841 39 39 #include <unistd.h> 40 40 #include <sys/mman.h> 41 41 42 #include <packet_client.h> 42 43 #include <packet_remote.h> -
uspace/lib/nic/include/nic.h
r792807f r9916841 275 275 276 276 /* Packet DMA lock */ 277 extern int nic_dma_lock_packet(packet_t *, size_t, void **);278 extern int nic_dma_unlock_packet(packet_t * , size_t);277 extern void *nic_dma_lock_packet(packet_t *); 278 extern int nic_dma_unlock_packet(packet_t *); 279 279 280 280 #endif // __NIC_H__ -
uspace/lib/nic/src/nic_driver.c
r792807f r9916841 46 46 #include <ipc/irc.h> 47 47 #include <sysinfo.h> 48 #include <as.h> 48 49 49 #include <devman.h> 50 50 #include <ddf/interrupt.h> … … 1334 1334 * @return physical address of packet 1335 1335 */ 1336 int nic_dma_lock_packet(packet_t *packet, size_t size, void **phys) 1337 { 1338 return dmamem_map(packet, SIZE2PAGES(size), 0, 0, phys); 1336 void *nic_dma_lock_packet(packet_t *packet) 1337 { 1338 void *phys_addr; 1339 int rc = dmamem_lock(packet, &phys_addr, 1); 1340 if (rc != EOK) 1341 return NULL; 1342 1343 return phys_addr; 1339 1344 } 1340 1345 … … 1343 1348 * @param packet 1344 1349 */ 1345 int nic_dma_unlock_packet(packet_t *packet , size_t size)1346 { 1347 return dmamem_un map(packet, size, 0);1350 int nic_dma_unlock_packet(packet_t *packet) 1351 { 1352 return dmamem_unlock(packet, 1); 1348 1353 } 1349 1354 -
uspace/lib/nic/src/nic_rx_control.c
r792807f r9916841 438 438 } 439 439 } 440 441 440 /* Blocked source addresses */ 442 441 if (rxc->block_sources) { … … 444 443 return false; 445 444 } 446 447 445 /* VLAN filtering */ 448 446 if (!rxc->vlan_exact && rxc->vlan_mask != NULL) {
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