Changes in kernel/arch/ia32/src/smp/apic.c [acc7ce4:99718a2e] in mainline
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kernel/arch/ia32/src/smp/apic.c
racc7ce4 r99718a2e 72 72 * 73 73 */ 74 volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000);75 volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000);74 volatile uint32_t *l_apic = (uint32_t *) 0xfee00000; 75 volatile uint32_t *io_apic = (uint32_t *) 0xfec00000; 76 76 77 77 uint32_t apic_id_mask = 0; … … 178 178 disable_irqs_function = io_apic_disable_irqs; 179 179 eoi_function = l_apic_eoi; 180 irqs_info = "apic";181 180 182 181 /* … … 185 184 * Other interrupts will be forwarded to the lowest priority CPU. 186 185 */ 187 io_apic_disable_irqs(0xffff U);186 io_apic_disable_irqs(0xffff); 188 187 189 188 irq_initialize(&l_apic_timer_irq); … … 478 477 { 479 478 #ifdef LAPIC_VERBOSE 480 printf("LVT on cpu% u, LAPIC ID: %" PRIu8 "\n",479 printf("LVT on cpu%" PRIs ", LAPIC ID: %" PRIu8 "\n", 481 480 CPU->id, l_apic_id()); 482 481
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