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  • kernel/arch/ia32/src/smp/apic.c

    racc7ce4 r99718a2e  
    7272 *
    7373 */
    74 volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000);
    75 volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000);
     74volatile uint32_t *l_apic = (uint32_t *) 0xfee00000;
     75volatile uint32_t *io_apic = (uint32_t *) 0xfec00000;
    7676
    7777uint32_t apic_id_mask = 0;
     
    178178        disable_irqs_function = io_apic_disable_irqs;
    179179        eoi_function = l_apic_eoi;
    180         irqs_info = "apic";
    181180       
    182181        /*
     
    185184         * Other interrupts will be forwarded to the lowest priority CPU.
    186185         */
    187         io_apic_disable_irqs(0xffffU);
     186        io_apic_disable_irqs(0xffff);
    188187       
    189188        irq_initialize(&l_apic_timer_irq);
     
    478477{
    479478#ifdef LAPIC_VERBOSE
    480         printf("LVT on cpu%u, LAPIC ID: %" PRIu8 "\n",
     479        printf("LVT on cpu%" PRIs ", LAPIC ID: %" PRIu8 "\n",
    481480            CPU->id, l_apic_id());
    482481       
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