Changes in kernel/arch/ia32/src/smp/smp.c [99d6fd0:99718a2e] in mainline
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kernel/arch/ia32/src/smp/smp.c
r99d6fd0 r99718a2e 62 62 void smp_init(void) 63 63 { 64 uintptr_t l_apic_address, io_apic_address;65 66 64 if (acpi_madt) { 67 65 acpi_madt_parse(); 68 66 ops = &madt_config_operations; 69 67 } 68 70 69 if (config.cpu_count == 1) { 71 70 mps_init(); 72 71 ops = &mps_config_operations; 73 72 } 74 75 l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, 76 FRAME_ATOMIC | FRAME_KA); 77 if (!l_apic_address) 78 panic("Cannot allocate address for l_apic."); 79 80 io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, 81 FRAME_ATOMIC | FRAME_KA); 82 if (!io_apic_address) 83 panic("Cannot allocate address for io_apic."); 84 85 if (config.cpu_count > 1) { 86 page_mapping_insert(AS_KERNEL, l_apic_address, 87 (uintptr_t) l_apic, PAGE_NOT_CACHEABLE | PAGE_WRITE); 88 page_mapping_insert(AS_KERNEL, io_apic_address, 89 (uintptr_t) io_apic, PAGE_NOT_CACHEABLE | PAGE_WRITE); 90 91 l_apic = (uint32_t *) l_apic_address; 92 io_apic = (uint32_t *) io_apic_address; 73 74 if (config.cpu_count > 1) { 75 l_apic = (uint32_t *) hw_map((uintptr_t) l_apic, PAGE_SIZE); 76 io_apic = (uint32_t *) hw_map((uintptr_t) io_apic, PAGE_SIZE); 93 77 } 94 78 } … … 106 90 107 91 ASSERT(ops != NULL); 108 92 109 93 /* 110 94 * We need to access data in frame 0. 111 95 * We boldly make use of kernel address space mapping. 112 96 */ 113 97 114 98 /* 115 99 * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() 116 100 */ 117 101 *((uint16_t *) (PA2KA(0x467 + 0))) = 118 (uint16_t) (((uintptr_t) ap_boot) >> 4); 119 *((uint16_t *) (PA2KA(0x467 + 2))) = 0; 102 (uint16_t) (((uintptr_t) ap_boot) >> 4); /* segment */ 103 *((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */ 120 104 121 105 /* … … 123 107 * BIOS will not do the POST after the INIT signal. 124 108 */ 125 pio_write_8((ioport8_t *) 0x70, 0xf);126 pio_write_8((ioport8_t *) 0x71, 0xa);127 109 pio_write_8((ioport8_t *) 0x70, 0xf); 110 pio_write_8((ioport8_t *) 0x71, 0xa); 111 128 112 pic_disable_irqs(0xffff); 129 113 apic_init(); 130 114 131 uint8_t apic = l_apic_id(); 132 133 for (i = 0; i < ops->cpu_count(); i++) { 134 descriptor_t *gdt_new; 135 115 for (i = 0; i < config.cpu_count; i++) { 136 116 /* 137 117 * Skip processors marked unusable. … … 139 119 if (!ops->cpu_enabled(i)) 140 120 continue; 141 121 142 122 /* 143 123 * The bootstrap processor is already up. … … 145 125 if (ops->cpu_bootstrap(i)) 146 126 continue; 147 148 if (ops->cpu_apic_id(i) == apic) {149 printf(" %s: bad processor entry #%u, will not send IPI "150 "to myself\n", __FUNCTION__,i);127 128 if (ops->cpu_apic_id(i) == bsp_l_apic) { 129 printf("kmp: bad processor entry #%u, will not send IPI " 130 "to myself\n", i); 151 131 continue; 152 132 } … … 160 140 * the memory subsystem 161 141 */ 162 gdt_new = (descriptor_t *) malloc(GDT_ITEMS * 163 sizeof(descriptor_t), FRAME_ATOMIC); 142 descriptor_t *gdt_new = 143 (descriptor_t *) malloc(GDT_ITEMS * sizeof(descriptor_t), 144 FRAME_ATOMIC); 164 145 if (!gdt_new) 165 146 panic("Cannot allocate memory for GDT."); 166 147 167 148 memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t)); 168 149 memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0); … … 170 151 protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new); 171 152 gdtr.base = (uintptr_t) gdt_new; 172 153 173 154 if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { 174 155 /* … … 179 160 if (waitq_sleep_timeout(&ap_completion_wq, 1000000, 180 161 SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) { 181 unsigned int cpu = (config.cpu_active > i) ?182 config.cpu_active : i;183 162 printf("%s: waiting for cpu%u (APIC ID = %d) " 184 "timed out\n", __FUNCTION__, cpu,163 "timed out\n", __FUNCTION__, i, 185 164 ops->cpu_apic_id(i)); 186 165 }
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