Changes in kernel/arch/ia32/src/smp/smp.c [99718a2e:99d6fd0] in mainline
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kernel/arch/ia32/src/smp/smp.c
r99718a2e r99d6fd0 62 62 void smp_init(void) 63 63 { 64 uintptr_t l_apic_address, io_apic_address; 65 64 66 if (acpi_madt) { 65 67 acpi_madt_parse(); 66 68 ops = &madt_config_operations; 67 69 } 68 69 70 if (config.cpu_count == 1) { 70 71 mps_init(); 71 72 ops = &mps_config_operations; 72 73 } 73 74 if (config.cpu_count > 1) { 75 l_apic = (uint32_t *) hw_map((uintptr_t) l_apic, PAGE_SIZE); 76 io_apic = (uint32_t *) hw_map((uintptr_t) io_apic, PAGE_SIZE); 74 75 l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, 76 FRAME_ATOMIC | FRAME_KA); 77 if (!l_apic_address) 78 panic("Cannot allocate address for l_apic."); 79 80 io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, 81 FRAME_ATOMIC | FRAME_KA); 82 if (!io_apic_address) 83 panic("Cannot allocate address for io_apic."); 84 85 if (config.cpu_count > 1) { 86 page_mapping_insert(AS_KERNEL, l_apic_address, 87 (uintptr_t) l_apic, PAGE_NOT_CACHEABLE | PAGE_WRITE); 88 page_mapping_insert(AS_KERNEL, io_apic_address, 89 (uintptr_t) io_apic, PAGE_NOT_CACHEABLE | PAGE_WRITE); 90 91 l_apic = (uint32_t *) l_apic_address; 92 io_apic = (uint32_t *) io_apic_address; 77 93 } 78 94 } … … 90 106 91 107 ASSERT(ops != NULL); 92 108 93 109 /* 94 110 * We need to access data in frame 0. 95 111 * We boldly make use of kernel address space mapping. 96 112 */ 97 113 98 114 /* 99 115 * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() 100 116 */ 101 117 *((uint16_t *) (PA2KA(0x467 + 0))) = 102 (uint16_t) (((uintptr_t) ap_boot) >> 4); 103 *((uint16_t *) (PA2KA(0x467 + 2))) = 0; 118 (uint16_t) (((uintptr_t) ap_boot) >> 4); /* segment */ 119 *((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */ 104 120 105 121 /* … … 107 123 * BIOS will not do the POST after the INIT signal. 108 124 */ 109 pio_write_8((ioport8_t *) 110 pio_write_8((ioport8_t *) 111 125 pio_write_8((ioport8_t *)0x70, 0xf); 126 pio_write_8((ioport8_t *)0x71, 0xa); 127 112 128 pic_disable_irqs(0xffff); 113 129 apic_init(); 114 130 115 for (i = 0; i < config.cpu_count; i++) { 131 uint8_t apic = l_apic_id(); 132 133 for (i = 0; i < ops->cpu_count(); i++) { 134 descriptor_t *gdt_new; 135 116 136 /* 117 137 * Skip processors marked unusable. … … 119 139 if (!ops->cpu_enabled(i)) 120 140 continue; 121 141 122 142 /* 123 143 * The bootstrap processor is already up. … … 125 145 if (ops->cpu_bootstrap(i)) 126 146 continue; 127 128 if (ops->cpu_apic_id(i) == bsp_l_apic) {129 printf(" kmp: bad processor entry #%u, will not send IPI "130 "to myself\n", i);147 148 if (ops->cpu_apic_id(i) == apic) { 149 printf("%s: bad processor entry #%u, will not send IPI " 150 "to myself\n", __FUNCTION__, i); 131 151 continue; 132 152 } … … 140 160 * the memory subsystem 141 161 */ 142 descriptor_t *gdt_new = 143 (descriptor_t *) malloc(GDT_ITEMS * sizeof(descriptor_t), 144 FRAME_ATOMIC); 162 gdt_new = (descriptor_t *) malloc(GDT_ITEMS * 163 sizeof(descriptor_t), FRAME_ATOMIC); 145 164 if (!gdt_new) 146 165 panic("Cannot allocate memory for GDT."); 147 166 148 167 memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t)); 149 168 memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0); … … 151 170 protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new); 152 171 gdtr.base = (uintptr_t) gdt_new; 153 172 154 173 if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { 155 174 /* … … 160 179 if (waitq_sleep_timeout(&ap_completion_wq, 1000000, 161 180 SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) { 181 unsigned int cpu = (config.cpu_active > i) ? 182 config.cpu_active : i; 162 183 printf("%s: waiting for cpu%u (APIC ID = %d) " 163 "timed out\n", __FUNCTION__, i,184 "timed out\n", __FUNCTION__, cpu, 164 185 ops->cpu_apic_id(i)); 165 186 }
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