Changes in uspace/lib/drv/generic/remote_pci.c [b7fd2a0:99e8fb7b] in mainline
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/lib/drv/generic/remote_pci.c
rb7fd2a0 r99e8fb7b 51 51 } pci_dev_iface_funcs_t; 52 52 53 errno_t pci_config_space_read_8(async_sess_t *sess, uint32_t address, uint8_t *val)53 int pci_config_space_read_8(async_sess_t *sess, uint32_t address, uint8_t *val) 54 54 { 55 55 sysarg_t res = 0; 56 56 57 57 async_exch_t *exch = async_exchange_begin(sess); 58 errno_t rc = async_req_2_1(exch, DEV_IFACE_ID(PCI_DEV_IFACE),58 int rc = async_req_2_1(exch, DEV_IFACE_ID(PCI_DEV_IFACE), 59 59 IPC_M_CONFIG_SPACE_READ_8, address, &res); 60 60 async_exchange_end(exch); … … 64 64 } 65 65 66 errno_t pci_config_space_read_16(async_sess_t *sess, uint32_t address,66 int pci_config_space_read_16(async_sess_t *sess, uint32_t address, 67 67 uint16_t *val) 68 68 { … … 70 70 71 71 async_exch_t *exch = async_exchange_begin(sess); 72 errno_t rc = async_req_2_1(exch, DEV_IFACE_ID(PCI_DEV_IFACE),72 int rc = async_req_2_1(exch, DEV_IFACE_ID(PCI_DEV_IFACE), 73 73 IPC_M_CONFIG_SPACE_READ_16, address, &res); 74 74 async_exchange_end(exch); … … 78 78 } 79 79 80 errno_t pci_config_space_read_32(async_sess_t *sess, uint32_t address,80 int pci_config_space_read_32(async_sess_t *sess, uint32_t address, 81 81 uint32_t *val) 82 82 { … … 84 84 85 85 async_exch_t *exch = async_exchange_begin(sess); 86 errno_t rc = async_req_2_1(exch, DEV_IFACE_ID(PCI_DEV_IFACE),86 int rc = async_req_2_1(exch, DEV_IFACE_ID(PCI_DEV_IFACE), 87 87 IPC_M_CONFIG_SPACE_READ_32, address, &res); 88 88 async_exchange_end(exch); … … 92 92 } 93 93 94 errno_t pci_config_space_write_8(async_sess_t *sess, uint32_t address, uint8_t val)95 { 96 async_exch_t *exch = async_exchange_begin(sess); 97 errno_t rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE),94 int pci_config_space_write_8(async_sess_t *sess, uint32_t address, uint8_t val) 95 { 96 async_exch_t *exch = async_exchange_begin(sess); 97 int rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE), 98 98 IPC_M_CONFIG_SPACE_WRITE_8, address, val); 99 99 async_exchange_end(exch); … … 102 102 } 103 103 104 errno_t pci_config_space_write_16(async_sess_t *sess, uint32_t address,104 int pci_config_space_write_16(async_sess_t *sess, uint32_t address, 105 105 uint16_t val) 106 106 { 107 107 async_exch_t *exch = async_exchange_begin(sess); 108 errno_t rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE),108 int rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE), 109 109 IPC_M_CONFIG_SPACE_WRITE_16, address, val); 110 110 async_exchange_end(exch); … … 113 113 } 114 114 115 errno_t pci_config_space_write_32(async_sess_t *sess, uint32_t address,115 int pci_config_space_write_32(async_sess_t *sess, uint32_t address, 116 116 uint32_t val) 117 117 { 118 118 async_exch_t *exch = async_exchange_begin(sess); 119 errno_t rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE),119 int rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE), 120 120 IPC_M_CONFIG_SPACE_WRITE_32, address, val); 121 121 async_exchange_end(exch); … … 160 160 uint32_t address = DEV_IPC_GET_ARG1(*call); 161 161 uint8_t value; 162 errno_t ret = pci_iface->config_space_read_8(fun, address, &value);162 int ret = pci_iface->config_space_read_8(fun, address, &value); 163 163 if (ret != EOK) { 164 164 async_answer_0(callid, ret); … … 178 178 uint32_t address = DEV_IPC_GET_ARG1(*call); 179 179 uint16_t value; 180 errno_t ret = pci_iface->config_space_read_16(fun, address, &value);180 int ret = pci_iface->config_space_read_16(fun, address, &value); 181 181 if (ret != EOK) { 182 182 async_answer_0(callid, ret); … … 195 195 uint32_t address = DEV_IPC_GET_ARG1(*call); 196 196 uint32_t value; 197 errno_t ret = pci_iface->config_space_read_32(fun, address, &value);197 int ret = pci_iface->config_space_read_32(fun, address, &value); 198 198 if (ret != EOK) { 199 199 async_answer_0(callid, ret); … … 213 213 uint32_t address = DEV_IPC_GET_ARG1(*call); 214 214 uint8_t value = DEV_IPC_GET_ARG2(*call); 215 errno_t ret = pci_iface->config_space_write_8(fun, address, value);215 int ret = pci_iface->config_space_write_8(fun, address, value); 216 216 if (ret != EOK) { 217 217 async_answer_0(callid, ret); … … 231 231 uint32_t address = DEV_IPC_GET_ARG1(*call); 232 232 uint16_t value = DEV_IPC_GET_ARG2(*call); 233 errno_t ret = pci_iface->config_space_write_16(fun, address, value);233 int ret = pci_iface->config_space_write_16(fun, address, value); 234 234 if (ret != EOK) { 235 235 async_answer_0(callid, ret); … … 249 249 uint32_t address = DEV_IPC_GET_ARG1(*call); 250 250 uint32_t value = DEV_IPC_GET_ARG2(*call); 251 errno_t ret = pci_iface->config_space_write_32(fun, address, value);251 int ret = pci_iface->config_space_write_32(fun, address, value); 252 252 if (ret != EOK) { 253 253 async_answer_0(callid, ret);
Note:
See TracChangeset
for help on using the changeset viewer.