Changeset 9a68b34d in mainline
- Timestamp:
- 2006-05-01T19:32:59Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 7dd1787
- Parents:
- 16dad032
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ppc32/include/mm/tlb.h
r16dad032 r9a68b34d 33 33 #include <typedefs.h> 34 34 35 extern void pht_refill(istate_t *istate); 35 #define PHT_BITS 16 36 #define PHT_ORDER 4 37 38 typedef struct { 39 unsigned v : 1; /**< Valid */ 40 unsigned vsid : 24; /**< Virtual Segment ID */ 41 unsigned h : 1; /**< Primary/secondary hash */ 42 unsigned api : 6; /**< Abbreviated Page Index */ 43 unsigned rpn : 20; /**< Real Page Number */ 44 unsigned reserved0 : 3; 45 unsigned r : 1; /**< Reference */ 46 unsigned c : 1; /**< Change */ 47 unsigned wimg : 4; /**< Access control */ 48 unsigned reserved1 : 1; 49 unsigned pp : 2; /**< Page protection */ 50 } phte_t; 51 52 extern void pht_refill(bool data, istate_t *istate); 36 53 37 54 #endif -
arch/ppc32/src/drivers/cuda.c
r16dad032 r9a68b34d 72 72 #ifdef CONFIG_POWEROFF 73 73 cuda_packet(CUDA_POWERDOWN); 74 #else 75 asm volatile ( 76 "b 0\n" 77 ); 74 78 #endif 75 79 cpu_sleep(); -
arch/ppc32/src/exception.S
r16dad032 r9a68b34d 139 139 140 140 addis sp, sp, 0x8000 141 mr r3, sp 141 li r3, 1 142 mr r4, sp 142 143 rfi 143 144 … … 160 161 161 162 addis sp, sp, 0x8000 162 mr r3, sp 163 li r3, 0 164 mr r4, sp 163 165 rfi 164 166 -
arch/ppc32/src/mm/tlb.c
r16dad032 r9a68b34d 30 30 #include <arch/types.h> 31 31 #include <mm/tlb.h> 32 #include <mm/frame.h> 32 33 #include <mm/page.h> 33 34 #include <mm/as.h> … … 37 38 38 39 40 static phte_t *phte; 41 42 39 43 /** Initialize Page Hash Table. 40 44 * … … 44 48 void tlb_arch_init(void) 45 49 { 50 phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC)); 51 phte =(phte_t *) PA2KA((__address) physical_phte); 52 53 ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0); 54 55 memsetb((__address) phte, 1 << PHT_BITS, 0); 56 57 asm volatile ( 58 "mtsdr1 %0\n" 59 : 60 : "r" ((__address) physical_phte) 61 ); 46 62 } 47 63 … … 104 120 if (s) 105 121 sym2 = s; 106 panic("%X: PHT Refill Exception at %X(%s<-%s)\n", badvaddr, istate->pc, symbol, sym2); 107 } 108 109 110 /** Process Data Storage Interrupt 111 * 122 panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2); 123 } 124 125 126 /** Process Instruction/Data Storage Interrupt 127 * 128 * @param data True if Data Storage Interrupt. 112 129 * @param istate Interrupted register context. 113 130 * 114 131 */ 115 void pht_refill( istate_t *istate)132 void pht_refill(bool data, istate_t *istate) 116 133 { 117 134 asid_t asid; 118 135 __address badvaddr; 119 136 pte_t *pte; 120 121 __asm__ volatile ( 122 "mfdar %0\n" 123 : "=r" (badvaddr) 124 ); 125 137 __u32 page; 138 __u32 api; 139 __u32 vsid; 140 __u32 hash; 141 __u32 i; 142 143 if (data) { 144 asm volatile ( 145 "mfdar %0\n" 146 : "=r" (badvaddr) 147 ); 148 } else 149 badvaddr = istate->pc; 150 126 151 spinlock_lock(&AS->lock); 127 152 asid = AS->asid; … … 134 159 goto fail; 135 160 136 /* 137 * Record access to PTE. 138 */ 161 /* Record access to PTE */ 139 162 pte->a = 1; 140 163 141 // FIXME: Insert entry into PHT 142 164 page = ADDR2PFN(badvaddr); 165 api = (badvaddr >> 22) & 0x3f; 166 asm volatile ( 167 "mfsrin %0, %1\n" 168 : "=r" (vsid) 169 : "r" (badvaddr >> 28) 170 ); 171 172 /* Primary hash (xor) */ 173 hash = ((vsid ^ page) & 0x3ff) << 3; 174 175 /* Find invalid PTE in PTEG */ 176 for (i = 0; i < 8; i++) { 177 if (!phte[hash + i].v) 178 break; 179 } 180 181 // TODO: Check access/change bits, secondary hash 182 183 if (i == 8) 184 i = page % 8; 185 186 phte[hash + i].v = 1; 187 phte[hash + i].vsid = vsid; 188 phte[hash + i].h = 0; 189 phte[hash + i].api = api; 190 phte[hash + i].rpn = pte->pfn; 191 phte[hash + i].r = 0; 192 phte[hash + i].c = 0; 193 phte[hash + i].pp = 2; // FIXME 194 143 195 page_table_unlock(AS, true); 144 196 return; -
generic/src/mm/frame.c
r16dad032 r9a68b34d 435 435 * 436 436 * Assume zone is locked 437 * Panics, if allocation is impossible. 437 * Panics if allocation is impossible. 438 * 439 * @param zone Zone to allocate from. 440 * @param order Allocate exactly 2^order frames. 438 441 * 439 442 * @return Frame index in zone 440 */ 441 static pfn_t zone_frame_alloc(zone_t *zone,__u8 order) 443 * 444 */ 445 static pfn_t zone_frame_alloc(zone_t *zone, __u8 order) 442 446 { 443 447 pfn_t v; … … 892 896 /** Allocate power-of-two frames of physical memory. 893 897 * 894 * @param flags Flags for host zone selection and address processing. 895 * @param order Allocate exactly 2^order frames. 896 * @param pzone Preferred zone 898 * @param order Allocate exactly 2^order frames. 899 * @param flags Flags for host zone selection and address processing. 900 * @param status Allocation status (FRAME_OK on success), unused if NULL. 901 * @param pzone Preferred zone 897 902 * 898 903 * @return Allocated frame. 899 */ 900 pfn_t frame_alloc_generic(__u8 order, int flags, int * status, int *pzone) 904 * 905 */ 906 pfn_t frame_alloc_generic(__u8 order, int flags, int *status, int *pzone) 901 907 { 902 908 ipl_t ipl; … … 907 913 loop: 908 914 ipl = interrupts_disable(); 915 909 916 /* 910 917 * First, find suitable frame zone. 911 918 */ 912 zone = find_free_zone_lock(order,pzone); 919 zone = find_free_zone_lock(order, pzone); 920 913 921 /* If no memory, reclaim some slab memory, 914 922 if it does not help, reclaim all */ … … 916 924 freed = slab_reclaim(0); 917 925 if (freed) 918 zone = find_free_zone_lock(order, pzone);926 zone = find_free_zone_lock(order, pzone); 919 927 if (!zone) { 920 928 freed = slab_reclaim(SLAB_RECLAIM_ALL); 921 929 if (freed) 922 zone = find_free_zone_lock(order, pzone);930 zone = find_free_zone_lock(order, pzone); 923 931 } 924 932 } … … 942 950 goto loop; 943 951 } 944 v = zone_frame_alloc(zone,order); 952 953 v = zone_frame_alloc(zone, order); 945 954 v += zone->base; 946 955
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