Changeset 9b56e528 in mainline
- Timestamp:
- 2018-01-13T15:13:44Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 36fb6d7
- Parents:
- 37b13175
- git-author:
- Ondřej Hlavatý <aearsis@…> (2018-01-13 15:11:45)
- git-committer:
- Ondřej Hlavatý <aearsis@…> (2018-01-13 15:13:44)
- Location:
- uspace/drv/bus/usb/xhci
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/xhci/debug.c
r37b13175 r9b56e528 127 127 DUMP_REG(port, XHCI_PORT_DR); 128 128 DUMP_REG(port, XHCI_PORT_WPR); 129 DUMP_REG(port, XHCI_PORT_USB3_U1TO); 130 DUMP_REG(port, XHCI_PORT_USB3_U2TO); 131 DUMP_REG(port, XHCI_PORT_USB3_FLPMA); 132 DUMP_REG(port, XHCI_PORT_USB3_LEC); 133 DUMP_REG(port, XHCI_PORT_USB3_RLC); 134 DUMP_REG(port, XHCI_PORT_USB3_TLC); 135 DUMP_REG(port, XHCI_PORT_USB2_L1S); 136 DUMP_REG(port, XHCI_PORT_USB2_RWE); 137 DUMP_REG(port, XHCI_PORT_USB2_BESL); 138 DUMP_REG(port, XHCI_PORT_USB2_L1DS); 139 DUMP_REG(port, XHCI_PORT_USB2_HLE); 140 DUMP_REG(port, XHCI_PORT_USB2_TM); 141 DUMP_REG(port, XHCI_PORT_USB2_HIRDM); 142 DUMP_REG(port, XHCI_PORT_USB2_L1TO); 143 DUMP_REG(port, XHCI_PORT_USB2_BESLD); 129 144 } 130 145 -
uspace/drv/bus/usb/xhci/hw_struct/regs.h
r37b13175 r9b56e528 300 300 #define XHCI_PORT_WDE portsc, 32, FLAG, 26 301 301 #define XHCI_PORT_WOE portsc, 32, FLAG, 27 302 #define XHCI_PORT_DR portsc, 32, FLAG, 28303 #define XHCI_PORT_WPR portsc, 32, FLAG, 29302 #define XHCI_PORT_DR portsc, 32, FLAG, 30 303 #define XHCI_PORT_WPR portsc, 32, FLAG, 31 304 304 305 305 #define XHCI_PORT_USB3_U1TO portpmsc, 32, RANGE, 7, 0 … … 316 316 #define XHCI_PORT_USB2_HLE portpmsc, 32, FLAG, 16 317 317 #define XHCI_PORT_USB2_TM portpmsc, 32, RANGE, 31, 28 318 #define XHCI_PORT_USB2_HIRDM porthl mpc, 32, RANGE, 1, 0319 #define XHCI_PORT_USB2_L1TO porthl mpc, 32, RANGE, 9, 2320 #define XHCI_PORT_USB2_BESLD porthl mpc, 32, RANGE, 13, 10318 #define XHCI_PORT_USB2_HIRDM porthlpmc, 32, RANGE, 1, 0 319 #define XHCI_PORT_USB2_L1TO porthlpmc, 32, RANGE, 9, 2 320 #define XHCI_PORT_USB2_BESLD porthlpmc, 32, RANGE, 13, 10 321 321 322 322 /** -
uspace/drv/bus/usb/xhci/rh.c
r37b13175 r9b56e528 52 52 53 53 /* This mask only lists registers, which imply port change. */ 54 static const uint32_t port_ change_mask =54 static const uint32_t port_events_mask = 55 55 XHCI_REG_MASK(XHCI_PORT_CSC) | 56 56 XHCI_REG_MASK(XHCI_PORT_PEC) | … … 162 162 int err; 163 163 assert(rh); 164 165 164 assert(rh->devices_by_port[port_id - 1] == NULL); 165 166 if (!XHCI_REG_RD(&rh->hc->op_regs->portrs[port_id - 1], XHCI_PORT_PED)) { 167 usb_log_error("Cannot setup RH device: port is disabled."); 168 return EIO; 169 } 166 170 167 171 device_t *dev = hcd_ddf_fun_create(&rh->hc->base); … … 322 326 xhci_port_regs_t * const regs = &rh->hc->op_regs->portrs[port_id - 1]; 323 327 324 uint32_t events = XHCI_REG_RD_FIELD(®s->portsc, 32) & port_ change_mask;328 uint32_t events = XHCI_REG_RD_FIELD(®s->portsc, 32) & port_events_mask; 325 329 326 330 while (events) { 327 XHCI_REG_SET_FIELD(®s->portsc, events, 32); 331 /* 332 * The PED bit in xHCI has RW1C semantics, which means that 333 * writing 1 to it will disable the port. Which means all 334 * standard mechanisms of register handling fails here. 335 */ 336 uint32_t portsc = XHCI_REG_RD_FIELD(®s->portsc, 32); 337 portsc &= ~(port_events_mask | XHCI_REG_MASK(XHCI_PORT_PED)); // Clear events + PED 338 portsc |= events; // Add back events to assert them 339 XHCI_REG_WR_FIELD(®s->portsc, portsc, 32); 328 340 329 341 if (events & XHCI_REG_MASK(XHCI_PORT_CSC)) { … … 346 358 347 359 /* Make sure that PSCEG is 0 before exiting the loop. */ 348 events = XHCI_REG_RD_FIELD(®s->portsc, 32) & port_ change_mask;360 events = XHCI_REG_RD_FIELD(®s->portsc, 32) & port_events_mask; 349 361 } 350 362
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