Changes in boot/arch/arm32/include/mm.h [0acd339:9d58539] in mainline

File:

• boot/arch/arm32/include/mm.h (modified) (2 diffs)

boot/arch/arm32/include/mm.h

@@ -47 +47 @@
 /** Describe "section" page table entry (one-level paging with 1 MB sized pages). */
 #define PTE_DESCRIPTOR_SECTION  0x02
-/** Shift of memory address in section descriptor */
-#define PTE_SECTION_SHIFT  20
 
 /** Page table access rights: user - no access, kernel - read/write. */
 #define PTE_AP_USER_NO_KERNEL_RW  0x01
-
-/** Start of memory mapped I/O area for GTA02 */
-#define GTA02_IOMEM_START  0x48000000
-/** End of memory mapped I/O area for GTA02 */
-#define GTA02_IOMEM_END  0x60000000
-
-/** Start of ram memory on BBxM */
-#define BBXM_RAM_START   0x80000000
-/** Start of ram memory on BBxM */
-#define BBXM_RAM_END   0xc0000000
-
 
 /* Page table level 0 entry - "section" format is used
@@ -71 +58 @@
         unsigned int bufferable : 1;
         unsigned int cacheable : 1;
-        unsigned int xn : 1;
+        unsigned int impl_specific : 1;
         unsigned int domain : 4;
         unsigned int should_be_zero_1 : 1;
-        unsigned int access_permission_0 : 2;
-        unsigned int tex : 3;
-        unsigned int access_permission_1 : 2;
-        unsigned int non_global : 1;
-        unsigned int should_be_zero_2 : 1;
-        unsigned int non_secure : 1;
+        unsigned int access_permission : 2;
+        unsigned int should_be_zero_2 : 8;
         unsigned int section_base_addr : 12;
 } __attribute__((packed)) pte_level0_section_t;