Changes in kernel/arch/ppc32/src/fpu_context.S [b66cc97:9d58539] in mainline
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kernel/arch/ppc32/src/fpu_context.S (modified) (1 diff)
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kernel/arch/ppc32/src/fpu_context.S
rb66cc97 r9d58539 27 27 # 28 28 29 #include <abi/asmtool.h>30 29 #include <arch/asm/regname.h> 31 #include <arch/fpu_context_struct.h> 32 #include <arch/msr.h> 30 #include <arch/context_offset.h> 33 31 34 32 .text 35 33 34 .global fpu_context_save 35 .global fpu_context_restore 36 .global fpu_init 37 .global fpu_enable 38 .global fpu_disable 39 36 40 .macro FPU_CONTEXT_STORE r 37 stfd fr0, FPU_CONTEXT_OFFSET_FR0(\r) 38 stfd fr1, FPU_CONTEXT_OFFSET_FR1(\r) 39 stfd fr2, FPU_CONTEXT_OFFSET_FR2(\r) 40 stfd fr3, FPU_CONTEXT_OFFSET_FR3(\r) 41 stfd fr4, FPU_CONTEXT_OFFSET_FR4(\r) 42 stfd fr5, FPU_CONTEXT_OFFSET_FR5(\r) 43 stfd fr6, FPU_CONTEXT_OFFSET_FR6(\r) 44 stfd fr7, FPU_CONTEXT_OFFSET_FR7(\r) 45 stfd fr8, FPU_CONTEXT_OFFSET_FR8(\r) 46 stfd fr9, FPU_CONTEXT_OFFSET_FR9(\r) 47 stfd fr10, FPU_CONTEXT_OFFSET_FR10(\r) 48 stfd fr11, FPU_CONTEXT_OFFSET_FR11(\r) 49 stfd fr12, FPU_CONTEXT_OFFSET_FR12(\r) 50 stfd fr13, FPU_CONTEXT_OFFSET_FR13(\r) 51 stfd fr14, FPU_CONTEXT_OFFSET_FR14(\r) 52 stfd fr15, FPU_CONTEXT_OFFSET_FR15(\r) 53 stfd fr16, FPU_CONTEXT_OFFSET_FR16(\r) 54 stfd fr17, FPU_CONTEXT_OFFSET_FR17(\r) 55 stfd fr18, FPU_CONTEXT_OFFSET_FR18(\r) 56 stfd fr19, FPU_CONTEXT_OFFSET_FR19(\r) 57 stfd fr20, FPU_CONTEXT_OFFSET_FR20(\r) 58 stfd fr21, FPU_CONTEXT_OFFSET_FR21(\r) 59 stfd fr22, FPU_CONTEXT_OFFSET_FR22(\r) 60 stfd fr23, FPU_CONTEXT_OFFSET_FR23(\r) 61 stfd fr24, FPU_CONTEXT_OFFSET_FR24(\r) 62 stfd fr25, FPU_CONTEXT_OFFSET_FR25(\r) 63 stfd fr26, FPU_CONTEXT_OFFSET_FR26(\r) 64 stfd fr27, FPU_CONTEXT_OFFSET_FR27(\r) 65 stfd fr28, FPU_CONTEXT_OFFSET_FR28(\r) 66 stfd fr29, FPU_CONTEXT_OFFSET_FR29(\r) 67 stfd fr30, FPU_CONTEXT_OFFSET_FR30(\r) 68 stfd fr31, FPU_CONTEXT_OFFSET_FR31(\r) 41 stfd fr14, OFFSET_FR14(\r) 42 stfd fr15, OFFSET_FR15(\r) 43 stfd fr16, OFFSET_FR16(\r) 44 stfd fr17, OFFSET_FR17(\r) 45 stfd fr18, OFFSET_FR18(\r) 46 stfd fr19, OFFSET_FR19(\r) 47 stfd fr20, OFFSET_FR20(\r) 48 stfd fr21, OFFSET_FR21(\r) 49 stfd fr22, OFFSET_FR22(\r) 50 stfd fr23, OFFSET_FR23(\r) 51 stfd fr24, OFFSET_FR24(\r) 52 stfd fr25, OFFSET_FR25(\r) 53 stfd fr26, OFFSET_FR26(\r) 54 stfd fr27, OFFSET_FR27(\r) 55 stfd fr28, OFFSET_FR28(\r) 56 stfd fr29, OFFSET_FR29(\r) 57 stfd fr30, OFFSET_FR30(\r) 58 stfd fr31, OFFSET_FR31(\r) 69 59 .endm 70 60 71 61 .macro FPU_CONTEXT_LOAD r 72 lfd fr0, FPU_CONTEXT_OFFSET_FR0(\r) 73 lfd fr1, FPU_CONTEXT_OFFSET_FR1(\r) 74 lfd fr2, FPU_CONTEXT_OFFSET_FR2(\r) 75 lfd fr3, FPU_CONTEXT_OFFSET_FR3(\r) 76 lfd fr4, FPU_CONTEXT_OFFSET_FR4(\r) 77 lfd fr5, FPU_CONTEXT_OFFSET_FR5(\r) 78 lfd fr6, FPU_CONTEXT_OFFSET_FR6(\r) 79 lfd fr7, FPU_CONTEXT_OFFSET_FR7(\r) 80 lfd fr8, FPU_CONTEXT_OFFSET_FR8(\r) 81 lfd fr9, FPU_CONTEXT_OFFSET_FR9(\r) 82 lfd fr10, FPU_CONTEXT_OFFSET_FR10(\r) 83 lfd fr11, FPU_CONTEXT_OFFSET_FR11(\r) 84 lfd fr12, FPU_CONTEXT_OFFSET_FR12(\r) 85 lfd fr13, FPU_CONTEXT_OFFSET_FR13(\r) 86 lfd fr14, FPU_CONTEXT_OFFSET_FR14(\r) 87 lfd fr15, FPU_CONTEXT_OFFSET_FR15(\r) 88 lfd fr16, FPU_CONTEXT_OFFSET_FR16(\r) 89 lfd fr17, FPU_CONTEXT_OFFSET_FR17(\r) 90 lfd fr18, FPU_CONTEXT_OFFSET_FR18(\r) 91 lfd fr19, FPU_CONTEXT_OFFSET_FR19(\r) 92 lfd fr20, FPU_CONTEXT_OFFSET_FR20(\r) 93 lfd fr21, FPU_CONTEXT_OFFSET_FR21(\r) 94 lfd fr22, FPU_CONTEXT_OFFSET_FR22(\r) 95 lfd fr23, FPU_CONTEXT_OFFSET_FR23(\r) 96 lfd fr24, FPU_CONTEXT_OFFSET_FR24(\r) 97 lfd fr25, FPU_CONTEXT_OFFSET_FR25(\r) 98 lfd fr26, FPU_CONTEXT_OFFSET_FR26(\r) 99 lfd fr27, FPU_CONTEXT_OFFSET_FR27(\r) 100 lfd fr28, FPU_CONTEXT_OFFSET_FR28(\r) 101 lfd fr29, FPU_CONTEXT_OFFSET_FR29(\r) 102 lfd fr30, FPU_CONTEXT_OFFSET_FR30(\r) 103 lfd fr31, FPU_CONTEXT_OFFSET_FR31(\r) 62 lfd fr14, OFFSET_FR14(\r) 63 lfd fr15, OFFSET_FR15(\r) 64 lfd fr16, OFFSET_FR16(\r) 65 lfd fr17, OFFSET_FR17(\r) 66 lfd fr18, OFFSET_FR18(\r) 67 lfd fr19, OFFSET_FR19(\r) 68 lfd fr20, OFFSET_FR20(\r) 69 lfd fr21, OFFSET_FR21(\r) 70 lfd fr22, OFFSET_FR22(\r) 71 lfd fr23, OFFSET_FR23(\r) 72 lfd fr24, OFFSET_FR24(\r) 73 lfd fr25, OFFSET_FR25(\r) 74 lfd fr26, OFFSET_FR26(\r) 75 lfd fr27, OFFSET_FR27(\r) 76 lfd fr28, OFFSET_FR28(\r) 77 lfd fr29, OFFSET_FR29(\r) 78 lfd fr30, OFFSET_FR30(\r) 79 lfd fr31, OFFSET_FR31(\r) 104 80 .endm 105 81 106 FUNCTION_BEGIN(fpu_context_save) 107 FPU_CONTEXT_STORE r3108 109 mffs fr0110 stfd fr0, FPU_CONTEXT_OFFSET_FPSCR(r3)82 fpu_context_save: 83 // FPU_CONTEXT_STORE r3 84 // 85 // mffs fr0 86 // stfd fr0, OFFSET_FPSCR(r3) 111 87 112 88 blr 113 FUNCTION_END(fpu_context_save)114 89 115 FUNCTION_BEGIN(fpu_context_restore) 116 lfd fr0, FPU_CONTEXT_OFFSET_FPSCR(r3) 117 mtfsf 0xff, fr0 118 119 FPU_CONTEXT_LOAD r3 90 fpu_context_restore: 91 // FPU_CONTEXT_LOAD r3 92 // 93 // lfd fr0, OFFSET_FPSCR(r3) 94 // mtfsf 7, fr0 120 95 121 96 blr 122 FUNCTION_END(fpu_context_restore)123 97 124 FUNCTION_BEGIN(fpu_init) 125 mfmsr r0 126 ori r0, r0, MSR_FP 127 128 # Disable FPU exceptions 129 li r3, MSR_FE0 | MSR_FE1 130 andc r0, r0, r3 131 132 mtmsr r0 133 isync 134 98 fpu_init: 135 99 blr 136 FUNCTION_END(fpu_init)137 100 138 FUNCTION_BEGIN(fpu_enable) 139 mfmsr r0 140 ori r0, r0, MSR_FP 141 mtmsr r0 142 isync 101 fpu_enable: 143 102 blr 144 FUNCTION_END(fpu_enable)145 103 146 FUNCTION_BEGIN(fpu_disable) 147 mfmsr r0 148 li r3, MSR_FP 149 andc r0, r0, r3 150 mtmsr r0 151 isync 104 fpu_disable: 152 105 blr 153 FUNCTION_END(fpu_disable)
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