Changes in kernel/arch/sparc64/src/mm/sun4u/as.c [e08162b:9d58539] in mainline
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kernel/arch/sparc64/src/mm/sun4u/as.c
re08162b r9d58539 63 63 { 64 64 #ifdef CONFIG_TSB 65 uintptr_t tsb_base = frame_alloc(TSB_FRAMES, flags, TSB_SIZE - 1); 66 if (!tsb_base) 65 /* 66 * The order must be calculated with respect to the emulated 67 * 16K page size. 68 * 69 */ 70 uint8_t order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * 71 sizeof(tsb_entry_t)) >> FRAME_WIDTH); 72 73 uintptr_t tsb = (uintptr_t) frame_alloc(order, flags | FRAME_KA); 74 75 if (!tsb) 67 76 return -1; 68 69 tsb_entry_t *tsb = (tsb_entry_t *) PA2KA(tsb_base); 70 memsetb(tsb, TSB_SIZE, 0); 71 72 as->arch.itsb = tsb; 73 as->arch.dtsb = tsb + ITSB_ENTRY_COUNT; 77 78 as->arch.itsb = (tsb_entry_t *) tsb; 79 as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT * 80 sizeof(tsb_entry_t)); 81 82 memsetb(as->arch.itsb, 83 (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * sizeof(tsb_entry_t), 0); 74 84 #endif 75 85 … … 80 90 { 81 91 #ifdef CONFIG_TSB 82 frame_free(KA2PA((uintptr_t) as->arch.itsb), TSB_FRAMES); 83 84 return TSB_FRAMES; 92 /* 93 * The count must be calculated with respect to the emualted 16K page 94 * size. 95 */ 96 size_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * 97 sizeof(tsb_entry_t)) >> FRAME_WIDTH; 98 frame_free(KA2PA((uintptr_t) as->arch.itsb)); 99 100 return cnt; 85 101 #else 86 102 return 0; … … 130 146 uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); 131 147 132 ASSERT(as->arch.itsb); 133 ASSERT(as->arch.dtsb); 148 ASSERT(as->arch.itsb && as->arch.dtsb); 134 149 135 150 uintptr_t tsb = (uintptr_t) as->arch.itsb; 136 151 137 if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {152 if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { 138 153 /* 139 154 * TSBs were allocated from memory not covered … … 150 165 * 151 166 */ 152 tsb_base_reg_t tsb_base _reg;153 154 tsb_base _reg.value = 0;155 tsb_base _reg.size = TSB_BASE_REG_SIZE;156 tsb_base _reg.split = 0;157 158 tsb_base _reg.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;159 itsb_base_write(tsb_base _reg.value);160 tsb_base _reg.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;161 dtsb_base_write(tsb_base _reg.value);167 tsb_base_reg_t tsb_base; 168 169 tsb_base.value = 0; 170 tsb_base.size = TSB_SIZE; 171 tsb_base.split = 0; 172 173 tsb_base.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH; 174 itsb_base_write(tsb_base.value); 175 tsb_base.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH; 176 dtsb_base_write(tsb_base.value); 162 177 163 178 #if defined (US3) … … 202 217 uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); 203 218 204 ASSERT(as->arch.itsb); 205 ASSERT(as->arch.dtsb); 219 ASSERT(as->arch.itsb && as->arch.dtsb); 206 220 207 221 uintptr_t tsb = (uintptr_t) as->arch.itsb; 208 222 209 if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {223 if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { 210 224 /* 211 225 * TSBs were allocated from memory not covered
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