Changes in uspace/drv/char/ns8250/ns8250.c [c7235d40:9d58539] in mainline
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uspace/drv/char/ns8250/ns8250.c
rc7235d40 r9d58539 74 74 #define DLAB_MASK (1 << 7) 75 75 76 /** Interrupt Enable Register definition. */77 #define NS8250_IER_RXREADY (1 << 0)78 #define NS8250_IER_THRE (1 << 1)79 #define NS8250_IER_RXSTATUS (1 << 2)80 #define NS8250_IER_MODEM_STATUS (1 << 3)81 82 /** Interrupt ID Register definition. */83 #define NS8250_IID_ACTIVE (1 << 0)84 85 /** FIFO Control Register definition. */86 #define NS8250_FCR_FIFOENABLE (1 << 0)87 #define NS8250_FCR_RXFIFORESET (1 << 1)88 #define NS8250_FCR_TXFIFORESET (1 << 2)89 #define NS8250_FCR_DMAMODE (1 << 3)90 #define NS8250_FCR_RXTRIGGERLOW (1 << 6)91 #define NS8250_FCR_RXTRIGGERHI (1 << 7)92 93 /** Line Control Register definition. */94 #define NS8250_LCR_STOPBITS (1 << 2)95 #define NS8250_LCR_PARITY (1 << 3)96 #define NS8250_LCR_SENDBREAK (1 << 6)97 #define NS8250_LCR_DLAB (1 << 7)98 99 /** Modem Control Register definition. */100 #define NS8250_MCR_DTR (1 << 0)101 #define NS8250_MCR_RTS (1 << 1)102 #define NS8250_MCR_OUT1 (1 << 2)103 #define NS8250_MCR_OUT2 (1 << 3)104 #define NS8250_MCR_LOOPBACK (1 << 4)105 #define NS8250_MCR_ALL (0x1f)106 107 /** Line Status Register definition. */108 #define NS8250_LSR_RXREADY (1 << 0)109 #define NS8250_LSR_OE (1 << 1)110 #define NS8250_LSR_PE (1 << 2)111 #define NS8250_LSR_FE (1 << 3)112 #define NS8250_LSR_BREAK (1 << 4)113 #define NS8250_LSR_THRE (1 << 5)114 #define NS8250_LSR_TSE (1 << 6)115 116 /** Modem Status Register definition. */117 #define NS8250_MSR_DELTACTS (1 << 0)118 #define NS8250_MSR_DELTADSR (1 << 1)119 #define NS8250_MSR_RITRAILING (1 << 2)120 #define NS8250_MSR_DELTADCD (1 << 3)121 #define NS8250_MSR_CTS (1 << 4)122 #define NS8250_MSR_DSR (1 << 5)123 #define NS8250_MSR_RI (1 << 6)124 #define NS8250_MSR_DCD (1 << 7)125 #define NS8250_MSR_SIGNALS (NS8250_MSR_CTS | NS8250_MSR_DSR \126 | NS8250_MSR_RI | NS8250_MSR_DCD)127 128 76 /** Obtain soft-state structure from function node */ 129 77 #define NS8250(fnode) ((ns8250_t *) ((fnode)->dev->driver_data)) … … 148 96 } stop_bit_t; 149 97 150 /** 8250 UART registers layout. */151 typedef struct {152 ioport8_t data; /**< Data register. */153 ioport8_t ier; /**< Interrupt Enable Reg. */154 ioport8_t iid; /**< Interrupt ID Reg. */155 ioport8_t lcr; /**< Line Control Reg. */156 ioport8_t mcr; /**< Modem Control Reg. */157 ioport8_t lsr; /**< Line Status Reg. */158 ioport8_t msr; /**< Modem Status Reg. */159 } ns8250_regs_t;160 161 98 /** The driver data for the serial port devices. */ 162 99 typedef struct ns8250 { … … 165 102 /** DDF function node */ 166 103 ddf_fun_t *fun; 167 /** I/O registers **/168 ns8250_regs_t *regs;169 104 /** Is there any client conntected to the device? */ 170 105 bool client_connected; … … 189 124 * otherwise. 190 125 */ 191 static bool ns8250_received( ns8250_regs_t *regs)192 { 193 return (pio_read_8( ®s->lsr) & NS8250_LSR_RXREADY) != 0;126 static bool ns8250_received(ioport8_t *port) 127 { 128 return (pio_read_8(port + 5) & 1) != 0; 194 129 } 195 130 … … 199 134 * @return The data read. 200 135 */ 201 static uint8_t ns8250_read_8( ns8250_regs_t *regs)202 { 203 return pio_read_8( ®s->data);136 static uint8_t ns8250_read_8(ioport8_t *port) 137 { 138 return pio_read_8(port); 204 139 } 205 140 … … 208 143 * @param port The base address of the serial port device's ports. 209 144 */ 210 static bool is_transmit_empty( ns8250_regs_t *regs)211 { 212 return (pio_read_8( ®s->lsr) & NS8250_LSR_THRE) != 0;145 static bool is_transmit_empty(ioport8_t *port) 146 { 147 return (pio_read_8(port + 5) & 0x20) != 0; 213 148 } 214 149 … … 218 153 * @param c The character to be written to the serial port device. 219 154 */ 220 static void ns8250_write_8( ns8250_regs_t *regs, uint8_t c)221 { 222 while (!is_transmit_empty( regs))155 static void ns8250_write_8(ioport8_t *port, uint8_t c) 156 { 157 while (!is_transmit_empty(port)) 223 158 ; 224 159 225 pio_write_8( ®s->data, c);160 pio_write_8(port, c); 226 161 } 227 162 … … 258 193 { 259 194 fibril_mutex_lock(&ns->mutex); 260 ns8250_write_8(ns-> regs, c);195 ns8250_write_8(ns->port, c); 261 196 fibril_mutex_unlock(&ns->mutex); 262 197 } … … 277 212 ns8250_putchar(ns, (uint8_t) buf[idx]); 278 213 279 return count;214 return 0; 280 215 } 281 216 … … 331 266 return false; 332 267 } 333 334 ns->regs = (ns8250_regs_t *)ns->port;335 268 336 269 return true; … … 346 279 ddf_msg(LVL_DEBUG, "ns8250_dev_probe %s", ns->dev->name); 347 280 281 ioport8_t *port_addr = ns->port; 348 282 bool res = true; 349 283 uint8_t olddata; 350 284 351 olddata = pio_read_8( &ns->regs->mcr);352 353 pio_write_8( &ns->regs->mcr, NS8250_MCR_LOOPBACK);354 if (pio_read_8( &ns->regs->msr) & NS8250_MSR_SIGNALS)285 olddata = pio_read_8(port_addr + 4); 286 287 pio_write_8(port_addr + 4, 0x10); 288 if (pio_read_8(port_addr + 6) & 0xf0) 355 289 res = false; 356 290 357 pio_write_8(&ns->regs->mcr, NS8250_MCR_ALL); 358 if ((pio_read_8(&ns->regs->msr) & NS8250_MSR_SIGNALS) 359 != NS8250_MSR_SIGNALS) 291 pio_write_8(port_addr + 4, 0x1f); 292 if ((pio_read_8(port_addr + 6) & 0xf0) != 0xf0) 360 293 res = false; 361 294 362 pio_write_8( &ns->regs->mcr, olddata);295 pio_write_8(port_addr + 4, olddata); 363 296 364 297 if (!res) { … … 457 390 * @param port The base address of the serial port device's ports. 458 391 */ 459 static inline void ns8250_port_interrupts_enable(ns8250_regs_t *regs) 460 { 461 /* Interrupt when data received. */ 462 pio_write_8(®s->ier, NS8250_IER_RXREADY); 463 pio_write_8(®s->mcr, NS8250_MCR_DTR | NS8250_MCR_RTS 464 | NS8250_MCR_OUT2); 392 static inline void ns8250_port_interrupts_enable(ioport8_t *port) 393 { 394 pio_write_8(port + 1, 0x1); /* Interrupt when data received. */ 395 pio_write_8(port + 4, 0xB); 465 396 } 466 397 … … 469 400 * @param port The base address of the serial port device's ports 470 401 */ 471 static inline void ns8250_port_interrupts_disable( ns8250_regs_t *regs)472 { 473 pio_write_8( ®s->ier, 0x0); /* Disable all interrupts. */402 static inline void ns8250_port_interrupts_disable(ioport8_t *port) 403 { 404 pio_write_8(port + 1, 0x0); /* Disable all interrupts. */ 474 405 } 475 406 … … 500 431 501 432 /* Enable interrupt on the serial port. */ 502 ns8250_port_interrupts_enable(ns-> regs);433 ns8250_port_interrupts_enable(ns->port); 503 434 504 435 return EOK; … … 512 443 * @param port The base address of the serial port device's ports. 513 444 */ 514 static inline void enable_dlab( ns8250_regs_t *regs)515 { 516 uint8_t val = pio_read_8( ®s->lcr);517 pio_write_8( ®s->lcr, val | NS8250_LCR_DLAB);445 static inline void enable_dlab(ioport8_t *port) 446 { 447 uint8_t val = pio_read_8(port + 3); 448 pio_write_8(port + 3, val | DLAB_MASK); 518 449 } 519 450 … … 522 453 * @param port The base address of the serial port device's ports. 523 454 */ 524 static inline void clear_dlab( ns8250_regs_t *regs)525 { 526 uint8_t val = pio_read_8( ®s->lcr);527 pio_write_8( ®s->lcr, val & (~NS8250_LCR_DLAB));455 static inline void clear_dlab(ioport8_t *port) 456 { 457 uint8_t val = pio_read_8(port + 3); 458 pio_write_8(port + 3, val & (~DLAB_MASK)); 528 459 } 529 460 … … 535 466 * if the specified baud_rate is not valid). 536 467 */ 537 static int ns8250_port_set_baud_rate( ns8250_regs_t *regs, unsigned int baud_rate)468 static int ns8250_port_set_baud_rate(ioport8_t *port, unsigned int baud_rate) 538 469 { 539 470 uint16_t divisor; … … 551 482 552 483 /* Enable DLAB to be able to access baud rate divisor. */ 553 enable_dlab( regs);484 enable_dlab(port); 554 485 555 486 /* Set divisor low byte. */ 556 pio_write_8( ®s->data, div_low);487 pio_write_8(port + 0, div_low); 557 488 /* Set divisor high byte. */ 558 pio_write_8( ®s->ier, div_high);559 560 clear_dlab( regs);489 pio_write_8(port + 1, div_high); 490 491 clear_dlab(port); 561 492 562 493 return EOK; … … 568 499 * @param baud_rate The ouput parameter to which the baud rate is stored. 569 500 */ 570 static unsigned int ns8250_port_get_baud_rate( ns8250_regs_t *regs)501 static unsigned int ns8250_port_get_baud_rate(ioport8_t *port) 571 502 { 572 503 uint16_t divisor; … … 574 505 575 506 /* Enable DLAB to be able to access baud rate divisor. */ 576 enable_dlab( regs);507 enable_dlab(port); 577 508 578 509 /* Get divisor low byte. */ 579 div_low = pio_read_8( ®s->data);510 div_low = pio_read_8(port + 0); 580 511 /* Get divisor high byte. */ 581 div_high = pio_read_8( ®s->ier);582 583 clear_dlab( regs);512 div_high = pio_read_8(port + 1); 513 514 clear_dlab(port); 584 515 585 516 divisor = (div_high << 8) | div_low; … … 594 525 * @param stop_bits The number of stop bits used (one or two). 595 526 */ 596 static void ns8250_port_get_com_props( ns8250_regs_t *regs, unsigned int *parity,527 static void ns8250_port_get_com_props(ioport8_t *port, unsigned int *parity, 597 528 unsigned int *word_length, unsigned int *stop_bits) 598 529 { 599 530 uint8_t val; 600 531 601 val = pio_read_8( ®s->lcr);602 *parity = ((val >> NS8250_LCR_PARITY) & 7);532 val = pio_read_8(port + 3); 533 *parity = ((val >> 3) & 7); 603 534 604 535 switch (val & 3) { … … 617 548 } 618 549 619 if ((val >> NS8250_LCR_STOPBITS) & 1)550 if ((val >> 2) & 1) 620 551 *stop_bits = 2; 621 552 else … … 631 562 * is invalid. 632 563 */ 633 static int ns8250_port_set_com_props( ns8250_regs_t *regs, unsigned int parity,564 static int ns8250_port_set_com_props(ioport8_t *port, unsigned int parity, 634 565 unsigned int word_length, unsigned int stop_bits) 635 566 { … … 655 586 switch (stop_bits) { 656 587 case 1: 657 val |= ONE_STOP_BIT << NS8250_LCR_STOPBITS;588 val |= ONE_STOP_BIT << 2; 658 589 break; 659 590 case 2: 660 val |= TWO_STOP_BITS << NS8250_LCR_STOPBITS;591 val |= TWO_STOP_BITS << 2; 661 592 break; 662 593 default: … … 670 601 case SERIAL_MARK_PARITY: 671 602 case SERIAL_SPACE_PARITY: 672 val |= parity << NS8250_LCR_PARITY;603 val |= parity << 3; 673 604 break; 674 605 default: … … 676 607 } 677 608 678 pio_write_8( ®s->lcr, val);609 pio_write_8(port + 3, val); 679 610 680 611 return EOK; … … 689 620 static void ns8250_initialize_port(ns8250_t *ns) 690 621 { 622 ioport8_t *port = ns->port; 623 691 624 /* Disable interrupts. */ 692 ns8250_port_interrupts_disable( ns->regs);625 ns8250_port_interrupts_disable(port); 693 626 /* Set baud rate. */ 694 ns8250_port_set_baud_rate( ns->regs, 38400);627 ns8250_port_set_baud_rate(port, 38400); 695 628 /* 8 bits, no parity, two stop bits. */ 696 ns8250_port_set_com_props( ns->regs, SERIAL_NO_PARITY, 8, 2);629 ns8250_port_set_com_props(port, SERIAL_NO_PARITY, 8, 2); 697 630 /* Enable FIFO, clear them, with 14-byte threshold. */ 698 pio_write_8(&ns->regs->iid, NS8250_FCR_FIFOENABLE 699 | NS8250_FCR_RXFIFORESET | NS8250_FCR_TXFIFORESET 700 | NS8250_FCR_RXTRIGGERLOW | NS8250_FCR_RXTRIGGERHI); 631 pio_write_8(port + 2, 0xC7); 701 632 /* 702 633 * RTS/DSR set (Request to Send and Data Terminal Ready lines enabled), 703 634 * Aux Output2 set - needed for interrupts. 704 635 */ 705 pio_write_8(&ns->regs->mcr, NS8250_MCR_DTR | NS8250_MCR_RTS 706 | NS8250_MCR_OUT2); 636 pio_write_8(port + 4, 0x0B); 707 637 } 708 638 … … 714 644 { 715 645 /* Disable FIFO */ 716 pio_write_8( &ns->regs->iid, 0x00);646 pio_write_8(ns->port + 2, 0x00); 717 647 /* Disable DTR, RTS, OUT1, OUT2 (int. enable) */ 718 pio_write_8( &ns->regs->mcr, 0x00);648 pio_write_8(ns->port + 4, 0x00); 719 649 /* Disable all interrupts from the port */ 720 ns8250_port_interrupts_disable(ns-> regs);650 ns8250_port_interrupts_disable(ns->port); 721 651 } 722 652 … … 728 658 static void ns8250_read_from_device(ns8250_t *ns) 729 659 { 730 ns8250_regs_t *regs = ns->regs;660 ioport8_t *port = ns->port; 731 661 bool cont = true; 732 662 … … 734 664 fibril_mutex_lock(&ns->mutex); 735 665 736 cont = ns8250_received( regs);666 cont = ns8250_received(port); 737 667 if (cont) { 738 uint8_t val = ns8250_read_8( regs);668 uint8_t val = ns8250_read_8(port); 739 669 740 670 if (ns->client_connected) { … … 966 896 { 967 897 ns8250_t *data = (ns8250_t *) dev->driver_data; 968 ns8250_regs_t *regs = data->regs;898 ioport8_t *port = data->port; 969 899 970 900 fibril_mutex_lock(&data->mutex); 971 ns8250_port_interrupts_disable( regs);972 *baud_rate = ns8250_port_get_baud_rate( regs);973 ns8250_port_get_com_props( regs, parity, word_length, stop_bits);974 ns8250_port_interrupts_enable( regs);901 ns8250_port_interrupts_disable(port); 902 *baud_rate = ns8250_port_get_baud_rate(port); 903 ns8250_port_get_com_props(port, parity, word_length, stop_bits); 904 ns8250_port_interrupts_enable(port); 975 905 fibril_mutex_unlock(&data->mutex); 976 906 … … 997 927 998 928 ns8250_t *data = (ns8250_t *) dev->driver_data; 999 ns8250_regs_t *regs = data->regs;929 ioport8_t *port = data->port; 1000 930 int ret; 1001 931 1002 932 fibril_mutex_lock(&data->mutex); 1003 ns8250_port_interrupts_disable( regs);1004 ret = ns8250_port_set_baud_rate( regs, baud_rate);933 ns8250_port_interrupts_disable(port); 934 ret = ns8250_port_set_baud_rate(port, baud_rate); 1005 935 if (ret == EOK) 1006 ret = ns8250_port_set_com_props( regs, parity, word_length, stop_bits);1007 ns8250_port_interrupts_enable( regs);936 ret = ns8250_port_set_com_props(port, parity, word_length, stop_bits); 937 ns8250_port_interrupts_enable(port); 1008 938 fibril_mutex_unlock(&data->mutex); 1009 939
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