Changeset 9fa16b20 in mainline for arch/amd64/src/proc/scheduler.c
- Timestamp:
- 2006-04-17T15:45:38Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 73e9b49
- Parents:
- 97a7eff
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/amd64/src/proc/scheduler.c
r97a7eff r9fa16b20 37 37 #include <print.h> 38 38 #include <arch/pm.h> 39 #include <adt/bitmap.h> 39 40 40 41 /** Perform amd64 specific tasks needed before the new task is run. … … 44 45 void before_task_runs_arch(void) 45 46 { 46 size_t iomap_size;47 count_t bits; 47 48 ptr_16_64_t cpugdtr; 48 49 descriptor_t *gdt_p; … … 54 55 /* First, copy the I/O Permission Bitmap. */ 55 56 spinlock_lock(&TASK->lock); 56 iomap_size = TASK->arch.iomap_size; 57 if (iomap_size) { 58 ASSERT(TASK->arch.iomap); 59 memcpy(CPU->arch.tss->iomap, TASK->arch.iomap, iomap_size); 60 CPU->arch.tss->iomap[iomap_size] = 0xff; /* terminating byte */ 57 if ((bits = TASK->arch.iomap.bits)) { 58 bitmap_t iomap; 59 60 ASSERT(TASK->arch.iomap.map); 61 bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8); 62 bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits); 63 /* 64 * It is safe to set the trailing four bits because of the extra 65 * convenience byte in TSS_IOMAP_SIZE. 66 */ 67 bitmap_set_range(&iomap, TASK->arch.iomap.bits, 4); 61 68 } 62 69 spinlock_unlock(&TASK->lock); … … 65 72 gdtr_store(&cpugdtr); 66 73 gdt_p = (descriptor_t *) cpugdtr.base; 67 gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + iomap_size- 1);74 gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits) - 1); 68 75 gdtr_load(&cpugdtr); 69 76 }
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