Changeset a016b63 in mainline
- Timestamp:
- 2005-10-10T20:26:02Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a783ca4
- Parents:
- e0cdb7b6
- Location:
- arch
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/include/context.h
re0cdb7b6 ra016b63 50 50 #define context_set(c, _pc, stack, size) \ 51 51 (c)->pc = (__address) _pc; \ 52 (c)->bsp = ((__address) stack) + (ALIGN(sizeof(the_t), STACK_ALIGNMENT));\53 (c)->sp = ((__address) stack) + (size) - SP_DELTA;52 (c)->bsp = ((__address) stack) + ALIGN(sizeof(the_t), STACK_ALIGNMENT); \ 53 (c)->sp = ((__address) stack) + ALIGN((size) - SP_DELTA, STACK_ALIGNMENT); 54 54 55 55 /* -
arch/mips32/include/mm/page.h
re0cdb7b6 ra016b63 63 63 #define SET_PTL0_ADDRESS_ARCH(ptl0) (PTL0 = (pte_t *)(ptl0)) 64 64 65 #define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)]. pfn<<12)65 #define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].lo.pfn<<12) 66 66 #define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) 67 67 #define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) 68 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)]. pfn<<12)68 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].lo.pfn<<12) 69 69 70 #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)]. pfn = (a)>>12)70 #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].lo.pfn = (a)>>12) 71 71 #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) 72 72 #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) 73 #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)]. pfn = (a)>>12)73 #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].lo.pfn = (a)>>12) 74 74 75 75 #define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i)) … … 95 95 96 96 return ( 97 ((p-> c>PAGE_UNCACHED)<<PAGE_CACHEABLE_SHIFT) |98 ((!p-> v)<<PAGE_PRESENT_SHIFT) |97 ((p->lo.c>PAGE_UNCACHED)<<PAGE_CACHEABLE_SHIFT) | 98 ((!p->lo.v)<<PAGE_PRESENT_SHIFT) | 99 99 (1<<PAGE_USER_SHIFT) | 100 100 (1<<PAGE_READ_SHIFT) | … … 109 109 pte_t *p = &pt[i]; 110 110 111 p-> c = (flags & PAGE_CACHEABLE) != 0 ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED;112 p-> v = !(flags & PAGE_NOT_PRESENT);111 p->lo.c = (flags & PAGE_CACHEABLE) != 0 ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED; 112 p->lo.v = !(flags & PAGE_NOT_PRESENT); 113 113 p->w = (flags & PAGE_WRITE) != 0; 114 114 } -
arch/mips32/include/mm/tlb.h
re0cdb7b6 ra016b63 31 31 32 32 #include <arch/exception.h> 33 #include <typedefs.h> 33 34 34 35 #define TLB_SIZE 48 … … 41 42 #define PAGE_UNCACHED 2 42 43 #define PAGE_CACHEABLE_EXC_WRITE 5 44 45 typedef union entry_lo entry_lo_t; 46 typedef union entry_hi entry_hi_t; 47 typedef union page_mask page_mask_t; 48 typedef union index tlb_index_t; 43 49 44 50 union entry_lo { … … 54 60 }; 55 61 56 struct pte { 57 unsigned g : 1; /* global bit */ 58 unsigned v : 1; /* valid bit */ 59 unsigned d : 1; /* dirty/write-protect bit */ 60 unsigned c : 3; /* cache coherency attribute */ 61 unsigned pfn : 24; /* frame number */ 62 unsigned w : 1; /* writable */ 63 unsigned a : 1; /* accessed */ 64 } __attribute__ ((packed)); 62 union pte { 63 entry_lo_t lo; 64 struct { 65 unsigned : 30; 66 unsigned w : 1; /* writable */ 67 unsigned a : 1; /* accessed */ 68 } __attribute__ ((packed)); 69 }; 65 70 66 71 union entry_hi { … … 90 95 __u32 value; 91 96 }; 92 93 typedef union entry_lo entry_lo_t;94 typedef union entry_hi entry_hi_t;95 typedef union page_mask page_mask_t;96 typedef union index tlb_index_t;97 97 98 98 /** Probe TLB for Matching Entry -
arch/mips32/include/types.h
re0cdb7b6 ra016b63 50 50 typedef __u32 __native; 51 51 52 typedef structpte pte_t;52 typedef union pte pte_t; 53 53 54 54 #endif -
arch/mips32/src/mm/tlb.c
re0cdb7b6 ra016b63 105 105 106 106 prepare_entry_hi(&hi, VM->asid, badvaddr); 107 prepare_entry_lo(&lo, pte-> g, pte->v, pte->d, pte->c, pte->pfn);107 prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->lo.d, pte->lo.c, pte->lo.pfn); 108 108 109 109 /* … … 178 178 pte->a = 1; 179 179 180 prepare_entry_lo(&lo, pte-> g, pte->v, pte->d, pte->c, pte->pfn);180 prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->lo.d, pte->lo.c, pte->lo.pfn); 181 181 182 182 /* … … 251 251 */ 252 252 pte->a = 1; 253 pte-> d = 1;254 255 prepare_entry_lo(&lo, pte-> g, pte->v, pte->w, pte->c, pte->pfn);253 pte->lo.d = 1; 254 255 prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->w, pte->lo.c, pte->lo.pfn); 256 256 257 257 /* … … 376 376 * Handler cannot succeed if the mapping is marked as invalid. 377 377 */ 378 if (!pte-> v) {378 if (!pte->lo.v) { 379 379 printf("Invalid mapping.\n"); 380 380 return NULL;
Note:
See TracChangeset
for help on using the changeset viewer.