Changeset a1a83e5e in mainline
- Timestamp:
- 2009-04-21T20:16:12Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- ab1861a
- Parents:
- 5646813
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/sparc64/loader/asm.S
r5646813 ra1a83e5e 41 41 42 42 halt: 43 b halt43 ba %xcc, halt 44 44 nop 45 45 … … 117 117 ldub [%g2], %g2 118 118 cmp %g2, 3 119 be 1f119 be %xcc, 1f 120 120 nop 121 121 0: -
boot/arch/sparc64/loader/boot.S
r5646813 ra1a83e5e 44 44 .global start 45 45 start: 46 b 1f46 ba %xcc, 1f 47 47 nop 48 48 … … 84 84 stx %o4, [%l0] 85 85 86 b bootstrap86 ba %xcc, bootstrap 87 87 nop 88 88 -
kernel/arch/sparc64/include/trap/trap_table.h
r5646813 ra1a83e5e 101 101 .macro PREEMPTIBLE_HANDLER f 102 102 sethi %hi(\f), %g1 103 b preemptible_handler103 ba %xcc, preemptible_handler 104 104 or %g1, %lo(\f), %g1 105 105 .endm -
kernel/arch/sparc64/src/asm.S
r5646813 ra1a83e5e 226 226 .global memsetb 227 227 memsetb: 228 b _memsetb228 ba %xcc, _memsetb 229 229 nop 230 230 231 231 .global memsetw 232 232 memsetw: 233 b _memsetw233 ba %xcc, _memsetw 234 234 nop 235 235 -
kernel/arch/sparc64/src/dummy.s
r5646813 ra1a83e5e 43 43 .global cpu_halt 44 44 cpu_halt: 45 b cpu_halt45 ba %xcc, cpu_halt 46 46 nop
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